18 Soc Architecture Jobs

As a SOC Performance Modeling Engineer at AMD, you will be an integral part of the Client Performance Modeling Team based in Hyderabad, India. Your primary responsibility will involve analyzing the architectural performance of notebook and desktop processors through modeling and RTL simulation. By collaborating with SoC, IP & Model architects, you will evaluate and debug CPU/GFX/NPU processor performance and suggest architectural enhancements to drive innovation. To excel in this role, you should possess a deep passion for cutting-edge SoC architecture, digital design, and verification. Your effective communication skills and ability to work seamlessly with architects & engineers across different locations and time zones will be crucial. Strong analytical and problem-solving abilities are essential, coupled with a willingness to learn and tackle challenges head-on. Key responsibilities in this role include developing architectural models, tools, and infrastructure, optimizing performance features, proposing enhancements for next-gen SOCs, conducting trade-off studies for performance, power, and area, evaluating benchmarks for various processors, advancing simulation infrastructure and methodology, and providing technical guidance to the Client SoC team. The ideal candidate would have 3-15 years of industry/academic experience, expertise in computer system simulation and performance evaluation, familiarity with ASIC HW design and verification languages/tools such as Verilog, System Verilog, System C, OVM/OVC, proficiency in programming and scripting languages like C/C++, Perl, Python, and a track record of analyzing system bottlenecks to optimize computing systems for performance. Additionally, detailed microarchitecture knowledge of CPU, GPU, NPU, I/O subsystem, and/or DRAM controller would be advantageous. An academic background in Computer/Electrical Engineering with a Bachelor's or Master's degree is required to qualify for this position at AMD. Explore the AMD benefits at a glance to discover the comprehensive perks offered to our valued employees.,

You will be responsible for executing small to mid-size customer projects in various fields of VLSI Frontend Backend or Analog design with minimal supervision. As an individual contributor, you will work on tasks related to RTL Design/Module and provide support to junior engineers in Verification, PD, DFT, Circuit Design, Analog Layout, STA, Synthesis, Design Checks, and Signoff. Your successful and on-time completion of assigned tasks will contribute to the quality delivery approved by the project lead/manager. Your outcomes will be measured based on the quality of deliverables verified by the Lead/Manager, timely delivery as per relevant metrics, reduction in cycle time and cost through innovative approaches, number of trainings attended, and the number of new projects handled. You are expected to ensure the quality of deliverables by facilitating clean delivery of designs and modules for easy integration at the top level, meeting functional specifications and design guidelines without any deviation, and documenting tasks and work performed. Timely delivery is crucial, meeting project timelines as requested and supporting the team lead in intermediate task delivery. Teamwork plays a significant role, requiring your participation in supporting team members/lead when needed and performing additional tasks in case any team member is unavailable. Embracing innovation and creativity, you should look to automate repeated tasks to save design cycle time, participate in technical discussions, and contribute to training forums. Your skills should include expertise in languages and programming such as System Verilog, Verilog, VHDL, UVM, C, C++, Assembly, Perl, TCL/TK, Makefile, and Spice, among others. Proficiency in EDA Tools like Cadence, Synopsys, Mentor tool sets, and technical knowledge in IP Spec Architecture Design, Micro Architecture, Bus Protocols, Physical Design, Circuit Design, Analog Layout, Synthesis, DFT, Floorplan, Clocks, and more is required. Familiarity with CMOS FinFet, FDSOI, technology, strong communication, analytical reasoning, problem-solving skills, and the ability to learn new skills are essential for successful project execution. Your knowledge should span across Frontend/Backend/Analog Design, project experience in RTL Design, Verification, DFT, Physical Design, STA, PV, Circuit Design, Analog Layout, understanding of design flow, methodologies, technical specifications, and the ability to execute assigned tasks effectively based on client/manager requirements. Having a command over digital logic design concepts, experience in large IP block design, knowledge of Synopsys/Cadence/Mentor simulation tools, Perl/TCL scripting, RTL logic synthesis, and basic SOC architecture will be advantageous for this role. Your attention to detail, technical skills, and ability to deliver tasks on time with quality are crucial aspects in contributing to the success of projects at UST.,

We are seeking an experienced RTL Design Engineer to be a part of our advanced ASIC/SoC development team in Bengaluru. As an RTL Design Engineer, you will be responsible for developing high-quality, synthesizable RTL code using Verilog/SystemVerilog and integrating complex IPs and subsystems into high-performance SoCs. Collaboration with system architects, contribution to micro-architecture, and ensuring design quality through checks like Lint, CDC, and Synthesis will be key aspects of this role. Your responsibilities will include leading SoC-level integration activities, providing technical guidance in design reviews, and interfacing with cross-functional teams for smooth bring-up and signoff processes. The ideal candidate should possess a Bachelor's or Master's degree in Electrical/Electronics/Computer Engineering, along with at least 7 years of experience in RTL design and SoC integration. Strong skills in Verilog/SystemVerilog, knowledge of SoC architecture and bus protocols, and proficiency in industry tools like Design Compiler, Spyglass, and VCS are essential for this role. If you have a deep understanding of clock/reset strategies, hierarchical design practices, timing closure, synthesis flows, and constraints development, along with strong analytical and debugging skills to resolve complex RTL and integration issues, we would like to hear from you. Join us and contribute to the design, integration, and verification of cutting-edge IPs and subsystems within high-performance SoCs.,

As a candidate for this position, you should hold a Bachelor's degree in Electronics or Computer Engineering/Science, or possess equivalent practical experience. With a minimum of 8 years of experience in SoC power modeling and analysis, you should also have a solid understanding of SOC architecture and power techniques. A Master's degree or PhD in Electronics, Computer Engineering, or Computer Science would be considered a preferred qualification. Additionally, experience with ASIC design flows and knowledge of low power architecture and power optimization techniques such as multi Vth/power/voltage domain design, clock gating, power gating, and Dynamic Voltage Frequency Scaling would be advantageous. Join a diverse team that is dedicated to pushing boundaries and developing custom silicon solutions to power the future of Google's direct-to-consumer products. Your contribution to the innovation behind products loved by millions worldwide will be crucial. Your expertise will play a significant role in shaping the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration. At Google, our mission is to organize the world's information and make it universally accessible and useful. The Devices & Services team combines the best of Google AI, Software, and Hardware to create radically helpful experiences for users. Through research, design, and development of new technologies and hardware, we aim to enhance user interaction with computing, making it faster, seamless, and more powerful. The Devices & Services team is dedicated to improving people's lives through technology by exploring new ways to capture and sense the world, advancing form factors, and enhancing interaction methods. Your responsibilities in this role will include defining power requirements for an SoC to optimize Power-Performance-Area (PPA) under current and thermal constraints. You will define power KPIs and SoC/IP-level power goals, guide architecture, design, implementation, and software to achieve power goals, and track power throughout the design cycle. Additionally, you will propose and drive power optimizations throughout the design process, perform algorithm development, modeling, and analysis of various power approaches, and lead power-performance trade-off analysis for engineering reviews and product roadmap decisions.,

You are invited to apply for the position of "ASIC RTL Engineer" at Semi Leaf consulting Service located in Bangalore. With 3-8 years of experience, if you are available to join within 30 days and prefer working in a WFO mode, this opportunity might be just for you. As an ASIC RTL Engineer at Semi Leaf, your responsibilities will include working on ASIC RTL design, RTL Logic Synthesis, LEC, Conformal, ECO, FC Check, and having proficiency in either TCL or Python. You must have Synthesis or Implementation experience, familiarity with the Linux environment, excellent communication skills, and experience with at least one serial protocol like UART, I2C, SPI. Skills with SOC Architecture, experience in CDC and Lint, and working on Cortex-M4 core/Sub-system verification/execution environment bring-up are desirable. Additionally, you should be able to develop verification infrastructure for Cortex-M4 Core/Sub-system bring-up, have knowledge of Coresight/Functional Debug architecture, and expertise in UVM/SV knowledge to develop scoreboard/checkers. If you are interested in this opportunity and possess the required experience, kindly share your updated resume with vagdevi@semi-leaf.com. Referrals are also highly appreciated. Join us at Semi Leaf consulting Service and be part of a team of experts dedicated to finding candidates with specialized skills in Semiconductor/VLSI/EDA & Embedded domains.,

As a Senior RTL Design Engineer with 3-5 years of experience, you will be based in Hyderabad. You will be required to demonstrate strong RTL (Verilog/System Verilog) skills with a focus on IP development. Your responsibilities will include verifying designs by creating simple testbenches, as well as possessing a solid foundation in logic synthesis and timing closure concepts. Additionally, you should have a good understanding of SoC architecture, AXI bus protocols, and hardware debug processes. Experience with Xilinx FPGAs, Vivado tool flows, and micro-architecture development will be considered a plus. If you meet the specified requirements and are interested in this opportunity, please submit your updated resume to janagaradha.n@acldigital.com.,

The Automotive Platform Architect position in Qualcomms central Platform Architecture team is a key role that involves defining common platform architectures and architecture features for the next-generation system-on-chip (SoC) products across Qualcomms business lines. This role specifically focuses on the Automotive business line, which includes areas such as In-vehicle Infotainment (IVI), the Digital Cockpit, Advanced Driver Assistance Systems (ADAS), and Autonomous Driving (AD). As an Automotive Platform Architect, you will have the opportunity to significantly impact the development of SoC architecture for the rapidly growing Automotive business. To qualify for this role, a Bachelor of Science degree in EE/ECE/CE/CS or a related field is required, with an MS or PhD highly desired. The ideal candidate should have experience in Automotive SoC architecture and automotive platform design, along with a deep technical background and credibility. Strong collaboration and influencing skills across various organizations, excellent communication, and interpersonal skills are essential. A commitment to integrity in all interactions is also expected. In this role, you will work closely with Qualcomms core SoC Hardware, Software, and Product Management teams, as well as the Automotive Business Unit, to develop scalable and reusable SoC architecture and features. You will contribute to the efficient development of cutting-edge SoC products for the Automotive business line, focusing on areas like IVI, Digital Cockpit, ADAS, and Autonomous Driving. This position offers a high level of visibility and the opportunity to shape Qualcomm's technical direction, drive innovation in the Automotive SoC industry, and make a significant impact on a global scale. Your responsibilities may include collaborating with Automotive Business Unit engineering leadership, translating product requirements into platform architecture requirements, defining the integration of Automotive SoCs into Qualcomm's overall SoC architecture platforms, and working on feature development to support Automotive SoCs. You will also evaluate architecture proposals, engage with core IP and component suppliers, and represent Qualcomm in customer meetings with technical expertise. Additionally, you will provide leadership in aligning hardware, software, and SoC organizations towards common architecture and technology goals, as well as drive the development of technical solutions and innovations. Minimum qualifications for this role include a Bachelor's degree in Electrical or Computer Engineering, Computer Science, or a related field. Ideal candidates will have 20+ years of work experience in SoC HW VLSI design/validation domains, with at least 7 years specifically in SoC Architecture. Preferred qualifications include a Master's degree in Electrical/Electronics engineering. Candidates with expertise in areas such as SoC/Computer Architecture, power and performance optimization, software engineering, digital hardware design, automotive domain architectures, safety standards, operating systems, machine learning, and various automotive interfaces and protocols will be highly valued for this role. Strong skills in HW engineering, caches, DSP architectures, memory management, and microprocessor systems design are also desirable. If you are a qualified candidate with a passion for shaping the future of Automotive SoC architecture and driving innovation in the Automotive industry, this role offers a unique opportunity to make a significant impact and contribute to Qualcomm's success.,

The ideal candidate for this position at Qualcomm India Private Limited will utilize their knowledge and experience to offer leadership, technical guidance, and execute silicon validation of ARM or DSP based multiple SOC projects and platforms. The candidate should possess a strong understanding of digital design and SOC architecture, along with a good grasp of Object-Oriented Programming (OOP) concepts. Experience in Hardware Verification Languages (HVL) such as System Verilog, UVM/OVM, and System C, as well as Hardware Description Languages (HDL) like Verilog is required. Knowledge of ARM/DSP CPU architecture and High-Speed Peripherals such as USB2/3, PCIE, or Audio/Multimedia is essential. Additionally, familiarity with Power-aware Verification, GLS, Test vector generation, and Version managers like Clearcase/perforce is advantageous. Proficiency in scripting languages like Perl, Tcl, or Python is preferred. The candidate should possess strong analytical and debugging skills. Experience in Hifi Processor, Soundwire interface, ANC, DMA, I2S verification is considered a plus. Qualcomm is looking for candidates who hold a Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or a related field with at least 6 years of Hardware Engineering or related work experience. Alternatively, candidates with a Master's degree in the mentioned fields and 5+ years of relevant experience, or a PhD with 4+ years of relevant work experience are encouraged to apply. A total of 12-15 years of experience with a Bachelor's/Master's degree in Electrical/Electronics engineering is also acceptable. Qualcomm is an equal opportunity employer and is committed to providing accessible processes for individuals with disabilities during the application/hiring process. Interested candidates are encouraged to reach out for accommodations if needed. Qualcomm expects its employees to comply with all relevant policies and procedures, including those related to security and the protection of confidential information. Please note that Qualcomm's Careers Site is exclusively for individuals seeking job opportunities at Qualcomm. Staffing and recruiting agencies, as well as individuals being represented by an agency, are not permitted to use this site for submissions. Qualcomm does not accept unsolicited resumes or applications from agencies. For further information about this role, please contact Qualcomm Careers directly.,

You will need a Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience. Additionally, you should have at least 4 years of experience with digital logic design principles, RTL design concepts, and languages such as Verilog or SystemVerilog. It is also essential to have experience in the design and development of Security or Audio blocks, as well as with a scripting language like Perl or Python. Familiarity with DSI2 or MIPI C/D Phy is necessary. Ideally, you should have a Master's or PhD degree in Electrical Engineering, Computer Engineering, or Computer Science. Preferred qualifications include experience with ASIC or FPGA design verification, synthesis, timing/power analysis, and DFT. Knowledge of high-performance and low-power design techniques, assertion-based formal verification, FPGA and emulation platforms, and SOC architecture is also beneficial. As a part of the team working on custom silicon solutions for Google's direct-to-consumer products, you will play a crucial role in shaping the future of hardware experiences. Your contributions will drive innovation behind products that are beloved by millions worldwide, delivering exceptional performance, efficiency, and integration. The Platforms and Devices team at Google focuses on various computing software platforms and first-party devices and services. By researching, designing, and developing new technologies, the team aims to enhance user interaction with computing, making it faster and more seamless, and creating innovative experiences for users globally. Your responsibilities will include collaborating with architects to develop microarchitecture, performing Verilog/SystemVerilog RTL coding, functional/performance simulation debugging, and conducting Lint/CDC/FV/UPF checks. You will also participate in test planning and coverage analysis, develop RTL implementations meeting power, performance, and area goals, and be involved in synthesis, timing/power closure, pre-silicon, and post-silicon bring-up. Additionally, you will create tools/scripts to automate tasks, track progress, and collaborate with multi-disciplined, multi-site teams in Architecture, RTL design, verification, DFT, and Partner Domains.,

Job Description: We are looking for an experienced SoC DV Lead with a strong background in SoC verification and hands-on experience in writing C test cases for SoC-level DV. Key Responsibilities: Lead SoC DV activities from planning to closure Develop and debug C-based test cases for system-level verification Work closely with design, architecture, and firmware teams Perform coverage analysis and ensure comprehensive validation Guide and mentor junior DV engineers Key Skills: SoC-level design verification C programming for test development Debugging and problem-solving Exposure to UVM/SystemVerilog (preferred) Strong understanding of SoC architecture

As a C++ Developer at our company, you will be responsible for developing and maintaining software solutions using C++ programming language. Your expertise in C++11 and Linux system programming will be crucial in handling tasks such as IPC multi-processing, multi-threading, debugging, and core dump analysis. Additionally, your knowledge of video streaming technologies like MPEG-DASH, HLS, and Progressive Download, as well as audio/video formats such as h264, H265, AV1, mp4, cmaf, ts, will be essential in contributing to our projects. You will also be required to have a good understanding of SoC architecture and experience in developing firmware for hardware media pipeline. Strong communication skills, problem-solving abilities, and a collaborative approach are key attributes that we are looking for in our ideal candidate. Desirable skills include expertise in Digital Rights Management (Widevine, Playready, FairPlay) & Trusted Execution Environment, knowledge of multimedia frameworks like gstreamer, ffmpeg, and experience in Web playback technologies such as MSE & EME. At GlobalLogic, we offer a culture of caring where people come first. We prioritize inclusivity, acceptance, and a sense of belonging, fostering meaningful connections among team members. You will have access to continuous learning and development opportunities, enabling you to grow personally and professionally. Engage in interesting and impactful work, collaborating with clients globally to bring innovative solutions to life. We value work-life balance and offer flexibility in work arrangements to ensure you can achieve harmony in your professional and personal life. Join us at GlobalLogic, a high-trust organization committed to integrity and ethical practices. As a trusted digital engineering partner to leading companies worldwide, we are dedicated to creating intelligent products, platforms, and services that redefine industries and drive digital transformation. Embrace the opportunity to work on cutting-edge projects that shape the future and make a real impact in the digital world.,

Company: Qualcomm India Private Limited Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. Experience : 5 - 8 Years of relevant experience with System level exposure on ARM SOC Mandatory Skills: Good understanding of processor architecture, Multicore/Multiprocessor with SMP/heterogenous cores. Good understanding on Cache hierarchy, coherency, and snoop concepts Good Understanding of CPU Dynamic Frequency and Voltage Switching, Low Power Modes C language expertise for low level programming, Assembly language for any processor. Exposure to CPU Architecture based on ARM or x86. Exposure to SoC architecture paradigms interconnects, power management. Desired Skills Hands on experience On Linux operating system, Kernel debuggers, Kernel and Linux Device drivers Exposure to Memory architecture, through with Weakly ordered memory model and barriers concepts RISC-V architectural knowledge would be an added plus. Exposure to SoC architecture paradigms interconnects, power management. Exposure to working on emulation/pre-si environment is added advantage. Hands on experience with JTAG based debuggers. Bring-up of hardware-software solution on emulation platforms and on fresh SOC designs. ASIC digital design fundamentals and methodology would be an added advantage. Knowledge of Linux kernel internals (process scheduler, memory management, concurrency / synchronization, memory allocation, file systems) and profiling Responsibilities Create the Complex Test content scenarios in the Baremetal/Linux OS world in the process scheduler, memory management, concurrency / synchronization, memory allocation, file systems Able to understand various hardware modules constituting CPU sub-system and its interfaces. Ability to work with hardware design team to develop low level drivers for early enablement. Chalk out hardware functional validation plan, develop test bench and execute during pre and post silicon SOC bring up phases to expose HW issues. Excellent communication skills and ability to work with diverse teams to drive HW debugs to conclusion. Use silicon debug hooks to measure power/performance/coverage and other KPI metrics Applicants: Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies: Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.,

This is a full-time on-site role for an RTL Lead located in Bengaluru. You will be responsible for designing and implementing RTL code, verifying and validating designs, collaborating with hardware and software teams, and ensuring the achievement of project milestones. Additionally, you will be involved in reviewing design specifications, optimizing system performance, and troubleshooting as needed. Qualifications: - Experience in RTL Design, Verilog, VHDL - Proficiency in Simulation Tools and FPGA prototyping - Strong understanding of Digital Design, Logic Design, and Circuit Design - Knowledge of SoC Architecture and Integration - Proven experience with EDA tools like Synopsys, Cadence - Excellent problem-solving and analytical skills - Ability to work in a team and communicate effectively - Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or related field - Experience in the semiconductor industry is a plus If you are interested in this opportunity, kindly share your resume to mahadev@msmcad.com.,

As an ideal candidate for this role, you should possess 3-5 years of experience in emulation/prototyping utilizing Cadence tool flows such as Palladium and Protium. Your expertise should extend to having a working knowledge of System Verilog and Verilog language semantics, along with familiarity with compilation flows associated with these languages. A solid understanding of SOC architecture and the AXI protocol is essential for this position. Your ability to comprehend and work effectively with SOC architectures and AXI protocol will be crucial to your success in this role. Moreover, strong communication skills and the capacity for effective team collaboration are highly valued. Your ability to communicate effectively and collaborate efficiently with team members will contribute significantly to the overall success of the projects you will be involved in.,

Job Specs : We are seeking a highly skilled and motivated ASICVerification Engineer to join the offshore development teams of our group companies. You will work with the rapidly expanding team which focuses on the research and development of ASIC Verification IPs for Silicon Lifecycle Management, driving innovation and excellence in chip design and verification. You will work alongside a talented and dedicated group of engineers, all committed to pushing the boundaries of technology and delivering top-notch solutions to our customers. Work Location : Remote,Delhi NCR,Bengaluru,Chennai,Pune,Kolkata,Ahmedabad, Mumbai, Hyderabad Work Expertise: 7 Years 10 Years Desired Profile : B.E./B.Tech or M.E./M.Tech in Electronics, Electrical, or Computer Engineering. Expertise in ASIC SOC verification. Expertise in UVM, System Verilog and constrained random testing. Expertise in Gate Level Simulation tools (GLS) or verification related to display port or memory controller Expertise in testbench architecture and SOC-level verification strategies. Knowledge of scripting languages (Python, Perl, TCL) for automation. Good understanding of SoC architecture, including CPU subsystems, memory hierarchy, and peripherals. Preferred immediate hires only Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

Looking for someone who has very good exposure in Firmware (FW) and Software (SW) components of the HPC SoC to play a crucial role in designing and optimizing System-on-Chip (SoC) solutions for HPC applications. Responsibilities Architect and design SoC solutions for HPC applications, ensuring optimal performance and efficiency. Define firmware and software architecture for SoC components, including bootloaders, drivers, and system-level software. Collaborate with hardware teams to ensure seamless integration of FW/SW with SoC designs. Optimize power, performance, and area (PPA) trade-offs in SoC architecture. Decent exposure on ARM A and M latest profiles, PCIe, CXL,UCIe, NIC modules. Implementing Root Of Trust flow. Looking after BMC connectivity related requirements and working with team to implement them. Work on low-level programming , including embedded firmware development and OS kernel modifications . Lead debugging and validation efforts for SoC firmware and software. Stay updated with emerging technologies in HPC, SoC design, and software development. Qualifications Bachelor's, or Masters in CSE or ECE . Strong expertise in SoC architecture, firmware development, and software engineering . 10+ years of experience with HPC workloads, parallel computing, and memory management . Proficiency in C/C++, Python, and assembly programming . Knowledge of SoC interconnects, memory subsystems, and power management . Familiarity with Linux kernel development, RTOS, and embedded systems . Experience with hardware/software co-design and debugging tools . Familiarity of using benchmarking and performance tools Education Requirements: B. Tech / M. Tech (ECE / CSE) Experience: 10+ Years Location: Hyderabad Shift: General Work Week: Monday to Friday

NES SOC Architecture team is looking for an outstanding engineer to work on definition of NEX SoC(s) for Intel Server, Client and IoT platforms. In this role, you will develop and drives end-to-end SoC architecture for highly optimized, modular, and scalable SoC, based on hardware features, requirements, and interoperability of hardware and software throughout the product life cycle.You will collaborate across disciplines to analyze workloads, identify opportunities for improvement, determine priorities, and balance trade-offs. Responsibilities include: Determining functional requirements based on product goals, use cases, and workload analysis. Defining SoC architecture to meet product requirement and deliver architecture specifications. Evaluates feasibility trade-offs and explores and defines new approaches and novel architectures for SoC. Invents, conceptualizes, and specifies microarchitecture and architectural features for next-generation products to deliver optimized SoC for multiple segments from high performance computing to extreme low-power products. A successful candidate will demonstrate. Broad knowledge of SoC architecture. Performance, power trade-off understanding. Deep expertise in domains such as reset, clock, coherency, debug, power management, performance evaluation Exceptional communication skills. Collaborates with design engineers, system engineers, verification engineers, structural design engineersto improve the overall design of SoC and overcome constraints. Work will include a combination of individual contribution and leveraging team participation through mentoring and leadership of technical initiatives. Qualifications: Minimum Qualifications: Bachelor's degree or higher in Computer Science or Electronics Engineering, 15+ years relevant experience in Silicon development in Arch/Uarch, Modeling, Designincluding multiple project development life cycles with at least one as lead architect or lead u-architect.

Job Area: Engineering Group, Engineering Group Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 6+ years of Hardware Engineering or related work experience. ORMaster's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 5+ years of Hardware Engineering or related work experience. ORPhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience.Qualcomm's SoC Validation Team (SVE - System SOC/silicon Validation) is part of the central SoC digital hardware organization responsible for the overall quality of the SoC silicon. The Validation team works closely with architects, designers, verification engineers, software engineers, and customers.We are looking for self-motivated engineers who will be part of bare-metal SoC validation team and will have the following responsibilities. Responsibilities Design, develop, debug system/IP validation framework to be used in bare-metal and light-weight-RTOS environment for SoC validation in one of the areas mentioned below Understand the SoC architecture, new features and prepare test plan Develop/port/enhance system validation content based on system level use cases, low power use cases, find HW bugs and root cause them Interface with Design/Verification/Software/Customer Engineering teams for test plan and debugs Interface with various IP validation team and cross functional teams(Design/Verification/SW) for test plan creation and debug complex issues Use silicon debug hooks to measure power/performance/coverage and other KPI metrics Manage a team of silicon validation team members Minimum Qualification : Bachelor's/Master"s degree in Electronics and Communication Engineering/Computer Science or related field 11+ years of working experience in SOC validation (Candidates with less experience with good academics from premier institutes can also be considered) Mandatory Skills: Good knowledge and understanding of Embedded SW architecture and development in C, C++, Assembly C language expertise for low level programming, assembly language for any processor, C-assembly interworking Hands on end to end experience in one or more of the IP validation flow from architecture review, testplan creation, testcases development, execution, debugsCPUSS, DDRSS, Multimedia (Camera, Video, Display, GPU) blocks Good Experience in working closely with Design/Verification/Arch/Customer Engineering teams for IP/SOC validation planning, execution and debugs Good knowledge of ARM/X86/PowerPC CPU architecture, Interrupt handling, Cache coherency, IO Coherency Good knowledge of SoC architecture having Multicore/Multiprocessor with SMP/heterogenous cores, memory management, CPU concepts Having experience of managing team members as people manager Compiler/LinkerProficient in using compilers and linkers such as GCC, CLANG, RVDS, LLVM, Experience in optimizing code and resolving linker issues to ensure efficient and error free builds Experience in using JTAG interfaces and tools for debugging SOC/silicon design issues Scripting languages such as Python, shell scripting etc. Desired Skills Exposure to SoC architecture paradigms " interconnects, power management, emulation(pre-Si) environment Exposure to working on emulation/pre-si environment is added advantage Experience working with boot code for ARM processors Knowledge of Operating systems/RTOS/Linux kernel internals, multithreading, scheduling policies/locking mechanism, Virtual memory/MMU/paging etc Software development for silicon enablement, silicon validation, design issue debugs Board Bring-up/Bring-up of hardware-software solution on FPGA/emulation platforms and on fresh SOC designs Exposure to build automationExperience with build automations tools such as Jenkins and experience in creating automated build pipelines to stream line the development process Exposure to Regression testingUnderstanding of the regression testing methodologies and tools. Ability to design, implement and execute comprehensive regression test suites to ensure software quality and stability Code ReviewsAbility to conduct thorough and constructive code reviews to maintain code quality, ensure best practices and identify the areas of improvements