17 Uvm Methodology Jobs

As an experienced Functional Formal Verification Engineer, you will be leading the formal verification efforts for complex digital designs. You will play a critical role in ensuring the quality and reliability of our digital designs. **Key Responsibilities:** - Lead complete formal verification for single or multiple design blocks and IPs, including developing and implementing formal verification strategies and test plans. - Create comprehensive formal verification test plans and specifications to ensure thorough coverage of design functionality. - Prove design properties, identify bugs, and collaborate with design teams to improve micro-architectures and ensure design correctness. - Craft innovative solutions for verifying complex design architectures, including developing re-usable and optimized formal models and verification code bases. - Mentor junior team members and provide technical leadership in formal verification methodologies, including training and guidance on industry-standard tools and techniques. - Collaborate with cross-functional teams, including design and verification, to ensure seamless integration of formal verification into the overall verification flow. **Qualifications:** - Bachelor's or Master's degree in Electrical/Electronics Engineering, Computer Engineering, or a related field. - 10+ years of experience in formal verification of complex IP/SubSystem/SoCs, with a strong understanding of digital logic design and verification techniques. - Expertise in formal verification tools and property specification languages (e.g., SVA, PSL), as well as proficiency in HDLs such as System Verilog, Verilog, or VHDL. - Experience with industry-standard EDA formal tools. - Experience with scripting languages (e.g., Python, Tcl, Perl) and programming languages such as C/C++/SystemC. - Excellent problem-solving and analytical skills, with the ability to debug complex issues and optimize verification performance. - Strong communication and interpersonal abilities, with experience working in a team environment and collaborating with cross-functional teams. - Proven track record in technical leadership and mentoring, with experience guiding junior engineers and contributing to the development of formal verification methodologies. The company is looking for someone with experience in CPU, GPU, or other complex digital architectures, including knowledge of industry-standard protocols (e.g., AXI, CHI, PCIe). Familiarity with UVM methodology and/or other simulation-based verification methodologies is preferred. Additionally, expertise in Jasper or VC Formal products is highly desirable.,

As a Lead Product Engineer at Cadence, you will have the exciting opportunity to work on cutting-edge technology in an environment that fosters creativity, innovation, and impact. Cadence is a pivotal leader in electronic design, leveraging over 30 years of computational software expertise to deliver software, hardware, and IP solutions that bring design concepts to life. You will be part of a dynamic team working with the world's most innovative companies across various market applications, including consumer electronics, hyperscale computing, 5G communications, automotive, aerospace, industrial, and health sectors. **Key Responsibilities:** - Lead projects with high resource, risk, and complexity, driving the development and success of products and technologies. - Develop and drive large cross-functional programs with a focus on accelerating VIP portfolio adoption at top-tier customers by providing pre-sales technical support. - Be an expert in MIPI domain of Verification IP family, understanding protocols and products to support customer design and verification flows. - Collaborate with R&D, Marketing, and support teams to ensure alignment across all dimensions of the product. - Translate customer requirements into technical specifications and drive product definition that meets customer needs. - Conduct product knowledge transfer sessions, provide training, and develop collaterals for field engineers and customers. - Manage issue resolution with vendors to ensure product quality and functionality, influencing vendor roadmap and product direction. **Qualifications Required:** - 7+ to 12 years of experience in Verification and Design, with a strong background in MIPI (CSI2/DSI/I3C/PHY) protocols. - Proficiency in developing Verification environments using System Verilog and working with the UVM methodology. - Strong problem-solving and debugging skills, with the ability to analyze complex situations and data effectively. - Excellent written, verbal, and presentation skills to communicate complex ideas and persuade stakeholders. - Ability to establish close working relationships with customers and internal teams, operating with integrity and pushing for continuous improvement. - Willingness to travel approximately 20% of the time to engage with customers and support product adoption. At Cadence, you will join a diverse team of passionate individuals dedicated to delivering exceptional electronic products and solutions. The unique One Cadence - One Team culture promotes collaboration and success, providing multiple avenues for learning and development tailored to your interests. You will have the opportunity to make a significant impact while working in an employee-friendly environment that prioritizes your well-being, career growth, and success. Join us in solving challenges and creating solutions that matter in the world of technology.,

At MediaTek, you are driven by a relentless pursuit of excellence, leading the way in performance and innovation across diverse industry sectors. From groundbreaking advancements in mobile, automotive, consumer, and industrial devices to transformative breakthroughs in datacenter computing, MediaTek is on a journey to redefine what is possible. You are not only re-imagining the future; you are creating it. Come be a part of it. Join our team of exceptionally talented professionals at our Bangalore design center, where we are pioneering cutting-edge technologies that will power the next generation of smartphone chips, IoT and automotive devices, and edge computing solutions. Be a part of MediaTek and help shape the future of technology. Job Description: System Cache Verification Engineer (3+ Years Experience) The Role: System Cache Verification Engineer (3+ Years Experience) We are seeking experienced Design Verification Engineers with 3+ years of experience, specifically in IP and subsystem verification, to join our highly talented verification team at MediaTek Bangalore. You need to have a strong background in computer architecture, with some experience in verifying caches, TLBs, load-store units, on-die memories, or coherency verification. Your experience should include verification methodologies, test planning, testbench design, and coverage closure. You must have strong System Verilog programming skills and experience with UVM methodology. Experience with OOPs programming is a plus. You should possess excellent problem-solving skills and the ability to work collaboratively in a fast-paced environment spanning geographies. Senior candidates with experience in leading teams will be considered for higher roles. Key Responsibilities: - Develop and implement comprehensive verification test plans for IP blocks and subsystems. - Create and/or enhance testbenches, test cases, and verification flows using System Verilog and UVM methodology. - Drive functional verification of RTL designs at IP level and Sub System level, including simulation, debugging, and coverage closure, ensuring high-quality and robust designs. - Collaborate with design engineers to understand detailed design specifications and target corner cases at IP and subsystem levels. - Generate and analyze verification metrics to regularly track progress and ensure timely coverage closure. - Participate in design and verification reviews, providing technical expertise and insights. - Incorporate newer verification techniques and methodologies to improve verification efficiency and effectiveness. - Mentor junior verification engineers and provide technical guidance. Qualifications & Experience: - Bachelor's or Master's degree in Electrical/Electronics Engineering, Computer Engineering, or related fields from an institute of repute. - 3+ years of experience in design verification, with a focus on IP and subsystem verification. Candidates with higher experience will be considered for senior roles. - Proficiency in verification languages and methodologies, such as SystemVerilog, UVM, and other industry-standard tools. Experience with OOPs programming is a plus. - Experience with scripting languages (e.g., Python, Perl, Tcl) for automation and tool integration. - Experience in AMBA protocols is an advantage. - Excellent problem-solving skills and attention to detail. - Need to have strong oral and written communication skills, with an ability to work as a team player in a fast-paced collaborative environment. - Proven track record of successfully verifying complex IP blocks and subsystems. Must Have: - Strong background in computer architecture, with experience in verifying either caches, TLBs, load-store units, on-die memories, or coherency verification.,

At Cadence, we are dedicated to hiring and nurturing leaders and innovators who aspire to create a significant impact on the realm of technology. We are currently looking for a Lead Product Engineer to join our team in either Bangalore or Ahmedabad. Cadence is recognized as a pivotal figure in electronic design, leveraging over three decades of computational software proficiency. Our company is committed to applying the Intelligent System Design strategy to provide software, hardware, and IP solutions that transform design concepts into tangible products. Our clientele comprises some of the most forward-thinking companies globally, delivering exceptional electronic products across various dynamic market sectors such as consumer electronics, hyperscale computing, 5G communications, automotive, aerospace, industrial, and health industries. The Cadence Advantage: - The opportunity to engage with cutting-edge technology in an environment that fosters creativity, innovation, and meaningful impact. - Our employee-centric policies prioritize the physical and mental well-being of our workforce, career advancement, learning opportunities, and the celebration of accomplishments to meet individual employee needs. - The distinct One Cadence - One Team culture promotes collaboration within and among teams to ensure customer success. - Various avenues for learning and development are available for employees to explore based on their unique requirements and interests. - Join a diverse team of passionate, dedicated, and skilled individuals who consistently go above and beyond for our customers, communities, and each other. As a Lead Product Engineer, you will be responsible for driving the development of products and technologies, with a significant role in ensuring the success of these products. The role of a VIP PE necessitates expertise in the MIPI domain of the Verification IP family, encompassing protocols and products. You will play a crucial role in accelerating the adoption of the VIP portfolio among Cadence's top-tier clients by offering pre-sales technical support. Strong verification expertise and a comprehensive understanding of customer design and verification processes are essential. Additionally, as an expert in MIPI VIP and protocols, you will be responsible for sharing product knowledge with field engineers and customers through training and collateral development. The role also entails translating high-level customer requirements into technical specifications and steering product definitions that align with customer needs. Collaboration with various team members (R&D, Marketing, support) is essential to ensure product alignment. This role typically requires an average of 20% travel. Key Responsibilities: - Lead projects with substantial resources, risks, and complexities. - Develop and oversee large, cross-functional programs with high resource requirements and risks. - Continually evaluate the effectiveness and data interoperability of complex systems. - Manage issue resolution with vendors regarding tech/product quality and functionality, influencing vendor roadmaps and product directions. - Communicate complex ideas effectively, anticipate objections, and persuade stakeholders, often at senior levels, to consider alternative perspectives. Experience and Technical Skills Required: - 7 to 12 years of experience in Verification and Design. - Proficiency in MIPI (CSI2/DSI/I3C/PHY) protocols is essential. - Experience in developing Verification environments using System Verilog. - Familiarity with the UVM methodology. - Strong problem-solving and debugging skills. Behavioral Skills Required: - Strong written, verbal, and presentation skills. - Ability to establish close working relationships with customers and management. - Willingness to explore innovative solutions and think outside the box to achieve objectives. - Effective collaboration across functions and geographies. - Commitment to raising the bar while maintaining integrity. If you are seeking an opportunity to work on meaningful projects that challenge the status quo, we invite you to join us at Cadence and contribute to solving problems that others may find insurmountable.,

You are a passionate and experienced Design Verification Engineer with a minimum of 6 years of experience in pre-silicon verification. Your expertise includes strong hands-on experience with SystemVerilog, UVM methodology, and a solid understanding of SoC/IP-level verification flows. In this role, you will collaborate closely with design, architecture, and post-silicon teams to ensure high-quality and robust product delivery. Your key responsibilities will include developing testbenches, test cases, and verification components using SystemVerilog and UVM. You will create and execute detailed verification plans based on design and architecture specifications, driving constrained-random verification, coverage closure, and debugging failures. Collaboration with RTL, DFT, and Firmware teams will be essential to debug issues and ensure seamless integration. Building reusable, scalable, and modular verification environments, analyzing code coverage, functional coverage, and providing feedback for design improvements will also be part of your role. You will also participate in code reviews, test plan reviews, and contribute to process improvements. As a mandatory requirement, you must have 6+ years of experience in ASIC/IP/SoC verification and good knowledge of verification flows. Experience in developing testbenches for block level, IP level, or SOC level verification, and working with complex test-bench/models in Verilog, SystemVerilog, or SystemC is essential. Proficiency in SystemVerilog, UVM, testbench architecture, and strong knowledge of AMBA protocols (AXI, AHB, APB) is required. Hands-on experience with simulation tools such as VCS, Questa, XSIM, familiarity with debug tools like Verdi, DVE, and waveform analysis is necessary. You should have a solid understanding of functional coverage, assertions, scoreboarding, and experience in writing automation scripts using Python/Perl/TCL. The qualifications required for this role include a B.E./B.Tech or M.E./M.Tech in Electronics. TekWissen Group is an equal opportunity employer supporting workforce diversity.,

You are an Experienced Design Verification Engineer with a minimum of 6 years in pre-silicon verification. You have strong hands-on experience with SystemVerilog, UVM methodology, and a solid understanding of SoC/IP-level verification flows. Your role involves working closely with design, architecture, and post-silicon teams to ensure high-quality and robust product delivery. Your key responsibilities include developing testbenches, testcases, and verification components using SystemVerilog and UVM, creating and executing detailed verification plans based on design and architecture specifications, driving constrained-random verification, coverage closure, and debug failures, collaborating with RTL, DFT, and Firmware teams to debug issues and ensure seamless integration, building reusable, scalable, and modular verification environments, analyzing code coverage, functional coverage, and providing meaningful feedback for design improvements, performing assertion-based verification, and supporting formal verification where required. You will also participate in code reviews, test plan reviews, and contribute to process improvements. You should have a B.E./B.Tech or M.E./M.Tech in Electronics with 6+ years of experience in ASIC/IP/SoC verification. It is essential to have good knowledge of the verification flows, experience developing testbenches for block level or IP level or SOC Level verification, working in complex test-bench/model in Verilog, System Verilog, or SystemC, developing and maintaining block level test benches, proficiency in SystemVerilog, UVM, and testbench architecture, strong knowledge of AMBA protocols (AXI, AHB, APB), hands-on experience with simulation tools (VCS, Questa, XSIM, etc.), familiarity with debug tools (Verdi, DVE) and waveform analysis, solid understanding of functional coverage, assertions, and scoreboarding, and experience in writing automation scripts using Python/Perl/TCL. TekWissen Group is an equal opportunity employer supporting workforce diversity.,

We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content Join us to transform the future through continuous technological innovation, You Are: As an experienced Verification Engineer, you are passionate about ensuring the highest standards of quality in complex system designs With over a decade of experience in IP verification, you bring a deep understanding of verification methodologies and the intricacies of hardware design You are adept at designing self-checking test benches using modern verification techniques, and you excel in developing verification components such as bus functional models, monitors, and behavioral models Your expertise in implementing functional coverage and assertions using System Verilog is unmatched You are a problem-solver who thrives in debugging simulation failures and analyzing functional coverage results Your strong Verilog coding skills, combined with your prowess in C/C++ or Python scripting, make you a valuable asset to any team You are a fast learner, comfortable and confident interacting with architects, and you possess excellent written and verbal communication skills, What Youll Be Doing: Designing and implementing self-checking test benches using modern verification techniques, Developing verification components such as bus functional models, monitors, and behavioral models, Implementing functional coverage and assertions using System Verilog, Creating and executing test and functional coverage plans based on device specifications, Analyzing and debugging simulation failures to identify root causes, Evaluating functional coverage results to ensure thorough verification, The Impact You Will Have: Ensuring the highest quality of IP verification, contributing to the reliability and performance of cutting-edge technology, Enhancing the efficiency of the verification process through innovative test bench designs, Contributing to the development of high-performance silicon chips that power a wide range of applications, Supporting the continuous improvement of verification methodologies and best practices, Collaborating with cross-functional teams to achieve project milestones and deliverables, Mentoring and guiding junior engineers, fostering a culture of knowledge sharing and continuous learning, What Youll Need: Tech/M Proficiency in Verilog and System Verilog for test bench development, Experience with object-oriented verification languages like SV, UVM, Strong debugging skills and experience with industry-standard simulation tools such as Synopsys VCS, Verdi, Knowledge of FPGA architectures and experience in DDR IP verification, Who You Are: A fast learner with the ability to quickly adapt to new technologies and methodologies, An excellent communicator with strong written and verbal communication skills, A team player who collaborates effectively with cross-functional teams, An analytical thinker with strong problem-solving skills, A mentor who enjoys sharing knowledge and guiding junior engineers, The Team Youll Be A Part Of: You will be joining a dynamic team of highly skilled verification engineers who are dedicated to ensuring the highest standards of quality in IP verification The team focuses on innovative verification methodologies and collaborates closely with architects and designers to deliver high-performance silicon chips Together, you will work on cutting-edge projects that drive technological advancements in various industries, Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs Our total rewards include both monetary and non-monetary offerings Your recruiter will provide more details about the salary range and benefits during the hiring process,

As a Lead Product Engineer at Cadence, you will drive the development of cutting-edge products and technologies in the UCIe domain of Verification IP family. You will play a pivotal role in accelerating the VIP portfolio adoption at Cadence's top tier customers by providing expert support in pre-sales technical activities. Your responsibilities will include translating high-level requirements from customers into technical specifications, developing product definitions that align with customer needs, and ensuring successful product knowledge transfer across field engineers and customers. To excel in this role, you must have a solid background with at least 5 to 8 years of experience in Verification and Design. Working knowledge of the UCIe domain and functional verification, experience in developing verification environments using System Verilog, and familiarity with the UVM methodology are essential. Strong problem-solving and debugging skills are a must, as you will be required to analyze complex situations and data to drive product success. Your qualifications should include a BE/BTech/ME/MS/MTech degree in Electrical, Electronics, Computer Science, or equivalent field. In addition to technical expertise, you must possess excellent written, verbal, and presentation skills to establish effective working relationships with customers and internal stakeholders. Your ability to think creatively, work collaboratively across functions and geographies, and maintain integrity while striving for excellence will be key to your success in this role. Join us at Cadence, where you will have the opportunity to work with a diverse team of passionate and talented individuals dedicated to making a positive impact on the world of technology. Be part of our innovative culture that values creativity, collaboration, and continuous learning. We are committed to supporting your physical and mental well-being, career development, and success, and we celebrate achievements that recognize the unique needs of our employees. At Cadence, we are solving challenges that others can't. Come be a part of our team and help us make a difference.,

As a Lead Product Engineer at Cadence, you will be driving the development of cutting-edge products and technologies in the UCIe domain of Verification IP family. With a primary responsibility for the success of the product/technology, you will play a crucial role in accelerating the VIP portfolio adoption at our top-tier customers by providing expert support in pre-sales technical activities. Your role will involve leveraging your strong verification expertise to understand customer design and verification flows, translating high-level requirements into technical specifications, and driving product definitions that align with customer needs. In this role, you will be expected to be an expert in UCIe domain and protocol, with working knowledge and experience in developing verification environments using System Verilog. Your experience with the UVM methodology and problem-solving skills will be essential in solving complex problems and ensuring the alignment of all dimensions of the product. Collaboration with cross-functional teams such as R&D, Marketing, and support will be crucial to ensure the success of the product. The role of Lead Product Engineer requires approximately 20% travel on average, offering you the opportunity to work with a diverse team of passionate and talented individuals. Cadence's employee-friendly policies focus on your physical and mental well-being, career development, learning opportunities, and celebrating success, ensuring a supportive and collaborative work environment that promotes innovation and creativity. To qualify for this role, you should have at least 5 to 8 years of experience in Verification and Design, along with a BE/BTech/ME/MS/MTech degree in Electrical/Electronics/Computer Science or equivalent. Strong written, verbal, and presentation skills are essential, along with the ability to establish close working relationships with customers and management. Your willingness to explore unconventional solutions, work effectively across functions and geographies, and strive for excellence while operating with integrity will be key to your success in this role. Join us at Cadence and be part of a team that is dedicated to making an impact in the world of technology. Your contributions will help us solve challenges that others can't, driving innovation and success for our customers, communities, and each other every day.,

As a Design Verification Engineer with over 5 years of experience, particularly in HBM & DDR DRAM IP and Subsystem verification, you will be an integral part of our innovative team. Your role will involve developing and executing verification plans, creating testbenches, and collaborating with design engineers to ensure high-quality and robust designs. Your responsibilities will include developing comprehensive verification plans for HBM4/4e IP and Subsystem, creating and maintaining testbenches using System Verilog and UVM methodology, performing functional verification of RTL designs, and resolving design and verification issues. You will also generate verification metrics, participate in design reviews, and stay updated with the latest verification technologies. To excel in this role, you should hold a Bachelor's or Master's degree in Electrical/Electronics Engineering or a related field, have 5+ years of experience in design verification, and possess knowledge of verification languages and methodologies. Proficiency in System Verilog, UVM, and scripting languages for automation is essential. Strong problem-solving skills, attention to detail, and effective communication and teamwork abilities are crucial for success in this position. Additionally, you will be expected to mentor junior verification engineers, provide technical guidance, and contribute to the continuous improvement of verification efficiency and effectiveness. Your proven track record of successfully verifying complex IP blocks and subsystems will be highly valued in this role.,

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Job Title: Lead Product Engineer Location: Bangalore Cadence is a pivotal leader in electronic design, building upon more than 30 years of computational software expertise. The company applies its underlying Intelligent System Design strategy to deliver software, hardware and IP that turn design concepts into reality. Cadence customers are the worlds most innovative companies, delivering extraordinary electronic products from chips to boards to systems for the most dynamic market applications including consumer, hyperscale computing, 5G communications, automotive, aerospace industrial and health. The Cadence Advantage The opportunity to work on cutting-edge technology in an environment that encourages you to be creative, innovative, and to make an impact. Cadences employee-friendly policies focus on the physical and mental well-being of employees, career development, providing opportunities for learning, and celebrating success in recognition of specific needs of the employees. The unique One Cadence One Team culture promotes collaboration within and across teams to ensure customer success Multiple avenues of learning and development available for employees to explore as per their specific requirement and interests You get to work with a diverse team of passionate, dedicated, and talented individuals who go above and beyond for our customers, our communities, and each otherevery day. Job Summary Drives development of products and technologies and has material responsibility for the success of that product/technology. VIP PE is expected to be an expert in UCIe domain of Verification IP family- protocol and product-wise. PE main role is to help accelerate VIP portfolio adoption at Cadences top tier customers by supporting pre-sales technical activities. To ensure that, one must have strong verification expertise and understand customer design and verification flows. As a UCIe VIP and protocol expert, PE drives product knowledge transfer across our field engineers and customer, providing training and developing collaterals. The PE will also need to translate high-level requirements from customers into a technical spec and drive the product definition that fits the customer needs. PE is expected to work independently and collaborate with other team members ( RnD, Marketing, support) to ensure all dimensions of the product are aligned. This role requires approximately 20% travel on average. Experience and Technical Skills required (edit as per the requirement): At least 5 to 8 years of experience with Verification and Design Working knowledge with UCIe domain and functional verification. Experience with Developing Verification environments using System Verilog Working knowledge and experience with the UVM methodology Good experience on solving complex problems where analysis of situations or data requires an in-depth evaluation of various factors. Excellent problem-solving and debugging skills Qualifications BE/BTech/ME/MS/MTech in Electrical/Electronics/Computer Science or equivalent Behavioral Skills Required Must possess strong written, verbal and presentation skills Ability to establish a close working relationship with both customer peers and management Explore whats possible to get the job done, including creative use of unconventional solutions Work effectively across functions and geographies Push to raise the bar while always operating with integrity Were doing work that matters. Help us solve what others cant. Show more Show less

As a Principal Engineer - ASIC Verification at Micron Technology, you will be an integral part of a highly skilled ASIC Team working on cutting-edge technology nodes. Your primary responsibility will be to lead the IP verification process, from creating test plans to achieving signoff. You will play a crucial role in ensuring the first-pass product through comprehensive verification coverage, including mixed-mode verification. Additionally, you will be involved in mentoring and coaching junior team members and collaborating with domain specialists globally on core technical initiatives. To excel in this role, you should possess a good understanding of DDR-PHY, LPDDR5/DDR4/5/HBM protocols and have experience in verifying complex high-speed PHY and/or AMS IPs. Your track record should demonstrate the ability to build test plans and UVM environments from scratch, as well as expertise in RTL debugging, scoreboarding, and code coverage analysis. Proficiency in System Verilog and UVM Methodology is essential, along with excellent written and verbal communication skills. This position requires a strong commitment to working in cross-functional and globally dispersed teams. Ideal candidates for this position will hold an M.S./M.Tech or BS/BE degree in Electronics and have at least 10 years of relevant experience. If you are passionate about pushing the boundaries of memory and storage solutions and thrive in a dynamic and innovative environment, Micron Technology offers a unique opportunity to be part of a global leader in the industry. Micron Technology, Inc. is dedicated to transforming the way information is used to enhance life for individuals worldwide. With a focus on customer satisfaction, technological leadership, and operational excellence, Micron delivers a diverse range of high-performance DRAM, NAND, and NOR memory and storage products under the Micron and Crucial brands. Our innovations power the data economy, driving advancements in artificial intelligence, 5G applications, and more from the data center to the intelligent edge. To explore career opportunities at Micron Technology, please visit micron.com/careers. For any assistance with the application process or to request reasonable accommodations, please contact hrsupport_in@micron.com. Micron Technology upholds a commitment to prohibiting the use of child labor and adheres to all relevant laws, regulations, and international labor standards within the industry.,

As a SOC Verification Engineer at Mirafra Technologies in Hyderabad, you will be responsible for performing System-level RTL verification, including FWHW coverification, SoC boot-flow, and integration-level validation. Your tasks will involve developing and verifying post-silicon validation sequences using C/C++, building and enhancing methodology-driven UVM testbenches, and collaborating on comprehensive test-plan development. You are expected to demonstrate solid expertise in Verilog, SystemVerilog, and C/C++, along with a strong working knowledge of the JTAG protocol. To excel in this role, you should have a strong background in SoC/Integration-level verification, ideally with UVM methodology. Hands-on experience in creating testplans, testbenches, and driving coverage closure is essential. Your proven skills in RTL coding and post-silicon validation, coupled with excellent debugging and collaboration capabilities, will be crucial for success in this position. By joining our team, you will have the opportunity to work on complex SoC designs and cutting-edge validation flows, shaping the future of SoC verification. Mirafra Technologies offers an innovative environment in Hyderabad that values expertise and creativity, allowing you to thrive and contribute to impactful projects. If you are passionate about SOC verification, have the required skills and experience, and are looking to join a dynamic team at the forefront of technology, we encourage you to apply. Feel free to share your CV at swarnamanjari@mirafra.com or tag and recommend this opportunity to individuals who match this profile. Join us at Mirafra Technologies and be part of a team that is driving innovation in SOC verification.,

As a Senior Design Verification Engineer, you will be responsible for designing and implementing UVM-based testbenches from scratch and playing a crucial role in the successful tapeouts of multiple projects. Your expertise in functional verification using SystemVerilog and UVM will be essential in owning verification deliverables end-to-end. Your experience should demonstrate a strong command over SystemVerilog and UVM methodology, coupled with a solid understanding of SoC/ASIC architecture and the verification lifecycle. You will be expected to write testbenches, develop stimulus, checkers, monitors, and scoreboards, and utilize simulation tools like VCS and Questa for debugging purposes. In addition, your familiarity with functional and code coverage, as well as Register Abstraction Layer (RAL) modeling and verification, will be vital in ensuring the quality and completeness of the verification process. Your excellent analytical and problem-solving skills will be put to the test as you work collaboratively within a team environment to achieve project goals. To qualify for this role, you must hold a B.E/B.Tech or M.E/M.Tech degree in Electronics, Electrical, or a related field, along with 4 to 10 years of relevant experience in ASIC/SoC design verification. A track record of contributing to at least three or more successful tapeouts will further strengthen your candidacy for this position.,

Job responsibilities: (edit as per the requirement) Leads projects with high resource, risk and/or complexity Develops and leads large and multiple cross-functional and cross-organizational programs, initiatives, and activities with high resource requirements, risk and/or complexity Continually evaluates technology effectiveness/data interoperability of complex systems Manages issue resolution with vendors on tech/product quality and functionality and influences vendor roadmap and direction of products Communicates highly-complex ideas, anticipates potential objections and persuades others, often at senior levels, to adopt a different point of view. Experience and Technical Skills required (edit as per the requirement): At least 4+ to 8 years of experience with Verification and Design Working knowledge with Memory Models like DDR, HBM, LPDDR protocols is a must Experience with Developing Verification environments using System Verilog Working knowledge and experience with the UVM methodology Good experience on solving complex problems where analysis of situations or data requires an in-depth evaluation of various factors. Exercises judgment within broadly defined practices and policies in selecting methods, techniques, and evaluation criteria for obtaining results. Excellent problem-solving and debugging skills Qualifications BE/BTech/ME/MS/MTech in Electrical, Electronics Comm or Computer Science Engineering Behavioral skills required Must possess strong written, verbal and presentation skills Ability to establish a close working relationship with both customer peers and management Explore what s possible to get the job done, including creative use of unconventional solutions Work effectively across functions and geographies Push to raise the bar while always operating with integrity

Leads projects with high resource, risk and/or complexity Develops and leads large and multiple cross-functional and cross-organizational programs, initiatives, and activities with high resource requirements, risk and/or complexity Continually evaluates technology effectiveness/data interoperability of complex systems Manages issue resolution with vendors on tech/product quality and functionality and influences vendor roadmap and direction of products Communicates highly-complex ideas, anticipates potential objections and persuades others, often at senior levels, to adopt a different point of view. Experience and Technical Skills required (edit as per the requirement): At least 7+ to 12 years of experience with Verification and Design Working knowledge with Memory Models like DDR, HBM, LPDDR protocols is a must Experience with Developing Verification environments using System Verilog Working knowledge and experience with the UVM methodology Good experience on solving complex problems where analysis of situations or data requires an in-depth evaluation of various factors. Exercises judgment within broadly defined practices and policies in selecting methods, techniques, and evaluation criteria for obtaining results. Excellent problem-solving and debugging skills Qualifications BE/BTech/ME/MS/MTech in Electrical, Electronics Comm or Computer Science Engineering Behavioral skills required Must possess strong written, verbal and presentation skills Ability to establish a close working relationship with both customer peers and management Explore what s possible to get the job done, including creative use of unconventional solutions Work effectively across functions and geographies Push to raise the bar while always operating with integrity

You Are: A highly-skilled ASIC Digital Verification Engineer with a passion for developing functional verification solutions for RTL based IP Cores You are experienced in handling complex protocols and thrive in a collaborative international environment With over 15 years of experience, you possess a deep understanding of verification methodologies and are proficient in SystemVerilog (SV) and Universal Verification Methodology (UVM) You are adept at making architectural decisions, implementing test benches, and driving innovation in verification solutions You are a proactive team player with excellent communication and problem-solving skills, ready to contribute to cutting-edge projects in AI/machine learning, automotive, and server farm applications What Youll Be Doing: Making architecture decisions on test bench design Writing verification plans and specifications Implementing test bench infrastructure and writing test cases Utilizing a coverage-driven methodology Providing technical leadership and guidance to the team Collaborating with architects, designers, and other verification team members across multiple sites worldwide The Impact You Will Have: Ensuring the reliability and performance of IP Cores used in critical applications Driving innovation in verification methodologies and solutions Contributing to the development of industry-leading technologies in AI, automotive, and server farms Enhancing productivity and throughput through effective verification strategies Maintaining high standards of quality and functionality in IP verification Mentoring and guiding junior engineers, fostering a culture of continuous learning and improvement What Youll Need: Extensive knowledge of protocols such as DDR, PCIe, AMBA (AXI, CHI), SD/eMMC, Ethernet, USB, MIPI Hands-on experience in creating test environments from functional specifications using UVM/VMM/OVM Proficiency in SystemVerilog (SV), UVM, and object-oriented coding and verification Ability to provide innovative verification solutions for enhanced productivity and performance Experience with scripting languages like C/C++, TCL, Perl, Python is an added advantage Experience of working with Functional safety, ISO26262 , FMEDA is an added advantage Who You Are: You are an independent thinker with a precise approach to work, capable of driving innovation and leading technical projects Your communication skills are excellent, and you thrive in a team-oriented environment You are committed to continuous learning and possess a strong problem-solving aptitude Experience with functional safety standards like ISO26262 and FMEDA is a plus The Team Youll Be A Part Of: You will be part of the Solutions Group at our Bangalore Design Center, India This team is dedicated to developing functional verification solutions for IP used in diverse applications, including server farms, AI/machine learning, and automotive sectors You will work closely with architects, designers, and other verification team members across multiple international sites, contributing to innovative and challenging projects Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs Our total rewards include both monetary and non-monetary offerings Your recruiter will provide more details about the salary range and benefits during the hiring process