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Technophilic Private Limited
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AMS Verification Engineer

AMS Verification Engineer

Technophilic Private Limited

0 years

|

0 Lacs

bengaluru karnataka india

Posted:1 day ago| Platform: Foundit logo

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Skills Required

gate level netlist simulation vhdl-ams ams verification environment uvm methodologies

Work Mode

On-site

Job Type

Full Time

Job Description

Responsibilities

Verification of Mixed-Signal designs at chip and module level.
Analog/Mixed-Signal self-checking simulation.
Implementation of analog models in Verilog-/VHDL-AMS to speed up AMS simulation.
Application of metric-driven Verification (MDV) methodologies.
Development and tracking of Verification plans.
Integration of Verification-IP.
Measurement and analysis of regression results.
Cooperate on evaluation of silicon, test correlation, and scripting (Perl, Python, C++).
Work with verification team on verification plans, test cases, and analyzing test results .
Very good experience in Verilog AMS , Verilog-A, WREAL, modelling of analog blocks.
Very good experience in analog mixed signal simulation tools .
Good experience in System Verilog, UVM methodologies.
Good experience in creating AMS Verification environment and able to create AMS Verification environment from scratch.
Good experience in Gate level netlist simulation.
Experience in Python, Perl, Shell scripting is desirable .

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Technophilic Private Limited

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