2315 Verilog Jobs - Page 19

Role Purpose The purpose of this role is to perform the development of VLSI system by defining the various functionalities, architecture, layout and implementation for a client Do 1. Conduct verification of the module/ IP functionality and provide customer support a. Understand the architecture of the module or the IP and create verification environment and the development plan as per Universal Verification Methodology b. Create test bench development and test case coding of the one or multiple module c. Write the codes or check the code as required d. Execute the test cases and debug the test cases if required e. Conduct functional coverage analysis and document the test cases including failures and debugging procedures on SharePoint/ JIRA or any other platform as directed f. Test the entire IP functionality under regression testing and complete the documentation to publish to client g. Troubleshoot, debug and upgrade existing systems on time & with minimum latency and maximum efficiency h. Write scripts for the IP i. Comply with project plans and industry standards 2. Ensure reporting & documentation for the client a. Ensure weekly, monthly status reports for the clients as per requirements b. Maintain documents and create a repository of all design changes, recommendations etc c. Maintain time-sheets for the clients d. Providing written knowledge transfer/ history of the project Mandatory Skills: VLSI Board Design. Experience: 3-5 Years. >

Role Purpose The purpose of this role is to perform the development of VLSI system by defining the various functionalities, architecture, layout and implementation for a client Do 1. Conduct verification of the module/ IP functionality and provide customer support a. Understand the architecture of the module or the IP and create verification environment and the development plan as per Universal Verification Methodology b. Create test bench development and test case coding of the one or multiple module c. Write the codes or check the code as required d. Execute the test cases and debug the test cases if required e. Conduct functional coverage analysis and document the test cases including failures and debugging procedures on SharePoint/ JIRA or any other platform as directed f. Test the entire IP functionality under regression testing and complete the documentation to publish to client g. Troubleshoot, debug and upgrade existing systems on time & with minimum latency and maximum efficiency h. Write scripts for the IP i. Comply with project plans and industry standards 2. Ensure reporting & documentation for the client a. Ensure weekly, monthly status reports for the clients as per requirements b. Maintain documents and create a repository of all design changes, recommendations etc c. Maintain time-sheets for the clients d. Providing written knowledge transfer/ history of the project Mandatory Skills: Analog Layout. Experience: 1-3 Years. >

Role Purpose The purpose of this role is to perform the development of VLSI system by defining the various functionalities, architecture, layout and implementation for a client Do 1. Conduct verification of the module/ IP functionality and provide customer support a. Understand the architecture of the module or the IP and create verification environment and the development plan as per Universal Verification Methodology b. Create test bench development and test case coding of the one or multiple module c. Write the codes or check the code as required d. Execute the test cases and debug the test cases if required e. Conduct functional coverage analysis and document the test cases including failures and debugging procedures on SharePoint/ JIRA or any other platform as directed f. Test the entire IP functionality under regression testing and complete the documentation to publish to client g. Troubleshoot, debug and upgrade existing systems on time & with minimum latency and maximum efficiency h. Write scripts for the IP i. Comply with project plans and industry standards 2. Ensure reporting & documentation for the client a. Ensure weekly, monthly status reports for the clients as per requirements b. Maintain documents and create a repository of all design changes, recommendations etc c. Maintain time-sheets for the clients d. Providing written knowledge transfer/ history of the project Mandatory Skills: Mechanical Part design. Experience: 3-5 Years.

: 6 to 8 years of Semiconductor industry experience in Custom Mixed-Signal layout design with a bachelors degree in electrical/Electronic Engineering. Able to deliver Custom analog layouts independently from schematic to layout generation, estimating the area, optimizing floorplan, routing, and complete verification flows. Firsthand experience in critical analog layout design blocks such as Temperature sensor, Serdes, PLL, ADC, DAC, LDO, Bandgap, Ref Generators, Charge Pump, Current Mirrors, Comparator, Differential Amplifier etc. Good at LVS/DRC debugging skills and other verifications for lower technology nodes - 14nm FinFet and below. Good understanding of Matching, EM, ESD, Latch-Up, Shielding, Parasitic and short channel concepts. Familiar with EDA tools like Cadence VLE/VXL, PVS, Assura and Calibre DRC/ LVS is necessary. Understanding layout effects on the circuit such as speed, capacitance, power, and area etc. Ability to understand design constraints and implement high-quality layouts. Multiple Tape out support experience and collaborating with cross functional teams will be an added advantage. Good people skills and critical thinking abilities to resolve the issue technically and professionally. Excellent communication. Responsible for timely execution with high quality of layout design. Multiple foundries experience is an added plus. Minimum Educational Qualification : Educational Bachelor"s, Electrical or Electronics Engineering or equivalent Role And Responsibilities Responsible for Design and development of critical analog, mixed-signal, custom digital block and full chip level integration support. Perform layout verification like LVS/DRC/Antenna, EM, quality check and documentation. Responsible for on-time delivery of block-level/top-level layouts with acceptable quality. Demonstrate leadership Skill in planning, area/time estimation, scheduling, delegation and execution to meet project schedule/milestones in multiple project environment. Guide junior team-members in their execution of Sub block-level layouts & review their work Should have good experience in working with cross-functional team. Ensure standard processes and procedures are followed to resolve all client queries. Handle technical escalations through effective diagnosis and troubleshooting of client queries Manage and resolve technical roadblocks/ escalations to timely deliverable with high quality. Troubleshoot all client queries in a user-friendly, courteous, and professional manner. Offer alternative solutions to clients (where appropriate) with the objective of retaining customers" and clients" business. Build people capability to ensure operational excellence and maintain superior customer service levels of the existing account/client. Contribute to effective project-management. Effectively communicating with engineering teams in different Geographical locations to assure the success of the layout project. Works in the area of Software Engineering, which encompasses the development, maintenance and optimization of software solutions/applications.1. Applies scientific methods to analyse and solve software engineering problems.2. He/she is responsible for the development and application of software engineering practice and knowledge, in research, design, development and maintenance.3. His/her work requires the exercise of original thought and judgement and the ability to supervise the technical and administrative work of other software engineers.4. The software engineer builds skills and expertise of his/her software engineering discipline to reach standard software engineer skills expectations for the applicable role, as defined in Professional Communities.5. The software engineer collaborates and acts as team player with other software engineers and stakeholders.

Eligibility : B.Tech/ M.Sc/ M.tech (Life Sciences / Biotechnology) Required Skills : Good Knowledge of Biotech/ Life Science Techniques Basic knowledge of MS Office English (Reading and Writing) Candidate must have a personal Laptop Job description : 1) A regular visit to Universities/Colleges in various cities to promote our services and collect the samples. 2) Here is the work to do in visit may be allotted to you as your work Profile a. Collection of data b. Maintenance of record of query c. Preparation of quotation (If required) d. Collection of samples 3) Each candidate will be allotted an entire state to visit and manage. 4) These states may be Madhya Pradesh, Uttarakhand, Jharkhand, Bihar, Chhattisgarh West Bengal. 5) Working Location will be decided from time to time after discussion with us

Responsible for whole FPGA design flow Responsible for finalization of Micro architectures Responsible for RTL design

Company Description Sri Shakthi Institute of Engineering and Technology (SSIET), founded in 2006 by Dr. S. Thangavelu, is dedicated to imparting character-building education and productive life skills. The institution has collaborated with notable global universities and industries such as CISCO, ORACLE, SIEMENS, Infosys, and WIPRO. Recognized by the TIMES Group as one of the 40 Centers for Excellence in Education in Tamilnadu, SSIET is also a member of IESA, NASSCOM, IEEE, and ICTACT. Leading firms such as Accenture, TCS, Oracle, and Verizon are among our esteemed recruiters. Role Description This is a full-time on-site role based in Tiruchirappalli for a Technical Trainer. The Technical Trainer will be responsible for planning and delivering technical training programs, developing instructional materials, and assessing trainees' progress. Daily tasks include conducting training sessions, preparing training content, and collaborating with other departments to identify training needs. The role also involves staying updated with the latest industry trends and technologies to ensure training relevance and quality.Hiring is happening for all four roles. Qualifications Experience as a Technical Trainer, including Technical Training skills Proficiency in Training & Development, including creating training materials and programs Excellent Communication and presentation skills for effective training delivery Ability to assess training needs, evaluate training effectiveness, and implement improvements Strong organizational and time management skills Relevant certifications or qualifications in training, such as a Bachelor's degree in a related field Experience in the engineering or technology sector is a plus Skills required: 1.MERN Stack Trainer HTML, CSS, JavaScript (ES6+) React.js (Hooks, State Management, Routing) Node.js and Express.js MongoDB (CRUD, Aggregation, Mongoose) RESTful API development Git and GitHub Deployment tools (Heroku, Vercel, Netlify) Basic understanding of authentication (JWT/OAuth) 2.DevOps Trainer Git, GitHub, GitLab Jenkins (CI/CD pipelines) Docker (containerization) Kubernetes (basic orchestration) Linux fundamentals and Bash scripting Cloud platforms (AWS/Azure/GCP basics) Infrastructure as Code (Terraform, Ansible – optional) Monitoring tools (Prometheus, Grafana – optional) 3.Cloud Trainer Cloud concepts (IaaS, PaaS, SaaS, Public/Private/Hybrid Cloud) AWS core services (EC2, S3, IAM, RDS, Lambda, VPC) Azure or GCP basics (VMs, Storage, App Services) IAM (Identity and Access Management) Basic networking and virtualization Cloud CLI tools & SDKs DevOps integration in cloud (CI/CD pipelines) Basic scripting (Bash, PowerShell or Python – optional) 4.VLSI Trainer Digital electronics and logic design Verilog and/or VHDL RTL design and simulation FPGA programming (Xilinx/Vivado, Altera/Quartus) EDA tools (ModelSim, Synopsys, Cadence) Synthesis and Timing Analysis ASIC/FPGA design flow Basic scripting (TCL, Shell – optional) minimum 5 years of industry experience needed

Minimum qualifications: Bachelor’s degree in Electrical Engineering or Computer Engineering, or equivalent practical experience. 15 years of experience in ASIC RTL design. Experience with RTL design using Verilog/System Verilog and microarchitecture. Experience with ARM-based SoCs, interconnects and ASIC methodology. Preferred qualifications: Master’s degree in Electrical Engineering or Computer Engineering. Experience driving multi-generational roadmap for IP development. Experience leading interconnect IP design team for low power SoCs. About The Job Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration. Google's mission is to organize the world's information and make it universally accessible and useful. Our Devices & Services team combines the best of Google AI, Software, and Hardware to create radically helpful experiences for users. We research, design, and develop new technologies and hardware to make our user's interaction with computing faster, seamless, and more powerful. Whether finding new ways to capture and sense the world around us, advancing form factors, or improving interaction methods, the Devices & Services team is making people's lives better through technology. Responsibilities Lead a team of people to deliver fabric interconnect design. Develop and refine RTL design to aim power, performance, area, and timing goals. Define details such as interface protocol, block diagram, data flow, pipelines, etc. Oversee RTL development, debug functional/performance simulations. Communicate and work with multi-disciplined and multi-site teams. Google is proud to be an equal opportunity workplace and is an affirmative action employer. We are committed to equal employment opportunity regardless of race, color, ancestry, religion, sex, national origin, sexual orientation, age, citizenship, marital status, disability, gender identity or Veteran status. We also consider qualified applicants regardless of criminal histories, consistent with legal requirements. See also Google's EEO Policy and EEO is the Law. If you have a disability or special need that requires accommodation, please let us know by completing our Accommodations for Applicants form .

Hiring Design Verification Engineers for Bangalore location. Exp: 5+ Years Company: Eximietas Design Job Area: Engineering Group, Engineering Group > Hardware Engineering. Eximietas: Eximietas Design is a leading technology consulting and solutions development firm specializing in the VLSI, Cloud Computing, Cyber Security, and AI/ML domains. Our success is anchored in the unparalleled expertise of our engineering leadership team, whose collective experience spans renowned tech giants like Google, Cisco, Microsoft, Oracle, Uber, Broadcom, and Sun. With a commitment to innovation and excellence, we deliver cutting edge solutions that empower businesses to thrive in the ever-evolving digital landscape. Minimum Qualifications: 5+ years of Design verification experience. Strong understanding of design concepts and ASIC flow Prior work experience on IP, Subsystem and Soc verification. Strong SV/UVM coding skills. Strong understanding of RAL Hands-on experience on third party VIP Integration. Strong solving , analytical and debugging skills. Strong understanding of AMBA protocols like generic AXI, APB, AHB Hands on verification experience in Low speed peripherals like, I2C, SPI, QSPI, DMA, Interrupt controller, GPIO, UART Hands on verification experience in any of the high-speed protocol like PCIE, CXL, Ethernet or USB Hands on experience in any of the memory protocols like DDR, LPDDR or HBM Hand on experience with verification tools such as VCS, Xcelium, Waveform analyzer and third-party VIP integration. Hands on experience with revision control flow like Git, SVN, Perforce Hands on experience withGLS and Power aware simulation (UPF) Experience in a team lead role, including guiding and mentoring team members, and ensuring effective collaboration and communication within the team. As a Senior verification engineer candidate will be responsible to work at IP, Subsystem or SoC verification related tasks. Responsibilities: Develop testbench components (Driver, Monitor, Scoreboard) from scratch or enhance an existing testbench for a given IP, Subsystem, or SOC. Understand design specifications and implementation to define the verification strategy. Create testbench micro-architecture, test plan, and coverage plan documents. Define the verification scope, develop test plans and tests, and establish the verification infrastructure to ensure design correctness. Implement SystemVerilog assertions and functional coverage. Analyze code coverage and address missing scenarios to meet coverage goals. Work with other verification team members to develop, execute, and analyze verification test cases and sequences, providing relevant solutions to issues. Collaborate with architects, designers, and pre- and post-silicon verification teams to meet deadlines. Coordinate with customer leads, ensuring all deliverables and timelines are met. Serve as the project's point of contact, responsible for verification signoff.

Vicharak is on the lookout for a passionate and dynamic Computer Science Intern who will play a pivotal role in the convergence of software and hardware, contributing to the development of cutting-edge technologies. This internship offers a unique opportunity to work on Vaaman, our revolutionary single board computer, and gain hands-on experience in software development, Linux kernel understanding, and hardware acceleration over FPGA. Responsibilities: Software Development: Collaborate with the software development team to design, implement, and optimize software solutions for Vaaman's diverse applications. Write clean, efficient, and well-documented code in languages such as C/C++ and other relevant programming languages. Linux Kernel Understanding: Gain insights into the Linux kernel architecture and contribute to kernel-level software components for Vaaman, ensuring seamless integration with the operating system. Hardware Acceleration Design: Work closely with hardware engineers to design and implement hardware acceleration solutions over FPGA, leveraging your understanding of computer architecture. Develop FPGA configurations to optimize performance for specific applications, contributing to the overall efficiency of Vaaman. Programming Languages: Utilize your proficiency in C/C++ and other programming languages to implement robust and efficient software solutions for Vaaman's diverse range of functionalities. Collaboration and Communication: Engage in cross-functional collaboration with software developers, hardware engineers, and other team members. Effectively communicate technical concepts and ideas within the team. Requirements: Currently pursuing a degree in Computer Science or related field. Strong programming skills in C/C++ and familiarity with other relevant languages. Understanding of Linux kernel architecture. Interest in hardware acceleration and FPGA development. Eagerness to learn and adapt to new technologies and challenges. Effective communication and teamwork skills. Preferred Qualifications: Previous experience with FPGA development tools and languages (Verilog, VHDL). Exposure to Linux kernel-level development. Familiarity with computer architecture concepts. Enthusiasm for exploring innovative solutions at the intersection of software and hardware.

Position: Electronics Engineer Location: Ahmedabad Employment Type: Full-time Job Responsibilities: Design and optimise low-noise analog front-end (AFE), low-noise, efficient DC-DC power supply circuits. Select and integrate high-resolution ADCs, precision op-amps, and mixed-signal conditioning circuits. Develop bias voltage circuits for detectors and minimize thermal drift. Perform PCB layout for low-noise analog systems (shielding, grounding, EMI/EMC mitigation). Collaborate with the FPGA team for sensor calibration and data acquisition. Required Skills & Experience: 5+ years in analog/mixed-signal design (preferably for sensors, imaging). Worked in ISRO is a plus Hands-on experience with: Low-noise pre-amplifiers, High-resolution ADCs, PCB design tools. DC-DC converters (isolated buck/boost), LDOs, and power sequencing,Thermal electric cooler (TEC) drivers, Thermal simulation tools, Low pass filters. Familiarity with thermal IR detectors (cooled/uncooled) is a big plus. Knowledge of thermal stability techniques. Education: B.Tech/M.Tech in Electronics Engineering or related field. Position: Embedded Systems Engineer – FPGA & Digital Design-2 nos(3+ Years Experience) Location: Ahmedabad Employment Type: Full-time Job Responsibilities: FPGA-Based Image Processing:Develop real-time algorithms for imager on FPGA (VHDL/Verilog). Optimise high-speed sensor interfaces (LVDS, SPI, parallel buses) for detectors. Implement data compression/streaming (GigE, USB3, or custom protocols). Microcontroller/Digital Electronics:Integrate microcontrollers (ARM Cortex, RISC-V) for system control. Design digital logic circuits (CPLDs, GPIO expanders) for peripheral interfacing. Collaborate on embedded firmware (C/C++) for real-time operation. System Integration:Bridge FPGA + MCU communication (AXI, SPI, UART). Debug mixed-signal PCB designs (oscilloscopes, logic analyzers). Signal Integrity. Required Skills & Experience: 3+ years in FPGA + Embedded Systems (imaging/sensor applications preferred). Proficient in VHDL/Verilog (Xilinx Zynq, Intel Cyclone, Lattice ECP5). Experience with high-speed serial protocols (LVDS, JESD204B, MIPI). Hands-on with ARM Cortex (STM32, NXP), RISC-V, or PIC MCUs. Familiarity with digital interfaces (I2C, SPI, UART, PWM). Education: B.Tech/M.Tech in ECE/Embedded Systems/Digital Electronics.

Principal Design Verification Engineer Bangalore, Karnataka, India + 2 more locations Date posted Jul 18, 2025 Job number 1848134 Work site Up to 50% work from home Travel 0-25 % Role type Individual Contributor Profession Hardware Engineering Discipline Silicon Engineering Employment type Full-Time Overview Microsoft Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) is the team behind Microsoft’s expanding Cloud Infrastructure and responsible for powering Microsoft’s “Intelligent Cloud” mission. SCHIE delivers the core infrastructure and foundational technologies for Microsoft's over 200 online businesses including Bing, MSN, Office 365, Xbox Live, Teams, OneDrive, and the Microsoft Azure platform globally with our server and data center infrastructure, security and compliance, operations, globalization, and manageability solutions. Our focus is on smart growth, high efficiency, and delivering a trusted experience to customers and partners worldwide and we are looking for passionate engineers to help achieve that mission. As Microsoft's cloud business continues to grow the ability to deploy new offerings and hardware infrastructure on time, in high volume with high quality and lowest cost is of paramount importance. To achieve this goal, the AI Silicon Engineering team is instrumental in defining and delivering operational measures of success for hardware manufacturing, improving the planning process, quality, delivery, scale and sustainability related to Microsoft cloud hardware. We are looking for seasoned engineers with a dedicated passion for customer focused solutions, insight and industry knowledge to envision and implement future technical solutions that will manage and optimize the Cloud infrastructure. We are looking for a Principal Design Verification Engineer to join the team. #SCHIE Qualifications Qualifications Bachelor’s degree in Electronics Engineering, Computer Engineering, Computer Science, or related field 12+ years' design verification experience with complex IPs and subsystems delivery Full-cycle IP/SOC verification experience: from definition to silicon, including DV environment architecture, effort estimation, test planning, test development, debugging, and coverage signoff Strong knowledge of verification principles, testbenches, stimulus generation, and UVM or C++ environments Extensive experience debugging RTL (Verilog) designs and working in simulation/emulation environments Additional or Preferred Qualifications : Familiarity with writing assertions and formal verification. Knowledge of networking protocols, such as RDMA and Ethernet. Exposure to post-silicon bring-up or debug of SoCs. Experience with scripting languages, including Python or Perl. Demonstrated skills in communication, collaboration, and teamwork, with the ability to work effectively in diverse and inclusive teams. Interest in or hands-on experience with deploying AI solutions. Ability to meet Microsoft, customer and/or government security screening requirements are required for this role. These requirements include but are not limited to the following specialized security screenings: Microsoft Cloud Background Check: This position will be required to pass the Microsoft Cloud Background Check upon hire/transfer and every two years thereafter. This role will require access to information that is controlled for export under export control regulations, potentially under the U.S. International Traffic in Arms Regulations or Export Administration Regulations, the EU Dual Use Regulation, and/or other export control regulations. As a condition of employment, the successful candidate will be required to provide either proof of their country of citizenship or proof of their US. residency or other protected status (e.g., under 8 U.S.C. 1324b(a)(3)) for assessment of eligibility to access the export-controlled information. To meet this legal requirement, and as a condition of employment, the successful candidate’s citizenship will be verified with a valid passport. Lawful permanent residents, refugees, and asylees may verify status using other documents, where applicable. Responsibilities Job responsibilities: The AISiE silicon team is seeking a qualified and motivated computer or electrical engineer to contribute to the development of high-quality designs. The team is responsible for producing advanced, custom IP and SoC designs that achieve complex, high-performance functions with exceptional efficiency. In this role you will: Lead design verification for complex IPs or subsystems. Work with architecture and design teams to meet all implementation goals. Create, review, and oversee test methodologies and execution. Build verification environments using constrained random stimulus and coverage metrics; run and debug simulations for quality. Drive and execute test plans for key features or products, setting and meeting coverage targets. Agile practices such as code reviews and sprint planning. Improve verification efficiency through new methods, processes, or tools. Provide technical leadership via mentorship, teamwork, and example. Uphold Microsoft values: Customer Focus, Adaptability, Collaboration, Growth Mindset, Results, Impact, Judgement, Diversity & Inclusion. Benefits/perks listed below may vary depending on the nature of your employment with Microsoft and the country where you work.  Industry leading healthcare  Educational resources  Discounts on products and services  Savings and investments  Maternity and paternity leave  Generous time away  Giving programs  Opportunities to network and connect Microsoft is an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to age, ancestry, citizenship, color, family or medical care leave, gender identity or expression, genetic information, immigration status, marital status, medical condition, national origin, physical or mental disability, political affiliation, protected veteran or military status, race, ethnicity, religion, sex (including pregnancy), sexual orientation, or any other characteristic protected by applicable local laws, regulations and ordinances. If you need assistance and/or a reasonable accommodation due to a disability during the application process, read more about requesting accommodations.

As a SOC Verification Engineer at Mirafra Technologies in Hyderabad, you will be responsible for performing System-level RTL verification, including FWHW coverification, SoC boot-flow, and integration-level validation. Your tasks will involve developing and verifying post-silicon validation sequences using C/C++, building and enhancing methodology-driven UVM testbenches, and collaborating on comprehensive test-plan development. You are expected to demonstrate solid expertise in Verilog, SystemVerilog, and C/C++, along with a strong working knowledge of the JTAG protocol. To excel in this role, you should have a strong background in SoC/Integration-level verification, ideally with UVM methodology. Hands-on experience in creating testplans, testbenches, and driving coverage closure is essential. Your proven skills in RTL coding and post-silicon validation, coupled with excellent debugging and collaboration capabilities, will be crucial for success in this position. By joining our team, you will have the opportunity to work on complex SoC designs and cutting-edge validation flows, shaping the future of SoC verification. Mirafra Technologies offers an innovative environment in Hyderabad that values expertise and creativity, allowing you to thrive and contribute to impactful projects. If you are passionate about SOC verification, have the required skills and experience, and are looking to join a dynamic team at the forefront of technology, we encourage you to apply. Feel free to share your CV at swarnamanjari@mirafra.com or tag and recommend this opportunity to individuals who match this profile. Join us at Mirafra Technologies and be part of a team that is driving innovation in SOC verification.,

The ideal candidate for this position at Qualcomm India Private Limited will utilize their knowledge and experience to offer leadership, technical guidance, and execute silicon validation of ARM or DSP based multiple SOC projects and platforms. The candidate should possess a strong understanding of digital design and SOC architecture, along with a good grasp of Object-Oriented Programming (OOP) concepts. Experience in Hardware Verification Languages (HVL) such as System Verilog, UVM/OVM, and System C, as well as Hardware Description Languages (HDL) like Verilog is required. Knowledge of ARM/DSP CPU architecture and High-Speed Peripherals such as USB2/3, PCIE, or Audio/Multimedia is essential. Additionally, familiarity with Power-aware Verification, GLS, Test vector generation, and Version managers like Clearcase/perforce is advantageous. Proficiency in scripting languages like Perl, Tcl, or Python is preferred. The candidate should possess strong analytical and debugging skills. Experience in Hifi Processor, Soundwire interface, ANC, DMA, I2S verification is considered a plus. Qualcomm is looking for candidates who hold a Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or a related field with at least 6 years of Hardware Engineering or related work experience. Alternatively, candidates with a Master's degree in the mentioned fields and 5+ years of relevant experience, or a PhD with 4+ years of relevant work experience are encouraged to apply. A total of 12-15 years of experience with a Bachelor's/Master's degree in Electrical/Electronics engineering is also acceptable. Qualcomm is an equal opportunity employer and is committed to providing accessible processes for individuals with disabilities during the application/hiring process. Interested candidates are encouraged to reach out for accommodations if needed. Qualcomm expects its employees to comply with all relevant policies and procedures, including those related to security and the protection of confidential information. Please note that Qualcomm's Careers Site is exclusively for individuals seeking job opportunities at Qualcomm. Staffing and recruiting agencies, as well as individuals being represented by an agency, are not permitted to use this site for submissions. Qualcomm does not accept unsolicited resumes or applications from agencies. For further information about this role, please contact Qualcomm Careers directly.,

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Be a member of the team that plays a significant role in ensuring the quality of Connectivity SoCs through structured DFT, Automatic Test Pattern Generation (ATPG) and Memory Built-In Self-Test (MBIST) techniques. Primary responsibilities will include , Interfac e with design team to ensure DFT design rules and coverages are met. Generating high quality manufacturing ATPG test patterns for stuck-at (SAF) , transition fault (TDF ) models through the use of on-chip test compression techniques. M BIST verification (including repair), test pattern generation through Mentor tool. ATPG (SAF, TDF) and MBI ST verification using unit delay and min/max timing corner s imulations . Work with the P roduct /Test engineering teams on the delivery of manufacturi ng test patterns for ATE . Responsible for supporting post silicon debug effort, issue resolution . Responsible for Diagnostic Tool generation for ATPG , MBIST and bring-up on ATE. Developing, enhancing and maintaining scripts as necessary Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field. Minimum of 1-6 year s experience in ASIC/DFT - simulation and Silicon validation Detailed knowledge on DFT concepts, pattern simulation, Silicon debug and yield enhancement In depth knowledge and hands-on experience in ATPG - coverage analysis. In depth knowledge of Memory verification, repair and failure root-cause analysis. Experience with any of these tools is required ATPG - TestKompress MBIST - Mentor ETVerify Simulation - VCS (preferred), modelsim . Expertise in scripting languages such as Perl , shell, etc. is an added advantage Ability to work in an international team, dynamic environment with good communication skills Ability to learn and adapt to new tools , methodologies. Ability to do multi-tasking & work on several high priority designs in parallel Applicants Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Qualcomm Chennai is looking for a STA and Synthesis Engineer who is passionate in to work with cross-functional engineering teams. In this position, the engineer will be involved in all stages of the design and development cycles Synthesis, Static Timing Analysis and LEC of SoC/Cores Full chip and block level timing closure, IO budgeting for blocks Logical equivalence check between RTL to Netlist and Netlist to Netlist Knowledge of low-power techniques including clock gating, power gating and MV designs ECO timing flow Proficient in scripting languages (TCL and Perl). Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field. 1-5 yrs of experience Applicants Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.

Job Area: Engineering Group, Engineering Group > Hardware Applications Engineering General Summary: Job Function: We are seeking talented Software developers to join our team, lead and contribute towards development of software tools. You will collaborate with cross-functional teams to ensure our tools meet the highest standards of quality and performance. The successful candidate will design, develop, and maintain software tools and frameworks that enable customers to efficiently integrate and test our chipsets across various stages of their design, from early development to factory testing. This is an excellent opportunity to work with cutting-edge technology and collaborate with cross-functional teams to drive customer success. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 6+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 5+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. Baseband JD Title System HW Applications Engineering- Engineer, Sr Staff/Manager Job Function Qualcomm is looking for candidates to support its customers in designing solutions using Qualcomm hardware and software. Individual will contribute to the dynamic Applications engineering team for end product designs Consumer, Industrial and IoT applications. As a member of Qualcomm Customer engineering team, the individual will be responsible for successful integration of Qualcomm solution into customer end products in Mobile, Compute, 5G Broadband, Automotive, IoT and consumer electronics markets. Gathers, integrates, and interprets information across cross functional teams from a variety of sources in order to troubleshoot issues and find solutions. Applies deep and broad knowledge to anticipate and identify gaps/risks in processes, efforts, technical aspects of HW/System aspects etc., and closes the gaps with wide range of eco-system partners within Qualcomm and enable customer product commercialization Individual will be responsible and acts as a tech lead on projects and owns the outcome of the project for supporting Qualcomm's growing portfolio of platforms/applications. Job involves working closely with internal partners in definition of product (as appropriate), collaborate with HW/SW/validation/test and product teams on customized use cases of customer applications, support customers on HW design signoffs, system/SoC debug, deliverables etc and effectively managing cross functional team of engineers. Individual will be responsible to create chipset documentation, assist customers in technical responses to customer queries and troubleshooting of customer designs from overall system and SoC point of view. Candidate should have minimum 14+ Years of relevant experience. Past expertise and experience in interacting with multiple teams in HW, SW, domain skills in Digital/High Speed/SoC, Power Management, Silicon validation, Customer engagement, ability to adapt dynamic changes to meet tight deadlines/commitments and deliver customer requirements, Strong written and oral communication skills is highly desirable. Travelling to customer sites across geographical locations in Asia/NA etc on need basis Preferred Qualifications Embedded systems HW/SW design preferably ARM based, board bring up, Silicon bench tests/ Characterization, measurements AC/DC parameters, SOC interface parametric measurements, basic SW integrated functional tests, Silicon validation, HW PCB design, High speed peripheral expertise, Signal Integrity and Power Integrity, System level architecture Programming languagesC and scripting languages PERL/PYTHON preferred. Good trouble-shooting skills with analysis and debug ability at PCB, HW IP, SW and SoC level. Expertise in High Speed Digital interfaces such asMemory Bus I/F (UFS, eMMC, LPDDRx), USB, MIPI CSI/DSI, PCIe, SERDES etc and Power management areas like LDO, SMPS, Clock, Crystal etc. Hands on experience in working with Oscilloscopes, Logic Analyzers. Basic knowledge of ARM processors, Multi core architecture, experience in working with JTAG emulators. Knowledge of Multi-core system/inter-chip system design is a plus. Keywords Embedded systems, Silicon Characterization, LPDDR4x, LPDDR5, LPDDR, NAND, UFS, eMMC, SERDES, PCIe, MIPI, USB, UART, SPI, I2C, Logic Analyzer, PADS, Allegro, ARM processor, JTAG, LDO, SMPS, Clock, Crystal, Board bring up Educational Requirements RequiredBachelor's, Electronics and/or Electrical Engineering PreferredMaster's, Electronics and/or Electrical Engineering Applicants Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.

Job Area: Engineering Group, Engineering Group > Systems Engineering General Summary: Job Function/General Responsibilities Modeling and Minimizing SOC power for Games/ML/UI/Image-processing Graphics workloads Silicon power measurement and modeling CPU, memory and other SOC components of SOC for Graphics workloads Experience in GPU DCVS algorithm is a plus Knowledge of Windows OS is a plus. Critical "Must Have" skills/experience for role Bachelor's degree or equivalent in Electrical or Computer Engineering, Computer Science, or related field. 15+ years Software Engineering, Hardware Engineering, Systems Engineering, or related work experience. Minimum Qualifications: Bachelor's degree in Engineering, Information Systems, Computer Science, or related field and 8+ years of Systems Engineering or related work experience. OR Master's degree in Engineering, Information Systems, Computer Science, or related field and 7+ years of Systems Engineering or related work experience. OR PhD in Engineering, Information Systems, Computer Science, or related field and 6+ years of Systems Engineering or related work experience. Preferred skills/experience for role: Master's Degree or PhD in Electrical or Computer Engineering, Computer Science, or related field. 2+ years relevant GPU experience (either external or internal). 2+ years of work experience in a role requiring interaction with senior leadership (e.g., Director level and above). 1+ years in a technical leadership role with or without direct reports (only applies to positions with direct reports Education Text Bachelor's degree in Computer Science, Electrical Engineering, Information Systems, or related field. Keywords Power, SOC, DCVS, DVFS Applicants Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.

Job Area: Engineering Group, Engineering Group > Systems Engineering General Summary: Analyze and evaluate GPU architecture/microarchitecture and workload for performance and power optimizations GPU power modeling and estimation for projection and correlation GPU workload analysis, profiling, and characterizations Analyze, model, and minimize GPU register, logic, memory, and clock power Develop and maintain tests for pre-silicon and post-silicon power verifications. Work closely with multiple teams such as RTL designer, architecture, design verification, compiler, driver, silicon implementation, and post-silicon teams Knowledge of Graphics architecture is a plus Additional Minimum Qualifications: Bachelor's degree in Engineering, Information Systems, Computer Science, or related field and 4+ years of Systems Engineering or related work experience. OR Master's degree in Engineering, Information Systems, Computer Science, or related field and 3+ years of Systems Engineering or related work experience. OR PhD in Engineering, Information Systems, Computer Science, or related field and 2+ years of Systems Engineering or related work experience. Preferred Qualifications: Master's or PhD degree or equivalent in Computer Engineering, Computer Science, Electrical Engineering, or related field. 7+ years Systems Engineering or related work experience 3+ years of experience with advanced CPU/GPU architecture/microarchitecture design development 5+ years of experience with VLSI design and verification 5+ years of experience with low-power ASIC design techniques Experience with industry tools such as PrimeTime PX and Power Artist Experience with Vulkan, DirectX3D, OpenGL, OpenCL, or Cuda development Experience with GPU driver and compiler development Skills: C/C++ Programming Language, Scripting (Python/Perl), Assembly, Verilog/SystemVerilog, Design Verification Additional Applicants Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Be a member of the team that plays a significant role in ensuring the quality of Connectivity SoCs through structured DFT, Automatic Test Pattern Generation (ATPG) and Memory Built-In Self-Test (MBIST) techniques. Primary responsibilities will include, Interface with design team to ensure DFT design rules and coverages are met. Generating high quality manufacturing ATPG test patterns for stuck-at (SAF), transition fault (TDF) models through the use of on-chip test compression techniques. MBIST verification (including repair), test pattern generation through Mentor tool. ATPG (SAF, TDF) and MBIST verification using unit delay and min/max timing corner simulations. Work with the Product/Test engineering teams on the delivery of manufacturing test patterns for ATE. Responsible for supporting post silicon debug effort, issue resolution. Responsible for Diagnostic Tool generation for ATPG, MBIST and bring-up on ATE. Developing, enhancing and maintaining scripts as necessary Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field. Minimum of 2-6 years experience in ASIC/DFT-simulation and Silicon validation Detailed knowledge on DFT concepts, pattern simulation, Silicon debug and yield enhancement In depth knowledge and hands-on experience in ATPG -coverage analysis. In depth knowledge of Memory verification, repair and failure root-cause analysis. Experience with any of these tools is required ATPG - TestKompress MBIST - Mentor ETVerify Simulation - VCS (preferred), modelsim. Expertise in scripting languages such as Perl, shell, etc. is an added advantage Ability to work in an international team, dynamic environment with good communication skills Ability to learn and adapt to new tools, methodologies. Applicants Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Experience in Logic design /micro-architecture / RTL coding is a must. Must have hands on experience with SoC design and integration for complex SoCs. Experience in Verilog/System-Verilog is a must. knowledge of AMBA protocols - AXI, AHB, APB, SoC clocking/reset/debug architecture and peripherals like USB, PCIE and SDCC. Understanding of Memory controller designs and microprocessors is an added advantage Work closely with the SoC verification and validation teams for pre/post Silicon debug Hands on experience in Low power SoC design is required Hands on experience in Multi Clock designs, Asynchronous interface is a must. Experience in using the tools in ASIC development such as Lint, CDC, Design compiler and Primetime is required. Understanding of constraint development and timing closure is a plus. Experience in Synthesis / Understanding of timing concepts is a plus. Experience creating padring and working with the chip level floorplan team is an added advantage. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 6+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 5+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. Applicants Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. Qualcomm is a company of inventors that unlocked 5G ushering in an age of rapid acceleration in connectivity and new possibilities that will transform industries, create jobs, and enrich lives. But this is just the beginning. It takes inventive minds with diverse skills, backgrounds, and cultures to transform 5Gs potential into world-changing technologies and products. This is the Invention Age - and this is where you come in. systems architecture.ADAS/Autonomy/Infotainment Qualcomm is utilizing its traditional strengths in digital wireless technologies to play a central role in the evolution of automotive infotainment and autonomous driving. We are investing in several supporting technologies including 4G, 5G, ADAS, and Deep Learning. The Qualcomm Automotive Security team is engaged in offering optimized solutions built on Safety CPU cores, DSP, computer vision and machine learning algorithms for the Qualcomm We are seeking engineers with experience in system and SoC level automotive cybersecurity concepts and implementations and knowledge of the ISO21434 cyber security standards and process. This position will be a hands-on role in in analyzing and improving the current cybersecurity hardware development process to meet ISO 21434. Candidate must have thorough knowledge on ISO 21434 and ISO 26262 standards to independently perform functional safety and cybersecurity audits and assessments. Responsibilities shall include the following Development/ enhancement of hardware development process and related work products meeting cyber security standards. Provide training on ISO 21434/ ISO 26262 with respect to application of Qualcomms best practices. Facilitate TARA and VARA and review them Independently carry out cybersecurity audits and assessments, guiding the hardware design and development teams in the process. Provide feedback and identify process improvements and follow up with internal teams. Work closely with SoC Design and IP teams, 3rd party IP vendors, Software team, the functional safety and cybersecurity manager(s), Quality team as well as customers to ensure the defined process is deployed. Participate in external and customer cybersecurity and functional safety audits and assessments and assist in corrective actions. Maintain a strong knowledge of Automotive Industry cybersecurity best practices. Influence internal stakeholders with actionable data to ensure gaps to expectations are closed in a timely fashion. Establish and maintain healthy relationships with influential/decision making on Cybersecurity, Functional Safety, and ongoing Quality assessments throughout the organization. Facilitate in qualitative and quantitative safety analyses and review of them. Minimum Qualifications Bachelor's degree in Engineering, Information Systems, Computer Science, or related field. 8+ years Systems Engineering / VLSI design or related work experience. Has knowledge of product development flow and validation. Has led audits of different development processes and is comfortable with assessments and reporting Quality metrics. Hands-on experience with automotive quality processesISO 21434, ISO 26262, TARA, VARA, DFMEA, FTA, FMEDA, 8D, quality agreements, PCNs / EOLs, customer audits, AEC- Q100 requirements, ISO9001, IATF 16949, etc. Structured problem-solving capability and ability to work with teams on root cause analyses. Excellent verbal/written communication, interpersonal skills, and presentation skills Applicants Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.

Job Area: Engineering Group, Engineering Group > Systems Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Systems Engineer, you will research, design, develop, simulate, and/or validate systems-level software, hardware, architecture, algorithms, and solutions that enables the development of cutting-edge technology. Qualcomm Systems Engineers collaborate across functional teams to meet and exceed system-level requirements and standards. Minimum Qualifications: Bachelor's degree in Engineering, Information Systems, Computer Science, or related field and 4+ years of Systems Engineering or related work experience. OR Master's degree in Engineering, Information Systems, Computer Science, or related field and 3+ years of Systems Engineering or related work experience. OR PhD in Engineering, Information Systems, Computer Science, or related field and 2+ years of Systems Engineering or related work experience. SOC Architect SoC Architect Staff /Sr-Staff Eng Bangalore Vivek Sheel Mittal Company - Division Qualcomm Technologies, Inc.- Platform Architecture Division Job PositionSenior/Staff Engineer 10-15 years in SOC Architecture/Systems Engineering or related work experience. Job Area Engineering - Systems Location Bangalore Educational Requirements Bachelors or Masters in computer engineering and/or Electronics Engineering (or related fields). Overview Work with Qualcomm's Platform Architecture team on next generation System-on-chip (SoC) for Compute, smartphone, IoT and other product categories. Candidate will be involved in architecture and/or microarchitecture of various subsystems and interfaces of the SoCs, e.g. reset, boot, power management, security, access control, debug services, various processing subsystems like CPU, DSP, GPU and AI Accelerator subsystems etc. The successful candidate will - Be part of Qualcomm Platform Architecture Team Work with Hardware and Software teams to understand the design requirements, specification, and interface details. Validate architecture/ microarchitecture models for multiple peripherals, interconnects, and IPs for Qualcomm SoC platforms. Work with team to integrate these models to the SoC platform and validate IP/ System Level use cases. Perform area, power, performance trade-offs and analysis of HW/SW re-usability requirements for IP/Cores and complete SoC. Develop Specification, system level architecture/micro-architecture of system use-cases, working with cross functional teams. Have experience working with ARM-based SoC architectures, in-depth understanding of computer architecture fundamentals, the ability to develop complex systems. Skills/Experience: Bachelors Degree required, Master or PhD degree in related field highly desired. SOC Architecture Background, preferably Compute SOC Architecture. Excellent communication and interpersonal skills Demonstrated ability to collaborate on projects with multiple teams and disciplines. Ability to develop and improve methodologies for experiments and analysis in the specific area of expertise. Have the communication and collaboration skills to work with a large world-wide design organization. Experience or Education involving hardware, System architecture and software. Areas of Expertise (the more the better): Candidates should have one or more of the following areas of knowledge and/or expertise: ARM and RISC-V Architecture expertise specifically in areas of Coherency, Signaling, Memory Management, Virtualization, etc DSPs, CPUs (ARM preferred), High and Low Speed peripherals DDR, Interconnect, System Cache, QOS. Power, Boot, Debug, Security, Access Control Architecture. Power and/or performance analysis, simulation, and modelling. Understanding of VLSI flow from spec to tape out with proficiency in digital design, HDL languages, Scripting languages is preferred. Applicants Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail myhr.support@qualcomm.com or call Qualcomm's toll-free number found here . Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Qualcomm is hiring strong DV engineers to verify high performance and low power CPUs in Bangalore. Please forward your profiles if you meet the requirement. Roles and Responsibilities o Responsible for power management verification includes Boot, Reset, clock gating, power gating, Voltage/frequency management, limit management and throttling. o Work closely with design/verification teams within CPU to develop comprehensive test plan. o Use simulation and formal verification methodologies to execute test plans. Write checkers, assertions and develop stimulus. o Verify power intent through use of methodologies like UPF. o Work closely with system architects, software teams and Soc team to validate system use cases. o Work closely with emulation team to enable verification on emulators and FPGA platforms. o Debug and triage failures in simulation, emulation and/or Silicon. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. o BE/BTech degree in CS/EE with 3+ years experience. o Experience in power management verification. o Implementation of assembly and C language embedded firmware. o Experience in C/C++, scripting languages, Verilog/system Verilog. o Strong understanding of power management features in CPUs and CPU based Socs. o Experience in verification of power management features such as clock gating, power gating, UPF, DVFS/DCVS, reliability, throttling etc. Preferred Requirements: o Good Understanding of CPU architectures and CPU micro-architectures. o In-depth knowledge of digital logic design, micro-processor, debug feature, and DFT architecture and microarchitecture o Experience with advanced verification techniques such as formal and assertions is a plus o Knowledge and verification experience in DFT and structural debug concepts and methodologiesJTAG, IEEE1500, MBIST, scan dump, memory dump is a plus Applicants Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience.PNR implementation for Qualcomm SoC's Good hands-on experience on Floorplanning, PNR and STA flows Good knowledge on Placement/Clock Tree Synthesis (CTS), optimization, etc Good understanding on signoff domains"“ LEC/CLP/PDN knowledge, etc Good knowledge on Unix/Linux- Perl/TCL fundamentals/scripting Principal Duties and responsibilities Complete ownership on PNR implementation (Floorplanning, Placement, CTS, post_route,etc) on latest nodes. Signoff knowledge is mandatory (STA,Power analysis,FV, low power verification, PV,etc) Quick learner with good analytical and problem solving skills Qualifications 8+ years Hardware Engineering experience or related work experience. 6+ years experience with PNR flow in latest tech nodes (e.g., 4nm/5nm/7nm/10nm Applicants Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.