2300 Verilog Jobs - Page 18

Designation: Radio frequency Desing - Intern 1 Posit ion Employment Type: Internship Work Type: Hybrid (3 Days a Week onsite - 2 Days Remote) Saturday s Sunday s Week-Offs . Reporting: to Senior Electronics Engineer of amPICQ Internship Details: 6 Months Duration - Paid Internship Qualification: Pursuing a Master s degree in Electrical Engineering, RF/Microwave Engineering, or a related field. Proficient with simulation tools like Keysight ADS. Strong understanding of RF principles and a passion for high- frequency design. For More details RF Design Interns: One Position. Job Summary: We aim to enhance our RF design capabilities by incorporating fresh perspectives and the latest academic insights. The interns will assist in designing and simulating High-Speed RF and microwave circuits using Keysight ADS. Their role will also include hands-on testing and validation. Key Responsibilities: Assist in the design, simulation, and analysis of High-Speed RF and microwave circuits. Creating and optimizing PCB layouts for RF components and systems. Conducting simulations to predict the behavior of RF circuits. Implement tuning and matching techniques to improve circuit performance. Identify and resolve issues in RF circuits and systems. Collaborate with senior engineers to refine designs based on simulation results. Prepare technical reports and design reviews. Explore new tools, techniques, and methodologies to improve design and simulation processes. Requirements: Strong understanding of RF principles and components. Ability to perform simulations to predict and optimize RF circuit performance. Strong problem-solving and troubleshooting abilities. Strong attention to detail. Ability to work effectively both independently and as part of a team. Proactive and self-motivated with a continuously improving mindset. CMOS Circuit Design Strong understanding of MOSFET operation, CMOS logic, low-power design, and VLSI layout techniques. PDK EDA Tools Experience with Process Design Kits (PDKs) and semiconductor fabrication processes. Knowledge on Keysight ADS is must. FPGA Development Proficiency in Verilog/VHDL, FPGA architecture, high-speed digital design, and debugging tools. Python Scripting Automation for circuit simulations, test bench development, data analysis, and hardware interfacing. Qualification / Ideal Candidate: Pursuing a Master s degree in Electrical Engineering, RF/Microwave Engineering, or a related field. Proficient with simulation tools like Keysight ADS. Strong understanding of RF principles and a passion for high-frequency design. Reporting Manager: Senior Electronics Engineer of amPICQ Work Type: Hybrid (3 Days a Week onsite - 2 Days Remote) Saturday s Sunday s Week-Offs . Location: Hyderabad Telangana, India

We are seeking a motivated VLSI/VHDL Design Engineer with 12 years of hands-on experience in project implementation. The ideal candidate should be proficient in VHDL and have experience in the complete project life cyclefrom design to simulation, synthesis, and implementation on FPGAs or ASIC platforms.

About the Opportunity Job TypeApplication 25 July 2025 Title Senior Analyst Programmer- Platform Engineering Department FIL India Technology ISS Tech Location Gurgaon, India Level 3 Were proud to have been helping our clients build better financial futures for over 50 years. How have we achieved thisBy working together - and supporting each other - all over the world. So, join our ISS team and feel like youre part of something bigger. About your team Investment Management Technology provides systems development, implementation and support services for our globalInvestment Management division. We support Fund Managers, Research Analysts and Traders in all of our internationallocations, including London, Hong Kong, Ireland & Tokyo. About your role CRD delivery team needs highly motivated self-driven Analyst Programmer to provide Platform Support. The CRD platform consists of the Charles River product, CRD Integration Layer, PaaS and Kubernetes Services. CRD Platform is Fidelitys core trading platform, used by Portfolio Managers, Traders, Compliance and Post Trade. The core elements of the role are as follows: Platform Engineering - Primary objective of platform engineering is to focus on future planning and design of platform to maintain long term sustainability and supportability. Non-Production Incident management - Troubleshoot non-production issues and find root cause through analysis. Non-Production Support & Operations - Perform routine operational tasks such as critical batch monitoring, morning checks on applications readiness for business use, health check reports, maintenance etc Problem management & Change management - Identify and drive the changes required to bring stability on non-prod environments; Participate in Application releases, Infrastructure changes, Preventive maintenance activities like DR role swaps. About you Seasoned IT software delivery professional with an experience of 5+ years of relevant industry experience in supporting IT applications. Hands on experience on Unix scripting, Oracle & SQLServer, scheduling tools - Autosys and Control-M, IBM MQ, Kubernetes and Python. Understanding of DevOps concepts, Jenkins, Urban Deploy, JIRA and Power BI. Knowlege of Financial Domain (Investment Banking / Wealth Management) and understanding of Fixed Income and Equity Trading, Trade flow and Fund Management and FIX connectivity and infrastructure. Feel rewarded For starters, well offer you a comprehensive benefits package. Well value your wellbeing and support your development. And well be as flexible as we can about where and when you work finding a balance that works for all of us. Its all part of our commitment to making you feel motivated by the work you do and happy to be part of our team. For more about our work, our approach to dynamic working and how you could build your future here, visit careers.fidelityinternational.com.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: ob Description Responsibilities will include To be strong designer who is able to work independent on one of the peripheral IPs come up with design and microarchitecture solutions guide/mentor juniors engage with external teams to drive/resolve cross team dependencies. Take complete responsibility of one or more project and drive that independently. Being able to make schedule estimates is a plus. People management experience is a plus Skills & Requirements needed 5-8 years of work experience in ASIC IP cores design RequiredBachelor's, Electrical Engineering PreferredMaster's, Electrical Engineering Knowledge of AMBA protocols - AXI, AHB, APB, SoC clocking/reset/debug architecture and peripherals like USB/PCIE/Ethernet preferred. Work closely with the SoC verification and validation teams for pre/post Silicon debug Hands on experience in Low power design is required Hands on experience in Multi Clock designs, Asynchronous interface is a must. Experience in using the tools in ASIC development such as Lint, CDC, Design compiler and Primetime is required. Understanding of constraint development and timing closure is a plus. Experience in Synthesis / Understanding of timing concepts is a plus. Strong experience in micro architecting RTL design from high level design specification. Excellent problem solving skills, strong communication and team work skills are mandatory. Self-driven, needs to work with minimum supervision. Experience in System Verilog, Verilog, C/C++, Perl and Python is a plus Ability to lead a small design team. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. Preferred Qualifications: Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field. 5+ years of Hardware Engineering or related work experience. 2+ years of experience with circuit design (e.g., digital, analog, RF). 2+ years of experience utilizing schematic capture and circuit simulation software. 2+ years of experience with hardware design and measurement instruments such as oscilloscopes, spectrum analyzers, RF tools, etc. 1+ year in a technical leadership role with or without direct reports. Principal Duties and Responsibilities: Leverages Hardware knowledge and experience to plan, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems. Integrates features and functionality into hardware designs in line with proposals or roadmaps. Conducts complex simulations and analyses of designs as well as implements designs with the best power, performance, and area. Collaborates with teams (e.g., design, verification, validation, software and systems engineering, architecture development teams, etc.) to implement new requirements and incorporate the latest test solutions in the production program to improve the yield, test time, and quality. Evaluates, characterizes, and develops the manufacturing solutions for leading edge products in the most advanced processes and bring-up product to meet customer expectations and schedules. Evaluates reliability of critical materials, properties, and techniques and brings innovation, automation, and optimization to maximize productivity. Evaluates complex design features to identify potential flaws, compatibility issues, and/or compliance issues. Writes detailed technical documentation for Hardware projects. Level of Responsibility: Works independently with minimal supervision. Provides supervision/guidance to other team members. Decision-making may affect work beyond immediate work group. Requires verbal and written communication skills to convey information. May require basic negotiation, influence, tact, etc. Tasks require multiple steps which can be performed in various orders; some planning, problem-solving, and prioritization must occur to complete the tasks effectively. Applicants Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: General Summary Qualcomm is a company of inventors that unlocked 5G ushering in an age of rapid acceleration in connectivity and new possibilities that will transform industries, create jobs, and enrich lives. But this is just the beginning. It takes inventive minds with diverse skills, backgrounds, and cultures to transform 5Gs potential into world-changing technologies and products. This is the Invention Age - and this is where you come in. We are hiring talented engineers for CPU RTL development targeted for high performance, low power devices. As a CPU Micro-architecture and RTL Design Engineer, you will work with chip architects to conceive of the micro-architecture, and also help with architecture/product definition through early involvement in the product life-cycle. Roles And Responsibilities Performance exploration. Explore high performance strategies working with the CPU modeling team. Microarchitecture development and specification. From early high-level architectural exploration, through micro architectural research and arriving at a detailed specification. RTL ownership. Development, assessment and refinement of RTL design to target power, performance, area and timing goals. Functional verification support. Help the design verification team execute on the functional verification strategy. Performance verification support. Help verify that the RTL design meets the performance goals. Design delivery. Work with multi-functional engineering team to implement and validate physical design on the aspects of timing, area, reliability, testability and po Preferred Qualifications Thorough knowledge of microprocessor architecture including expertise in one or more of the following areasinstruction fetch and decode, branch prediction, instruction scheduling and register renaming, out-of-order execution, integer and floating point execution, load/store execution, prefetching, cache and memory subsystems Knowledge of Verilog and/or VHDL. Experience with simulators and waveform debugging tools Knowledge of logic design principles along with timing and power implications Understanding of low power microarchitecture techniques Understanding of high performance techniques and trade-offs in a CPU microarchitecture Experience using a scripting language such as Perl or Python Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 8+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 7+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 6+ years of Hardware Engineering or related work experience. Preferred Qualifications: Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field. 15+ years of Hardware Engineering or related work experience. 4+ years of experience with circuit/logic design/validation (e.g., digital, analog, RF). 4+ years of experience utilizing schematic capture and circuit stimulation software. 4+ years of experience with hardware design and measurement instruments such as oscilloscopes, spectrum analyzers, RF tools, etc. 4+ years in a technical leadership role with or without direct reports. Principal Duties and Responsibilities: Leverages expert Hardware knowledge and experience to plan, optimize, verify, and test highly critical electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems. Drives the development of design rules and processes for electronic hardware, equipment, and/or integrated circuitry. Serves as an expert resource for conducting highly complex simulations and analyses of designs as well as for the implementation of designs with the best power, performance, and area. Collaborates with high-level representatives across functions (e.g., design, verification, validation, software and systems engineering, architecture development teams, etc.) to implement and drive new requirements and the latest test solutions in the production program to improve the yield, test time, and quality. Evaluates, characterizes, and develops the novel manufacturing solutions for leading edge products in highly advanced processes and bring-up product to meet customer expectations and schedules. Serves as an expert resource for the evaluation of reliability for highly critical materials, properties, and techniques and brings innovation, automation, and optimization to maximize productivity. Advises multiple teams of engineers in the development of complex hardware designs, evaluating various design features to identify potential flaws or issues. Writes detailed technical documentation for highly complex Hardware projects; reviews technical documentation for experienced engineers. Level of Responsibility: Provides supervision to direct reports. Decision-making is critical in nature and highly impacts program, product, or project success. Requires verbal and written communication skills to convey highly complex and/or detailed information. May require strong negotiation and influence with large groups or high-level constituents. Works within the prescribed budgetary objectives of the department. Has a great degree of influence over key organizational decisions. Tasks often require multiple steps which can be performed in various orders; extensive planning, problem-solving, and prioritization must occur to complete the tasks effectively. Applicants Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Qualcomm is a company of inventors that unlocked 5G ushering in an age of rapid acceleration in connectivity and new possibilities that will transform industries, create jobs, and enrich lives. But this is just the beginning. It takes inventive minds with diverse skills, backgrounds, and cultures to transform 5Gs potential into world-changing technologies and products. This is the Invention Age - and this is where you come in. Qualcomm CDMA Technologies (QCT) is a global leader in Multimedia integrated circuits (ICs), software and systems for wireless consumer devices including Smartphones, Netbooks and E-readers. Our teams are developing advanced technologies to enhance mobile devices in areas including 2D and 3D graphics, audio/video, display and architecture. These Multimedia ASICS are co-designed with our Modems, Applications Processors, Analog Codecs and Power Management ICs to deliver highly-integrated, high-performance and low-cost chipsets to our customers and partners. You will be implementing the industry's leading edge graphics processor, specific areas include 2D and 3D graphics, streaming processor, high speed IO interface and bus protocols. In this position, the designer will be responsible for architecture and micro-architecture design of the ASIC, RTL design and synthesis, logic and timing verification. The successful candidate for this position will specify and design digital blocks in our Multimedia Graphics team that will be integrated into a broad range of devices. All Qualcomm employees are expected to actively support diversity on their teams, and in the Company. Minimum Qualifications Bachelor's degree in Science, Engineering, or related field Previous experience in designing GPU or CPU cores and ASICs for Multimedia and Graphics applications in deep sub-micron CMOS processes for volume productionExperience with Verilog/VHDL design, Synopsys synthesis, static timing analysis, formal verification, low power design, test plan development, coverage-based design verification, and/or design-for-test (DFT)Experience with Computer Architecture, Computer Arithmetic, C/C++ programming languages is desiredExposure to DX9~12 level graphics HW development is big plusGood communication skill and desire to work as a team player RequiredBachelor's degree in Computer Science, Electrical Engineering, Information Systems, or related field.PreferredMaster's degree in Computer Science, Electrical Engineering, Information Systems, or related field. ASIC, hardware, design, GPU, OpenGL, DirectX, RTL, Verilog, SystemVerilog Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. Applicants Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: General Summary Qualcomm is a company of inventors that unlocked 5G ushering in an age of rapid acceleration in connectivity and new possibilities that will transform industries, create jobs, and enrich lives. But this is just the beginning. It takes inventive minds with diverse skills, backgrounds, and cultures to transform 5Gs potential into world-changing technologies and products. This is the Invention Age - and this is where you come in. We are hiring talented engineers for CPU RTL development targeted for high performance, low power devices. As a CPU Micro-architecture and RTL Design Engineer, you will work with chip architects to conceive of the micro-architecture, and also help with architecture/product definition through early involvement in the product life-cycle. Roles And Responsibilities Performance exploration. Explore high performance strategies working with the CPU modeling team. Microarchitecture development and specification. From early high-level architectural exploration, through micro architectural research and arriving at a detailed specification. RTL ownership. Development, assessment and refinement of RTL design to target power, performance, area and timing goals. Functional verification support. Help the design verification team execute on the functional verification strategy. Performance verification support. Help verify that the RTL design meets the performance goals. Design delivery. Work with multi-functional engineering team to implement and validate physical design on the aspects of timing, area, reliability, testability and po Preferred Qualifications Thorough knowledge of microprocessor architecture including expertise in one or more of the following areasinstruction fetch and decode, branch prediction, instruction scheduling and register renaming, out-of-order execution, integer and floating point execution, load/store execution, prefetching, cache and memory subsystems Knowledge of Verilog and/or VHDL. Experience with simulators and waveform debugging tools Knowledge of logic design principles along with timing and power implications Understanding of low power microarchitecture techniques Understanding of high performance techniques and trade-offs in a CPU microarchitecture Experience using a scripting language such as Perl or Python Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. Preferred Qualifications: Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field. 8+ years of Hardware Engineering or related work experience. 2+ years of experience with circuit design (e.g., digital, analog, RF). 2+ years of experience utilizing schematic capture and circuit simulation software. 2+ years of experience with hardware design and measurement instruments such as oscilloscopes, spectrum analyzers, RF tools, etc. 1+ year in a technical leadership role with or without direct reports. Principal Duties and Responsibilities: Leverages advanced Hardware knowledge and experience to plan, optimize, verify, and test critical electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems. Integrates complex features and functionality into hardware designs in line with proposals or roadmaps for complex products. Conducts complex simulations and analyses of designs as well as implements designs with the best power, performance, and area. Collaborates with cross-functional teams (e.g., design, verification, validation, software and systems engineering, architecture development teams, etc.) to implement new requirements and incorporate the latest test solutions in the production program to improve the yield, test time, and quality. Evaluates, characterizes, and develops the novel manufacturing of solutions for leading edge products in the most advanced processes and bring-up product to meet customer expectations and schedules. Evaluates reliability of critical materials, properties, and techniques and brings innovation, automation, and optimization to maximize productivity. Evaluates complex design features to identify potential flaws, compatibility issues, and/or compliance issues. Writes detailed technical documentation for complex Hardware projects. Level of Responsibility: Works independently with minimal supervision. Provides supervision/guidance to other team members. Decision-making is significant in nature and affects work beyond immediate work group. Requires verbal and written communication skills to convey complex information. May require negotiation, influence, tact, etc. Has a moderate amount of influence over key organizational decisions. Applicants Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field. In this role You will be interacting closely with the product definition and architecture team. Developing implementation (microarchitecture and coding) strategies to meet quality, and PPAS (Performance Power Area Schedule) goals for Sub-system. Define various aspects of the block level design such as block diagram, interfaces, clocking, transaction flow, pipeline, low power etc. Perform as well as lead a team of engineers on RTL coding for Sub-system/SOC integration, function/performance simulation debug. Drive Lint/CDC/FV/UPF checks to ensure design quality. Develop Assertions as part of white-box testing-coverage. Work with stakeholders to discuss the right collateral quality and identify solutions/workarounds. Work towards delivering with key design collaterals (timing constraints, UPF etc.). Desired Skillset: Good understanding of low power microarchitecture techniques and AI/ML systems. Thorough knowledge of Computer system architecture, including design aspects of AI/ML designs. Experience in high performance design techniques and trade-offs in a Computer microarchitecture. Good understanding of principals of NoC Design Define Performance (Bandwidth, Latency) and Bus transactions sizing based on usecases across Voltage/Frequency corners Working with Power and Synthesis teams on usecases, dynamic power and datapath interactions Knowledge of Verilog / System Verilog. Experience with simulators and waveform debugging tools Working with SOC DFT and PD teams as part of collaterals exchanges Knowledge of logic design principles along with timing and power implications Applicants Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.

Role Purpose The purpose of this role is to perform the development of VLSI system by defining the various functionalities, architecture, layout and implementation for a client Do 1. Conduct verification of the module/ IP functionality and provide customer support a. Understand the architecture of the module or the IP and create verification environment and the development plan as per Universal Verification Methodology b. Create test bench development and test case coding of the one or multiple module c. Write the codes or check the code as required d. Execute the test cases and debug the test cases if required e. Conduct functional coverage analysis and document the test cases including failures and debugging procedures on SharePoint/ JIRA or any other platform as directed f. Test the entire IP functionality under regression testing and complete the documentation to publish to client g. Troubleshoot, debug and upgrade existing systems on time & with minimum latency and maximum efficiency h. Write scripts for the IP i. Comply with project plans and industry standards 2. Ensure reporting & documentation for the client a. Ensure weekly, monthly status reports for the clients as per requirements b. Maintain documents and create a repository of all design changes, recommendations etc c. Maintain time-sheets for the clients d. Providing written knowledge transfer/ history of the project Mandatory Skills: Analog Circuit design. Experience: 1-3 Years.

Role Purpose The purpose of this role is to perform the development of VLSI system by defining the various functionalities, architecture, layout and implementation for a client Do 1. Conduct verification of the module/ IP functionality and provide customer support a. Understand the architecture of the module or the IP and create verification environment and the development plan as per Universal Verification Methodology b. Create test bench development and test case coding of the one or multiple module c. Write the codes or check the code as required d. Execute the test cases and debug the test cases if required e. Conduct functional coverage analysis and document the test cases including failures and debugging procedures on SharePoint/ JIRA or any other platform as directed f. Test the entire IP functionality under regression testing and complete the documentation to publish to client g. Troubleshoot, debug and upgrade existing systems on time & with minimum latency and maximum efficiency h. Write scripts for the IP i. Comply with project plans and industry standards 2. Ensure reporting & documentation for the client a. Ensure weekly, monthly status reports for the clients as per requirements b. Maintain documents and create a repository of all design changes, recommendations etc c. Maintain time-sheets for the clients d. Providing written knowledge transfer/ history of the project Mandatory Skills: Semiconductor Integration. Experience: 3-5 Years. >

Role Purpose The purpose of this role is to perform the development of VLSI system by defining the various functionalities, architecture, layout and implementation for a client Do 1. Conduct verification of the module/ IP functionality and provide customer support a. Understand the architecture of the module or the IP and create verification environment and the development plan as per Universal Verification Methodology b. Create test bench development and test case coding of the one or multiple module c. Write the codes or check the code as required d. Execute the test cases and debug the test cases if required e. Conduct functional coverage analysis and document the test cases including failures and debugging procedures on SharePoint/ JIRA or any other platform as directed f. Test the entire IP functionality under regression testing and complete the documentation to publish to client g. Troubleshoot, debug and upgrade existing systems on time & with minimum latency and maximum efficiency h. Write scripts for the IP i. Comply with project plans and industry standards 2. Ensure reporting & documentation for the client a. Ensure weekly, monthly status reports for the clients as per requirements b. Maintain documents and create a repository of all design changes, recommendations etc c. Maintain time-sheets for the clients d. Providing written knowledge transfer/ history of the project Mandatory Skills: VLSI Board Design. Experience: 3-5 Years. >

Role Purpose The purpose of this role is to perform the development of VLSI system by defining the various functionalities, architecture, layout and implementation for a client Do 1. Conduct verification of the module/ IP functionality and provide customer support a. Understand the architecture of the module or the IP and create verification environment and the development plan as per Universal Verification Methodology b. Create test bench development and test case coding of the one or multiple module c. Write the codes or check the code as required d. Execute the test cases and debug the test cases if required e. Conduct functional coverage analysis and document the test cases including failures and debugging procedures on SharePoint/ JIRA or any other platform as directed f. Test the entire IP functionality under regression testing and complete the documentation to publish to client g. Troubleshoot, debug and upgrade existing systems on time & with minimum latency and maximum efficiency h. Write scripts for the IP i. Comply with project plans and industry standards 2. Ensure reporting & documentation for the client a. Ensure weekly, monthly status reports for the clients as per requirements b. Maintain documents and create a repository of all design changes, recommendations etc c. Maintain time-sheets for the clients d. Providing written knowledge transfer/ history of the project Mandatory Skills: Analog Layout. Experience: 1-3 Years. >

Role Purpose The purpose of this role is to perform the development of VLSI system by defining the various functionalities, architecture, layout and implementation for a client Do 1. Conduct verification of the module/ IP functionality and provide customer support a. Understand the architecture of the module or the IP and create verification environment and the development plan as per Universal Verification Methodology b. Create test bench development and test case coding of the one or multiple module c. Write the codes or check the code as required d. Execute the test cases and debug the test cases if required e. Conduct functional coverage analysis and document the test cases including failures and debugging procedures on SharePoint/ JIRA or any other platform as directed f. Test the entire IP functionality under regression testing and complete the documentation to publish to client g. Troubleshoot, debug and upgrade existing systems on time & with minimum latency and maximum efficiency h. Write scripts for the IP i. Comply with project plans and industry standards 2. Ensure reporting & documentation for the client a. Ensure weekly, monthly status reports for the clients as per requirements b. Maintain documents and create a repository of all design changes, recommendations etc c. Maintain time-sheets for the clients d. Providing written knowledge transfer/ history of the project Mandatory Skills: Mechanical Part design. Experience: 3-5 Years.

: 6 to 8 years of Semiconductor industry experience in Custom Mixed-Signal layout design with a bachelors degree in electrical/Electronic Engineering. Able to deliver Custom analog layouts independently from schematic to layout generation, estimating the area, optimizing floorplan, routing, and complete verification flows. Firsthand experience in critical analog layout design blocks such as Temperature sensor, Serdes, PLL, ADC, DAC, LDO, Bandgap, Ref Generators, Charge Pump, Current Mirrors, Comparator, Differential Amplifier etc. Good at LVS/DRC debugging skills and other verifications for lower technology nodes - 14nm FinFet and below. Good understanding of Matching, EM, ESD, Latch-Up, Shielding, Parasitic and short channel concepts. Familiar with EDA tools like Cadence VLE/VXL, PVS, Assura and Calibre DRC/ LVS is necessary. Understanding layout effects on the circuit such as speed, capacitance, power, and area etc. Ability to understand design constraints and implement high-quality layouts. Multiple Tape out support experience and collaborating with cross functional teams will be an added advantage. Good people skills and critical thinking abilities to resolve the issue technically and professionally. Excellent communication. Responsible for timely execution with high quality of layout design. Multiple foundries experience is an added plus. Minimum Educational Qualification : Educational Bachelor"s, Electrical or Electronics Engineering or equivalent Role And Responsibilities Responsible for Design and development of critical analog, mixed-signal, custom digital block and full chip level integration support. Perform layout verification like LVS/DRC/Antenna, EM, quality check and documentation. Responsible for on-time delivery of block-level/top-level layouts with acceptable quality. Demonstrate leadership Skill in planning, area/time estimation, scheduling, delegation and execution to meet project schedule/milestones in multiple project environment. Guide junior team-members in their execution of Sub block-level layouts & review their work Should have good experience in working with cross-functional team. Ensure standard processes and procedures are followed to resolve all client queries. Handle technical escalations through effective diagnosis and troubleshooting of client queries Manage and resolve technical roadblocks/ escalations to timely deliverable with high quality. Troubleshoot all client queries in a user-friendly, courteous, and professional manner. Offer alternative solutions to clients (where appropriate) with the objective of retaining customers" and clients" business. Build people capability to ensure operational excellence and maintain superior customer service levels of the existing account/client. Contribute to effective project-management. Effectively communicating with engineering teams in different Geographical locations to assure the success of the layout project. Works in the area of Software Engineering, which encompasses the development, maintenance and optimization of software solutions/applications.1. Applies scientific methods to analyse and solve software engineering problems.2. He/she is responsible for the development and application of software engineering practice and knowledge, in research, design, development and maintenance.3. His/her work requires the exercise of original thought and judgement and the ability to supervise the technical and administrative work of other software engineers.4. The software engineer builds skills and expertise of his/her software engineering discipline to reach standard software engineer skills expectations for the applicable role, as defined in Professional Communities.5. The software engineer collaborates and acts as team player with other software engineers and stakeholders.

Eligibility : B.Tech/ M.Sc/ M.tech (Life Sciences / Biotechnology) Required Skills : Good Knowledge of Biotech/ Life Science Techniques Basic knowledge of MS Office English (Reading and Writing) Candidate must have a personal Laptop Job description : 1) A regular visit to Universities/Colleges in various cities to promote our services and collect the samples. 2) Here is the work to do in visit may be allotted to you as your work Profile a. Collection of data b. Maintenance of record of query c. Preparation of quotation (If required) d. Collection of samples 3) Each candidate will be allotted an entire state to visit and manage. 4) These states may be Madhya Pradesh, Uttarakhand, Jharkhand, Bihar, Chhattisgarh West Bengal. 5) Working Location will be decided from time to time after discussion with us

Responsible for whole FPGA design flow Responsible for finalization of Micro architectures Responsible for RTL design

Company Description Sri Shakthi Institute of Engineering and Technology (SSIET), founded in 2006 by Dr. S. Thangavelu, is dedicated to imparting character-building education and productive life skills. The institution has collaborated with notable global universities and industries such as CISCO, ORACLE, SIEMENS, Infosys, and WIPRO. Recognized by the TIMES Group as one of the 40 Centers for Excellence in Education in Tamilnadu, SSIET is also a member of IESA, NASSCOM, IEEE, and ICTACT. Leading firms such as Accenture, TCS, Oracle, and Verizon are among our esteemed recruiters. Role Description This is a full-time on-site role based in Tiruchirappalli for a Technical Trainer. The Technical Trainer will be responsible for planning and delivering technical training programs, developing instructional materials, and assessing trainees' progress. Daily tasks include conducting training sessions, preparing training content, and collaborating with other departments to identify training needs. The role also involves staying updated with the latest industry trends and technologies to ensure training relevance and quality.Hiring is happening for all four roles. Qualifications Experience as a Technical Trainer, including Technical Training skills Proficiency in Training & Development, including creating training materials and programs Excellent Communication and presentation skills for effective training delivery Ability to assess training needs, evaluate training effectiveness, and implement improvements Strong organizational and time management skills Relevant certifications or qualifications in training, such as a Bachelor's degree in a related field Experience in the engineering or technology sector is a plus Skills required: 1.MERN Stack Trainer HTML, CSS, JavaScript (ES6+) React.js (Hooks, State Management, Routing) Node.js and Express.js MongoDB (CRUD, Aggregation, Mongoose) RESTful API development Git and GitHub Deployment tools (Heroku, Vercel, Netlify) Basic understanding of authentication (JWT/OAuth) 2.DevOps Trainer Git, GitHub, GitLab Jenkins (CI/CD pipelines) Docker (containerization) Kubernetes (basic orchestration) Linux fundamentals and Bash scripting Cloud platforms (AWS/Azure/GCP basics) Infrastructure as Code (Terraform, Ansible – optional) Monitoring tools (Prometheus, Grafana – optional) 3.Cloud Trainer Cloud concepts (IaaS, PaaS, SaaS, Public/Private/Hybrid Cloud) AWS core services (EC2, S3, IAM, RDS, Lambda, VPC) Azure or GCP basics (VMs, Storage, App Services) IAM (Identity and Access Management) Basic networking and virtualization Cloud CLI tools & SDKs DevOps integration in cloud (CI/CD pipelines) Basic scripting (Bash, PowerShell or Python – optional) 4.VLSI Trainer Digital electronics and logic design Verilog and/or VHDL RTL design and simulation FPGA programming (Xilinx/Vivado, Altera/Quartus) EDA tools (ModelSim, Synopsys, Cadence) Synthesis and Timing Analysis ASIC/FPGA design flow Basic scripting (TCL, Shell – optional) minimum 5 years of industry experience needed

Minimum qualifications: Bachelor’s degree in Electrical Engineering or Computer Engineering, or equivalent practical experience. 15 years of experience in ASIC RTL design. Experience with RTL design using Verilog/System Verilog and microarchitecture. Experience with ARM-based SoCs, interconnects and ASIC methodology. Preferred qualifications: Master’s degree in Electrical Engineering or Computer Engineering. Experience driving multi-generational roadmap for IP development. Experience leading interconnect IP design team for low power SoCs. About The Job Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration. Google's mission is to organize the world's information and make it universally accessible and useful. Our Devices & Services team combines the best of Google AI, Software, and Hardware to create radically helpful experiences for users. We research, design, and develop new technologies and hardware to make our user's interaction with computing faster, seamless, and more powerful. Whether finding new ways to capture and sense the world around us, advancing form factors, or improving interaction methods, the Devices & Services team is making people's lives better through technology. Responsibilities Lead a team of people to deliver fabric interconnect design. Develop and refine RTL design to aim power, performance, area, and timing goals. Define details such as interface protocol, block diagram, data flow, pipelines, etc. Oversee RTL development, debug functional/performance simulations. Communicate and work with multi-disciplined and multi-site teams. Google is proud to be an equal opportunity workplace and is an affirmative action employer. We are committed to equal employment opportunity regardless of race, color, ancestry, religion, sex, national origin, sexual orientation, age, citizenship, marital status, disability, gender identity or Veteran status. We also consider qualified applicants regardless of criminal histories, consistent with legal requirements. See also Google's EEO Policy and EEO is the Law. If you have a disability or special need that requires accommodation, please let us know by completing our Accommodations for Applicants form .

Hiring Design Verification Engineers for Bangalore location. Exp: 5+ Years Company: Eximietas Design Job Area: Engineering Group, Engineering Group > Hardware Engineering. Eximietas: Eximietas Design is a leading technology consulting and solutions development firm specializing in the VLSI, Cloud Computing, Cyber Security, and AI/ML domains. Our success is anchored in the unparalleled expertise of our engineering leadership team, whose collective experience spans renowned tech giants like Google, Cisco, Microsoft, Oracle, Uber, Broadcom, and Sun. With a commitment to innovation and excellence, we deliver cutting edge solutions that empower businesses to thrive in the ever-evolving digital landscape. Minimum Qualifications: 5+ years of Design verification experience. Strong understanding of design concepts and ASIC flow Prior work experience on IP, Subsystem and Soc verification. Strong SV/UVM coding skills. Strong understanding of RAL Hands-on experience on third party VIP Integration. Strong solving , analytical and debugging skills. Strong understanding of AMBA protocols like generic AXI, APB, AHB Hands on verification experience in Low speed peripherals like, I2C, SPI, QSPI, DMA, Interrupt controller, GPIO, UART Hands on verification experience in any of the high-speed protocol like PCIE, CXL, Ethernet or USB Hands on experience in any of the memory protocols like DDR, LPDDR or HBM Hand on experience with verification tools such as VCS, Xcelium, Waveform analyzer and third-party VIP integration. Hands on experience with revision control flow like Git, SVN, Perforce Hands on experience withGLS and Power aware simulation (UPF) Experience in a team lead role, including guiding and mentoring team members, and ensuring effective collaboration and communication within the team. As a Senior verification engineer candidate will be responsible to work at IP, Subsystem or SoC verification related tasks. Responsibilities: Develop testbench components (Driver, Monitor, Scoreboard) from scratch or enhance an existing testbench for a given IP, Subsystem, or SOC. Understand design specifications and implementation to define the verification strategy. Create testbench micro-architecture, test plan, and coverage plan documents. Define the verification scope, develop test plans and tests, and establish the verification infrastructure to ensure design correctness. Implement SystemVerilog assertions and functional coverage. Analyze code coverage and address missing scenarios to meet coverage goals. Work with other verification team members to develop, execute, and analyze verification test cases and sequences, providing relevant solutions to issues. Collaborate with architects, designers, and pre- and post-silicon verification teams to meet deadlines. Coordinate with customer leads, ensuring all deliverables and timelines are met. Serve as the project's point of contact, responsible for verification signoff.

Vicharak is on the lookout for a passionate and dynamic Computer Science Intern who will play a pivotal role in the convergence of software and hardware, contributing to the development of cutting-edge technologies. This internship offers a unique opportunity to work on Vaaman, our revolutionary single board computer, and gain hands-on experience in software development, Linux kernel understanding, and hardware acceleration over FPGA. Responsibilities: Software Development: Collaborate with the software development team to design, implement, and optimize software solutions for Vaaman's diverse applications. Write clean, efficient, and well-documented code in languages such as C/C++ and other relevant programming languages. Linux Kernel Understanding: Gain insights into the Linux kernel architecture and contribute to kernel-level software components for Vaaman, ensuring seamless integration with the operating system. Hardware Acceleration Design: Work closely with hardware engineers to design and implement hardware acceleration solutions over FPGA, leveraging your understanding of computer architecture. Develop FPGA configurations to optimize performance for specific applications, contributing to the overall efficiency of Vaaman. Programming Languages: Utilize your proficiency in C/C++ and other programming languages to implement robust and efficient software solutions for Vaaman's diverse range of functionalities. Collaboration and Communication: Engage in cross-functional collaboration with software developers, hardware engineers, and other team members. Effectively communicate technical concepts and ideas within the team. Requirements: Currently pursuing a degree in Computer Science or related field. Strong programming skills in C/C++ and familiarity with other relevant languages. Understanding of Linux kernel architecture. Interest in hardware acceleration and FPGA development. Eagerness to learn and adapt to new technologies and challenges. Effective communication and teamwork skills. Preferred Qualifications: Previous experience with FPGA development tools and languages (Verilog, VHDL). Exposure to Linux kernel-level development. Familiarity with computer architecture concepts. Enthusiasm for exploring innovative solutions at the intersection of software and hardware.

Position: Electronics Engineer Location: Ahmedabad Employment Type: Full-time Job Responsibilities: Design and optimise low-noise analog front-end (AFE), low-noise, efficient DC-DC power supply circuits. Select and integrate high-resolution ADCs, precision op-amps, and mixed-signal conditioning circuits. Develop bias voltage circuits for detectors and minimize thermal drift. Perform PCB layout for low-noise analog systems (shielding, grounding, EMI/EMC mitigation). Collaborate with the FPGA team for sensor calibration and data acquisition. Required Skills & Experience: 5+ years in analog/mixed-signal design (preferably for sensors, imaging). Worked in ISRO is a plus Hands-on experience with: Low-noise pre-amplifiers, High-resolution ADCs, PCB design tools. DC-DC converters (isolated buck/boost), LDOs, and power sequencing,Thermal electric cooler (TEC) drivers, Thermal simulation tools, Low pass filters. Familiarity with thermal IR detectors (cooled/uncooled) is a big plus. Knowledge of thermal stability techniques. Education: B.Tech/M.Tech in Electronics Engineering or related field. Position: Embedded Systems Engineer – FPGA & Digital Design-2 nos(3+ Years Experience) Location: Ahmedabad Employment Type: Full-time Job Responsibilities: FPGA-Based Image Processing:Develop real-time algorithms for imager on FPGA (VHDL/Verilog). Optimise high-speed sensor interfaces (LVDS, SPI, parallel buses) for detectors. Implement data compression/streaming (GigE, USB3, or custom protocols). Microcontroller/Digital Electronics:Integrate microcontrollers (ARM Cortex, RISC-V) for system control. Design digital logic circuits (CPLDs, GPIO expanders) for peripheral interfacing. Collaborate on embedded firmware (C/C++) for real-time operation. System Integration:Bridge FPGA + MCU communication (AXI, SPI, UART). Debug mixed-signal PCB designs (oscilloscopes, logic analyzers). Signal Integrity. Required Skills & Experience: 3+ years in FPGA + Embedded Systems (imaging/sensor applications preferred). Proficient in VHDL/Verilog (Xilinx Zynq, Intel Cyclone, Lattice ECP5). Experience with high-speed serial protocols (LVDS, JESD204B, MIPI). Hands-on with ARM Cortex (STM32, NXP), RISC-V, or PIC MCUs. Familiarity with digital interfaces (I2C, SPI, UART, PWM). Education: B.Tech/M.Tech in ECE/Embedded Systems/Digital Electronics.

Principal Design Verification Engineer Bangalore, Karnataka, India + 2 more locations Date posted Jul 18, 2025 Job number 1848134 Work site Up to 50% work from home Travel 0-25 % Role type Individual Contributor Profession Hardware Engineering Discipline Silicon Engineering Employment type Full-Time Overview Microsoft Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) is the team behind Microsoft’s expanding Cloud Infrastructure and responsible for powering Microsoft’s “Intelligent Cloud” mission. SCHIE delivers the core infrastructure and foundational technologies for Microsoft's over 200 online businesses including Bing, MSN, Office 365, Xbox Live, Teams, OneDrive, and the Microsoft Azure platform globally with our server and data center infrastructure, security and compliance, operations, globalization, and manageability solutions. Our focus is on smart growth, high efficiency, and delivering a trusted experience to customers and partners worldwide and we are looking for passionate engineers to help achieve that mission. As Microsoft's cloud business continues to grow the ability to deploy new offerings and hardware infrastructure on time, in high volume with high quality and lowest cost is of paramount importance. To achieve this goal, the AI Silicon Engineering team is instrumental in defining and delivering operational measures of success for hardware manufacturing, improving the planning process, quality, delivery, scale and sustainability related to Microsoft cloud hardware. We are looking for seasoned engineers with a dedicated passion for customer focused solutions, insight and industry knowledge to envision and implement future technical solutions that will manage and optimize the Cloud infrastructure. We are looking for a Principal Design Verification Engineer to join the team. #SCHIE Qualifications Qualifications Bachelor’s degree in Electronics Engineering, Computer Engineering, Computer Science, or related field 12+ years' design verification experience with complex IPs and subsystems delivery Full-cycle IP/SOC verification experience: from definition to silicon, including DV environment architecture, effort estimation, test planning, test development, debugging, and coverage signoff Strong knowledge of verification principles, testbenches, stimulus generation, and UVM or C++ environments Extensive experience debugging RTL (Verilog) designs and working in simulation/emulation environments Additional or Preferred Qualifications : Familiarity with writing assertions and formal verification. Knowledge of networking protocols, such as RDMA and Ethernet. Exposure to post-silicon bring-up or debug of SoCs. Experience with scripting languages, including Python or Perl. Demonstrated skills in communication, collaboration, and teamwork, with the ability to work effectively in diverse and inclusive teams. Interest in or hands-on experience with deploying AI solutions. Ability to meet Microsoft, customer and/or government security screening requirements are required for this role. These requirements include but are not limited to the following specialized security screenings: Microsoft Cloud Background Check: This position will be required to pass the Microsoft Cloud Background Check upon hire/transfer and every two years thereafter. This role will require access to information that is controlled for export under export control regulations, potentially under the U.S. International Traffic in Arms Regulations or Export Administration Regulations, the EU Dual Use Regulation, and/or other export control regulations. As a condition of employment, the successful candidate will be required to provide either proof of their country of citizenship or proof of their US. residency or other protected status (e.g., under 8 U.S.C. 1324b(a)(3)) for assessment of eligibility to access the export-controlled information. To meet this legal requirement, and as a condition of employment, the successful candidate’s citizenship will be verified with a valid passport. Lawful permanent residents, refugees, and asylees may verify status using other documents, where applicable. Responsibilities Job responsibilities: The AISiE silicon team is seeking a qualified and motivated computer or electrical engineer to contribute to the development of high-quality designs. The team is responsible for producing advanced, custom IP and SoC designs that achieve complex, high-performance functions with exceptional efficiency. In this role you will: Lead design verification for complex IPs or subsystems. Work with architecture and design teams to meet all implementation goals. Create, review, and oversee test methodologies and execution. Build verification environments using constrained random stimulus and coverage metrics; run and debug simulations for quality. Drive and execute test plans for key features or products, setting and meeting coverage targets. Agile practices such as code reviews and sprint planning. Improve verification efficiency through new methods, processes, or tools. Provide technical leadership via mentorship, teamwork, and example. Uphold Microsoft values: Customer Focus, Adaptability, Collaboration, Growth Mindset, Results, Impact, Judgement, Diversity & Inclusion. Benefits/perks listed below may vary depending on the nature of your employment with Microsoft and the country where you work.  Industry leading healthcare  Educational resources  Discounts on products and services  Savings and investments  Maternity and paternity leave  Generous time away  Giving programs  Opportunities to network and connect Microsoft is an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to age, ancestry, citizenship, color, family or medical care leave, gender identity or expression, genetic information, immigration status, marital status, medical condition, national origin, physical or mental disability, political affiliation, protected veteran or military status, race, ethnicity, religion, sex (including pregnancy), sexual orientation, or any other characteristic protected by applicable local laws, regulations and ordinances. If you need assistance and/or a reasonable accommodation due to a disability during the application process, read more about requesting accommodations.

As a SOC Verification Engineer at Mirafra Technologies in Hyderabad, you will be responsible for performing System-level RTL verification, including FWHW coverification, SoC boot-flow, and integration-level validation. Your tasks will involve developing and verifying post-silicon validation sequences using C/C++, building and enhancing methodology-driven UVM testbenches, and collaborating on comprehensive test-plan development. You are expected to demonstrate solid expertise in Verilog, SystemVerilog, and C/C++, along with a strong working knowledge of the JTAG protocol. To excel in this role, you should have a strong background in SoC/Integration-level verification, ideally with UVM methodology. Hands-on experience in creating testplans, testbenches, and driving coverage closure is essential. Your proven skills in RTL coding and post-silicon validation, coupled with excellent debugging and collaboration capabilities, will be crucial for success in this position. By joining our team, you will have the opportunity to work on complex SoC designs and cutting-edge validation flows, shaping the future of SoC verification. Mirafra Technologies offers an innovative environment in Hyderabad that values expertise and creativity, allowing you to thrive and contribute to impactful projects. If you are passionate about SOC verification, have the required skills and experience, and are looking to join a dynamic team at the forefront of technology, we encourage you to apply. Feel free to share your CV at swarnamanjari@mirafra.com or tag and recommend this opportunity to individuals who match this profile. Join us at Mirafra Technologies and be part of a team that is driving innovation in SOC verification.,

The ideal candidate for this position at Qualcomm India Private Limited will utilize their knowledge and experience to offer leadership, technical guidance, and execute silicon validation of ARM or DSP based multiple SOC projects and platforms. The candidate should possess a strong understanding of digital design and SOC architecture, along with a good grasp of Object-Oriented Programming (OOP) concepts. Experience in Hardware Verification Languages (HVL) such as System Verilog, UVM/OVM, and System C, as well as Hardware Description Languages (HDL) like Verilog is required. Knowledge of ARM/DSP CPU architecture and High-Speed Peripherals such as USB2/3, PCIE, or Audio/Multimedia is essential. Additionally, familiarity with Power-aware Verification, GLS, Test vector generation, and Version managers like Clearcase/perforce is advantageous. Proficiency in scripting languages like Perl, Tcl, or Python is preferred. The candidate should possess strong analytical and debugging skills. Experience in Hifi Processor, Soundwire interface, ANC, DMA, I2S verification is considered a plus. Qualcomm is looking for candidates who hold a Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or a related field with at least 6 years of Hardware Engineering or related work experience. Alternatively, candidates with a Master's degree in the mentioned fields and 5+ years of relevant experience, or a PhD with 4+ years of relevant work experience are encouraged to apply. A total of 12-15 years of experience with a Bachelor's/Master's degree in Electrical/Electronics engineering is also acceptable. Qualcomm is an equal opportunity employer and is committed to providing accessible processes for individuals with disabilities during the application/hiring process. Interested candidates are encouraged to reach out for accommodations if needed. Qualcomm expects its employees to comply with all relevant policies and procedures, including those related to security and the protection of confidential information. Please note that Qualcomm's Careers Site is exclusively for individuals seeking job opportunities at Qualcomm. Staffing and recruiting agencies, as well as individuals being represented by an agency, are not permitted to use this site for submissions. Qualcomm does not accept unsolicited resumes or applications from agencies. For further information about this role, please contact Qualcomm Careers directly.,

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Be a member of the team that plays a significant role in ensuring the quality of Connectivity SoCs through structured DFT, Automatic Test Pattern Generation (ATPG) and Memory Built-In Self-Test (MBIST) techniques. Primary responsibilities will include , Interfac e with design team to ensure DFT design rules and coverages are met. Generating high quality manufacturing ATPG test patterns for stuck-at (SAF) , transition fault (TDF ) models through the use of on-chip test compression techniques. M BIST verification (including repair), test pattern generation through Mentor tool. ATPG (SAF, TDF) and MBI ST verification using unit delay and min/max timing corner s imulations . Work with the P roduct /Test engineering teams on the delivery of manufacturi ng test patterns for ATE . Responsible for supporting post silicon debug effort, issue resolution . Responsible for Diagnostic Tool generation for ATPG , MBIST and bring-up on ATE. Developing, enhancing and maintaining scripts as necessary Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field. Minimum of 1-6 year s experience in ASIC/DFT - simulation and Silicon validation Detailed knowledge on DFT concepts, pattern simulation, Silicon debug and yield enhancement In depth knowledge and hands-on experience in ATPG - coverage analysis. In depth knowledge of Memory verification, repair and failure root-cause analysis. Experience with any of these tools is required ATPG - TestKompress MBIST - Mentor ETVerify Simulation - VCS (preferred), modelsim . Expertise in scripting languages such as Perl , shell, etc. is an added advantage Ability to work in an international team, dynamic environment with good communication skills Ability to learn and adapt to new tools , methodologies. Ability to do multi-tasking & work on several high priority designs in parallel Applicants Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.