At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Position: Lead Hardware Engineer - DFT IP R&D Location: Noida Experience: 4-6 Years Job Description Cadence Design Systems is looking for a highly motivated software and hardware engineer to work as a member of the R&D staff on Cadence’s MODUS DFT software solution. MODUS is a complete product that encompasses Design for Test Solution for Achieving High Coverage, Reduced Test Time, and Superior PPA. The product breadth means we are looking for skilled and motivated candidates with backgrounds in RTL design, DFT architecture, computer architecture, verification, RTL compilation, placement, static timing analysis, power analysis, routing, extraction, and optimization. You will be part of a team responsible for creating the innovative technologies required for technology leadership in the DFT space. This position will encourage building of a solid foundation in logic circuits and gentle entry into larger DFT IP tool development. Development responsibilities include designing, developing, troubleshooting, debugging and supporting the MODUS software product. Job Responsibilities You will play a key role in developing cutting-edge design-for-testability (DFT) tools, contributing to improved usability and quality through feature enhancement and rigorous verification. The role’s day to day responsibilities cover: Designing and verifying Verilog/SystemVerilog/UVM RTL and test benches for DFT IP features, including new DFT IPs, full scan, compressed/uncompressed scan, memory BIST, JTAG, IEEE 1500, and boundary scan at block and SoC levels. Providing R&D support to application and product engineers, including problem analysis, debugging, and the development of new features to optimize synthesis results for timing, area, and power. There is a significant research element to the work that Cadence does that is truly innovative; we don’t know what the answers are when we start out! Mentoring and support will be provided to the successful candidate to both enable contribution to the large EDA problem domain and to develop their problem-solving skills into professional engineering skills. Job Qualifications Proficient in RTL design using Verilog and SystemVerilog. In-depth knowledge of front-end EDA tools (Verilog/SV simulators, linters, CDC checkers). Experience with SystemVerilog assertions, checkers, and advanced verification techniques. Knowledge of scripting languages, particularly Perl or Python is highly desirable. Knowledge of DFT methodologies is a plus. Strong foundational knowledge of data structures and algorithms. Familiarity with synthesis, static timing analysis (STA). Excellent written and verbal communication and presentation skills. Experience and understanding of EDA tool development concepts is a plus. Position Qualifications M.Tech, M.E, B.Tech, B.E. in EE/ECE/CS or Equivalent Good understanding of Digital Electronics. Prior knowledge of Verilog/System Verilog and EDA tools required. We’re doing work that matters. Help us solve what others can’t. Show more Show less

Are you an expert in Design for Test (DFT) , and we're looking for a talented Principal DFT Engineer to join our dynamic engineering team in Hyderabad. This is a unique opportunity to lead critical DFT implementation for cutting-edge ASIC designs while shaping the future of our DFT practices. As a Principal DFT Engineer , you will take on a leadership role in delivering DFT (including ATPG) implementation at both the chip and block levels. You will lead DFT strategy, manage the implementation of DFT structures, perform formal checks, debug test pattern mismatches, and ensure timing closure in DFT modes. This role may involve acting as an industry-leading expert in a specific area of DFT or leading a team to deliver complete DFT solutions from architecture to pattern generation. Key Responsibilities: DFT Strategy & Implementation: Lead the DFT work in projects, including the definition of DFT strategy, implementation of DFT structures, and verification of the DFT structures to meet the project's testability requirements. DFT Expertise: Serve as an expert in DFT tools and techniques, demonstrating advanced skills in tools from Mentor, Synopsys, or Cadence. Complex Problem Solving: Address and resolve complex issues related to DFT, ATPG, timing closure, and ATE chip bring-up, providing solutions to challenges across multiple projects. Leadership & Mentorship: Lead DFT design projects and mentor junior engineers, providing guidance in technical aspects and helping to manage the team’s workflow and priorities. Customer Interface & Project Management: Act as the main customer interface for DFT aspects of the project, ensuring clear communication and alignment. Take responsibility for managing multiple assignments from different customers and teams. Continuous Improvement: Analyse customer feedback and recognise business opportunities. Collaborate with the Sondrel Business Team to push these opportunities forward. Technical Contributions: Contribute to technical white papers, present at internal and external conferences, and participate in sales support, such as preparing Statements of Work. Team Organisation: Organise and manage teams effectively, setting and adjusting priorities quickly to meet project timelines. Key Relationships: Internal: Reports to: Regional Engineering Head Collaborates with: Engineers, Project Leaders, Sales, Finance, and HR teams Supervises: Engineers, Senior Engineers, and Staff Engineers External: Customers: Minimal technical engineer-to-engineer communication Suppliers: EDA Tool Vendors, Foundries, and Assembly Houses Qualifications: Essential: A Bachelor’s degree, Master’s, or PhD in Engineering or a related field. Typically 10+ years of experience in the microelectronics field, specifically in DFT. Strong Project Management skills. Desirable: A project management qualification. Additional experience in high-level design teams, especially in DFT architecture. Skills & Experience: Essential: Extensive experience with DFT tools (e.g., Mentor, Synopsys, Cadence) and techniques including: IJTAG/Scan/MBIST/BSD/LBIST/Boundary Scan insertion. ATPG/TC improvements and pattern generation. Pattern simulation (Zdel/SDF) and pattern verification (VCS, NC-Verilog, NC-Sim, ModelSim). Diagnosis of ATE failures and silicon bring-up. Deep understanding of DFT architecture design and implementation. Strong problem-solving skills and ability to lead or collaborate in a DFT team. Expertise in managing complex, technical DFT projects. Advanced scripting skills in Python, TCL, Perl, Shell, or similar languages. Proven ability to evaluate issues, define solutions, and make sound judgments in technical environments. Desirable: Ability to apply advanced knowledge in specific areas of physical design or a broad understanding across multiple sub-functions of DFT. Proven capability to contribute to business development and customer engagement. Attributes: Team leader with strong organisational skills and the ability to manage multiple priorities. Active listening skills and the ability to motivate a team to work under pressure. Excellent attention to detail and high level of self-motivation. Strong conflict resolution skills and the ability to quantify risks and estimate engineering effort. Ability to think creatively and "outside the box." Why Aion Silicon? At Aion, we are committed to advancing the boundaries of digital design. You’ll be leading key DFT projects in a collaborative, innovative, and growing team. This is a fantastic opportunity to have a direct impact on both technical and business outcomes while working on cutting-edge ASIC designs in a global environment. If you are a seasoned Principal DFT Engineer with a passion for leading technical teams and projects, we would love to hear from you. Show more Show less

Are you ready to take the next step in your career and contribute to cutting-edge ASIC and IP/SoC development? We are looking for an experienced Design Engineer to join our team in Hyderabad. This is an exciting opportunity to work with a talented team on high-impact projects, pushing the boundaries of digital design in a collaborative and fast-paced environment. As a key technical contributor, you will work closely with ASIC engineering management to define and implement digital IP/SoC designs, and integrate these with third-party designs into customer ASICs and SoCs. You’ll be part of a multi-site development team, ensuring the delivery of high-quality designs that meet customer requirements and solving complex technical challenges. Key Responsibilities: Design & Implementation: Specify, micro-architect, implement, and perform design verification for complex RTL IP blocks, from basic SoC building blocks to advanced video processing and encoding/decoding logic. IP Development Cycle: Take part in the full lifecycle of IP development—from customer concept to backend layout and silicon validation. Collaboration: Work closely with SoC architects to ensure designs align with project requirements and integrate seamlessly with the rest of the SoC. Technical Guidance: Provide technical advice and solutions to design, verification, physical design, silicon validation, and production test teams. Customer & Team Engagement: Analyse customer requirements and implement functional digital designs and integration flows for complex SoCs. Provide support for customer-facing technical discussions. Tool & Script Development: Develop, maintain, and deploy proprietary scripts and tools for ASIC/SoC design and database management. Leverage industry-leading EDA tools for design quality assurance, power optimisation, and synthesis/timing analysis. Continuous Learning: Stay up-to-date with the latest advances in engineering technologies and methodologies to maintain our competitive edge. Mentorship: Coach junior engineers and support them in all aspects of design activities, including coding, synthesis, debug, DFT, and backend integration. Technical Publications: Contribute to technical white papers, and provide sales support as part of a collaborative team. Key Relationships: Internal: Collaborate with Engineers, Senior Engineers, Principal Engineers, Project Managers, Sales, Finance, and HR teams. External: Technical communication with customers (minimal), and liaising with EDA Tool Vendors, Foundries, and Assembly Houses. What We're Looking For: Qualifications: Essential: Degree/Masters or PhD in Electrical Engineering, Computer Science, or a related field. Typically, 5+ years of relevant experience in digital design and IP/SoC development. Desirable: A Masters or PhD in a related subject with practical experience of 5+ years. Skills & Experience: Essential: Expertise in IP design, implementation, and verification. Strong knowledge of RTL synthesis, performance, and power analysis. In-depth understanding of digital design concepts and problem-solving capabilities. Proficient in HDL coding (VHDL, Verilog, SystemVerilog). System design knowledge, including clock domain management, reset schemes, and power management. Experience with SoC level verification (HW/SW co-verification, multi-mode simulation, gate-level simulation). Experience with design checking tools (Lint, CDC, LEC). Strong communication skills and ability to provide technical guidance to junior engineers. Desirable: Familiarity with ARM processor subsystems, video processing, bus protocols (AXI/AHB/ACE). Experience with low power design methodology (UPF/CPF) and synthesis/timing analysis. Experience with Tcl, Perl, Python, SystemC, IPXACT, and database management. Familiarity with Linux software frameworks. Attributes: Self-motivated with the ability to work independently and as part of a team. Strong problem-solving skills and ability to adapt quickly to changing priorities. Excellent attention to detail and time management skills. A fast learner who thrives in a dynamic, collaborative environment. Show more Show less

Aion Silicon is looking for an experienced Verification Engineers to join our office in Hyderabad. In this hands-on technical role, you will contribute to a variety of SoC , subsystem , and IP development projects , taking responsibility for the verification process from planning to coverage closure. Working closely with ASIC/SoC project leaders , you will architect, specify, and lead the implementation of high-level verification projects, using advanced verification languages. You will also collaborate with multi-site development teams and customers to propose solutions and ensure the delivery of high-quality verification environments and methodologies. If you are a passionate and innovative engineer who enjoys solving complex verification problems and leading teams, this could be the perfect opportunity for you. Key Responsibilities: Verification Expertise: Provide hands-on expertise in IP and SoC-level functional verification , including the development of testbenches and implementation of verification plans . Problem Solving: Proactively address and resolve verification challenges, working independently or as part of a collaborative team. Mentorship & Team Leadership: Mentor junior team members, fostering a creative and innovative environment and helping to develop new ideas and approaches. Industry Knowledge: Stay up-to-date with the latest advancements in verification technologies and methodologies, ensuring Sondrel remains at the forefront of industry best practices. Cross-Functional Collaboration: Coordinate with cross-functional teams to define verification strategies and create comprehensive verification plans for SoC designs. Optimised Design Solutions: Deliver cutting-edge, optimised solutions for functional verification, ensuring high-quality outcomes. Recruitment Support: Contribute to the recruitment process by interviewing candidates and assisting in team expansion activities. Key Relationships: Internal: Reports to: Engineering Manager/Principal Engineer Collaborates with: Engineers, Senior Engineers, Principal Engineers, Project Managers, and HR teams Supervises: Verification Team (including junior engineers) External: Customers: Minimal technical engineer-to-engineer communication Suppliers: EDA Tool Vendors, Foundries, and Assembly Houses Qualifications: Essential: A degree, Master's, or PhD in a relevant subject. Typically, 5+ years of experience in SoC , subsystem , or IP verification in a team environment. Desirable: A Master's or PhD in a related subject, with 5+ years of practical experience. Skills & Experience: Essential: Proven experience in metric-driven verification , including verification planning , functional coverage , code coverage , unit-level verification , and top-level verification . Expertise in testbench architecture design and hands-on experience with System Verilog , UVM , ABV , and constrained random verification . Experience with PSL , SVA , e , VMM , OVM . Familiarity with formal verification techniques such as model checking , CDC , and power-aware verification (e.g., UPF ). Experience with RTL and gate-level simulation , as well as SoC-level verification , including HW/SW co-verification and multi-mode simulation . Familiarity with HW acceleration techniques like emulation . Experience with verification infrastructure automation (e.g., Perl , Python , Java , Tcl , IP-XACT , UCDB ). Strong knowledge of C programming for verification tasks. Demonstrated ability to listen to customer feedback , recognise opportunities for technical innovation , and provide constructive feedback. Desirable: Experience in contributing to or presenting technical white papers . Advanced knowledge or experience in multiple verification sub-functions. Attributes: Essential: Strong leadership, communication, and problem-solving skills. Excellent negotiation , organisation , and time management skills. Self-organised with the ability to respond to changing priorities quickly. Collaborative team player , with the ability to work under pressure. Self-motivated , with a proactive approach to tasks. Exceptional attention to detail and focus on high-quality results. Ability to work independently , with a strong sense of initiative and responsibility. Why Aion? At Aion, we are committed to innovation and excellence in SoC design. Joining our team in Hyderabad will provide you with the opportunity to work on cutting-edge technologies and contribute to high-impact projects. You will be part of a dynamic, supportive team where you can grow your technical expertise and leadership capabilities, while helping shape the future of semiconductor design. If you're an experienced Verification Engineer eager to contribute to innovative design solutions, we'd love to hear from you. Show more Show less

Company: Qualcomm India Private Limited Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: General Summary: Join Qualcomm’s Wireless IP team to design and develop cutting-edge RTL for next-generation cellular and Wi-Fi modem IPs used in mobile, wearable, and IoT platforms. You will work on high-performance, low-power digital designs across the full VLSI development cycle—from architecture and micro-architecture to RTL implementation and SoC integration. This role offers the opportunity to collaborate with global teams and contribute to market-leading wireless solutions. Key Responsibilities: Design and implement RTL for wireless modem IPs and SoC subsystems using Verilog/SystemVerilog. Develop micro-architecture specifications and deliver high-quality, synthesizable RTL. Integrate complex subsystems into SoC environments and support design convergence. Collaborate with system architects, verification, SoC, software, DFT, and physical design teams. Apply low-power design techniques including clock gating, power gating, and multi-voltage domains. Analyze and optimize for performance, area, and power. Ensure protocol compliance and performance of interconnects, buses (AXI, AHB, APB), and bridges. Conduct CDC and lint checks using tools like Spyglass and resolve waivers. Participate in post-silicon debug and bring-up activities. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field. Preferred Skills & Experience: 2–15 years of experience in digital front-end ASIC/RTL design. Strong expertise in Verilog/SystemVerilog RTL coding and micro-architecture development. Familiarity with wireless protocols such as IEEE 802.11 (a/b/g/n/ac/ax/be), LTE, or 5G NR is highly desirable. Solid understanding of bus protocols (AXI, AHB, APB) and bridge logic. Experience with wireless modem IPs or similar high-performance digital blocks is a plus. Familiarity with low-power design methodologies and CDC handling. Hands-on experience with tools like Spyglass, 0-in, Design Compiler, PrimeTime, and simulation environments. Exposure to post-silicon debug and SoC integration challenges. Strong documentation and communication skills. Self-motivated with a collaborative mindset and ability to work with minimal supervision. Minimum Qualifications: Bachelor’s or Master’s degree in Electronics, VLSI, Communications, or related field. Proven experience in RTL design and SoC development. Applicants : Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies : Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers. 3076712 Show more Show less

Company: Qualcomm India Private Limited Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: General Summary: Join Qualcomm’s cutting-edge hardware engineering team to drive the design verification of next-generation SoCs, with a focus on wireless technologies including WLAN (IEEE 802.11). You will work on IP and subsystem-level verification, collaborating with cross-functional teams to deliver high-performance, low-power silicon solutions. A strong understanding of on-chip buses and bridges is essential to ensure seamless integration and performance across subsystems. Key Responsibilities: Develop and execute verification plans for complex SoC designs and IP blocks. Architect and implement testbenches using SystemVerilog and UVM/OVM methodologies. Perform RTL verification, simulation, and debugging. Collaborate with design, architecture, and software teams to ensure functional correctness. Contribute to IP design reviews and sign-off processes. Support post-silicon validation and bring-up activities. Analyze and verify interconnects, buses (e.g., AMBA AXI/AHB/APB), and bridges for performance and protocol compliance. Conduct CPU subsystem verification including coherency, cache behavior, and interrupt handling. Perform power-aware verification using UPF/CPF and validate low-power design intent. Execute performance verification to ensure bandwidth, latency, and throughput targets are met. Preferred Skills & Experience: 2–15 years of experience in digital design and verification. Deep understanding of bus protocols and bridge logic, including hands-on experience with AXI, AHB, and APB. Experience with CPU subsystem verification and performance modeling. Familiarity with wireless protocols (IEEE 802.11 a/b/g/n/ac/ax/be) is a plus. Proficiency in SystemVerilog, UVM/OVM, Verilog, and scripting languages (Perl, Tcl, Python). Experience with power-aware verification methodologies and tools (e.g., UPF, CPF). Familiarity with performance verification techniques and metrics. Exposure to tools like Clearcase/Perforce and simulation/debug environments. Strong analytical, debugging, and communication skills. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field. Minimum Qualifications: Bachelor’s or Master’s degree in Electrical/Electronics Engineering, Computer Science, or related field. Relevant experience in hardware design and verification. Applicants : Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies : Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers. 3076713 Show more Show less

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Description / Summary Join our elite North America hardware application engineering team, and work closely with the best AEs, PEs and R&D in EDA industry. Join a top class company that has been listed in Fortune magazine and Great Place to Work as one of the Worlds Best Workplaces for the eleven years in a row! You will report directly into the North America Verification Field Applications Engineering (FAE) Team, and be co-located in India alongside our R&D teams. You will be a leading product expert on advanced FPGA based prototyping focusing on Cadence s Protium X3 system . Your focus will be to work on key campaigns in North America, driving differentiated HW emulation solutions at our industry leading semiconductor and system companies and you will form a key bridge between our customers, North America AEs and R&D teams. Key Responsibilities Assume technical leadership for Protium compiler flow and become the go-to expert for the rest of the North America field AE team . Provide in-depth technical assistance in collaboration with R&D to help support advanced Protium based flows to secure design wins . Champion the customer needs and work closely with R&D in India to develop competitive and creative technical solutions. Strong experience in FPGA based emulation or prototyping. Experience in portioning for Xilinx FPGA s and analyze bottlenecks to performance. Knowledge of interface bring up on FPGA platforms like PCIe and DDR Experience with SystemVerilog, VHDL, Verilog, C/C++/SystemC Strong verbal and written communication skills, with the ability to effectively bridge communication channels between external customers, NA FAE team and internal R&D teams. Strong teamwork skills 12+ years industry experience We re doing work that matters. Help us solve what others can t.

NVIDIA is seeking an elite Senior Verification Engineer to verify the design and implementation of the next generation of memory subsystem units for the world s leading GPUs and SOCs. This position offers the opportunity to have real impact in a dynamic, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence. We have crafted a team of outstanding people stretching around the globe, whose mission is to push the frontiers of what is possible today and define the platform for the future of computing. The GPU started out as an engine for simulating human imagination, conjuring up the amazing virtual worlds of video games and Hollywood films. Today, NVIDIA s GPU simulates human intelligence, running deep learning algorithms and acting as the brain of computers, robots, and self-driving cars that can perceive and understand the world. NVIDIA is increasingly known as the AI computing company. What you ll be doing: You will be responsible for verifying the ASIC design, architecture and micro-architecture of memory sub-systems/units using advanced verification methodologies. Understand the design and implementation, define the verification scope, develop the verification infrastructure and verify the correctness of the design. Coming up come up with test plans, tests and verification infrastructure for complex IPs/sub-systems. Build reusable bus functional models, monitors, checkers and scoreboards following coverage driven verification methodology. Work on advanced verification methodologies like SV/UVM. Perform functional coverage driven verification closure. Working with architects, designers, and pre and post silicon verification teams to accomplish your tasks. What we need to see: B. Tech. / M. Tech. , or equivalent experience. 5+ years of relevant experience. Experience in verification of complex IPs/units and sub-systems. Background in verification using random stimulus along with functional coverage and assertion-based verification methodologies. Expertise in Verilog. Knowledge in SystemVerilog or similar HVL / UVM or VMM. Ways to stand out from the crowd: Experience in memory subsystem or network interconnect IP verification. Good debugging and analytical skills with sound scripting knowledge. Good communication and excellent team player. With competitive salaries and a generous benefits package, NVIDIA is widely considered to be one of the most desirable employers in the world. We have some of the most brilliant and talented people in the world working for us. If you are creative, autonomous and love a challenge, we want to hear from you. #LI-Hybrid

NVIDIA is seeking passionate, highly motivated, and creative senior design engineers to be part of its Graphics team working on the design of state of the art memory subsystem components used in their industry-leading Graphics Processors. This position offers the opportunity to have real impact in a dynamic, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence. We have crafted a team of exceptional people stretching around the globe, whose mission is to push the frontiers of what is possible today and define the platform for the future of computing. In this position, you will be expected to make architectural trade-offs based on features, performance requirements and system limitations, come up with micro-architecture, implement in RTL, and deliver a fully verified, synthesis/timing clean design. You will work with architects, other designers, pre- and post-silicon verification teams, synthesis, timing and backend teams to accomplish your tasks. What you ll be doing: Own micro-architecture and RTL development of design modules. Micro-architect features to meet performance, power and area requirements. Work with HW architects to define critical features. Collaborate with verification teams to verify the correctness of implemented features. Co-operate with timing, VLSI and Physical design teams to ensure design meets timing, interface requirements and is routable. Interact with FPGA and S/W teams to prototype the design and ensure that S/W is tested. Work on post-silicon verification and debug. What we need to see: BS / MS or equivalent experience. 7+ years of design experience. Experience in RTL design of complex design units for at least two or three projects. Exposure to design and verification tools (VCS or equivalent simulation tools, debug tools like Debussy, GDB). Deep understanding of ASIC design flow including RTL design, verification, logic synthesis, prototyping, DFT, timing analysis, floor-planning, ECO, bring-up & lab debug. Expertise in Verilog. Ways to stand out from the crowd: Design experience in memory subsystem or network interconnect IP. Good debugging and problem solving skills. Scripting knowledge (Python/Perl/shell). Leadership experience in leading small 2-3 member teams. Good interpersonal skills and ability & desire to work as a part of a team. NVIDIA is widely considered to be one of the technology world s most desirable employers. We have some of the most brilliant and talented people in the world working for us. If you are creative, autonomous and love a challenge, we want to hear from you. #LI-Hybrid

Company Qualcomm India Private Limited Job Area Engineering Group, Engineering Group > Hardware Engineering General Summary Strong knowledge of digital design and SOC architecture. Good understanding of OOP concepts Experience in HVL such as System Verilog, UVM/OVM & System C Experience in HDL such as Verilog Knowledge of ARM/DSP CPU architecture, High Speed Peripherals like USB2/3, PCIE or Audio/Multimedia Familiarity with Power-aware Verification, GLS, Test vector generation is a plus Exposure to Version managers like Clearcase/perforce Scripting language like Perl, Tcl or Python Analytical and Debugging skil Minimum Qualifications Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field. Exp -3-6 yrs with Bachelors or Masters in Engineering Applicants : Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies : Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers. 3076383 Show more Show less

Join Our Aprisa Team! Looking for Siemens EDA ambassadors Siemens EDA is a global technology leader in Electronic Design Automation software. Our software tools enable companies around the world to develop highly innovative electronic products faster and more cost-effectively. Our customers use our tools to push the boundaries of technology and physics to deliver better products in the Increasingly complex world of chip, board, and system design. We Make Real What Matters. This is your role. At Aprisa, we offer complete functionality for top-level hierarchical design and block-level implementation for complex digital IC designs. Our detail-route-centric architecture and hierarchical database enable you to accelerate design closure and achieve optimal quality of results at a driven runtime. We're excited to be working on the next-generation RTL-to-GDSII solution, and we want YOU to be a part of this innovative journey! This is the Role Drive and be responsible for the design and development of various pieces of the RTL synthesis technology, logic optimizations, RTL design IP development, and low power synthesis. Guide and lead others toward successful project completion by innovating and implementing powerful solutions. Collaborate with a hardworking team of experts. Must-Have Requirements B.Tech or M.Tech in CSE/EE/ECE from a reputed engineering college with 8-12 years of experience in software development. Validated understanding of C/C++, algorithms, and data structures. Demonstrate excellent problem-solving and analytical skills. Lead and encourage the team with your expertise. Great to Have Experience in: You will have the opportunity to develop RTL synthesis tools and work with System Verilog, VHDL, DFT, formal verification, and Dynamic Power. Additionally, you will design C or RTL IPs and optimize RTL & gate level logic, area, timing, and power. Your experience in developing parallel algorithms and job distribution strategies will be highly valued, as well as your proficiency in using scripting languages like Python and TCL. We are Siemens A collection of over 377,000 minds building the future, one day at a time in over 200 countries. We're dedicated to equality, and we encourage applications that reflect the diversity of the communities we work in. All employment decisions at Siemens are based on qualifications, merit and business need. Bring your curiosity and creativity and help us shape tomorrow! We offer a comprehensive reward package which includes a competitive basic salary, variable pay, other benefits, pension, healthcare and actively support working from home. We are an equal opportunity employer and value diversity at our company. We do not discriminate based on race, religion, color, national origin, sex, gender, gender expression, sexual orientation, age, marital status, veteran status, or disability status. Show more Show less

Noida, Uttar Pradesh, India Category: Engineering Hire Type: Employee Job ID 11861 Date posted 06/03/2025 Description Candidate will be part of TCM Front End team. Design, develop, troubleshoot the core algorithms used in TCM Front End tool Design and develop standard and customized features / checks in TCM FE for seamless consumption of VCS OM. Will be working with other local and global teams of TCM and VC SpyGlass Design and development of state-of-the-art EDA tools involving development of new and innovative algorithms. Create test cases to test the developed feature. Skills Required Strong knowledge of Front-end compilers and their flow Ability to develop new software architecture and good leadership skills. Fluent in C/C++ with extensive work experience in data-structures and algorithms. Good knowledge of Verilog, SystemVerilog & VHDL HDL. Excellent algorithm analysis skills and a good knowledge of data structures. Familiarity with ASIC design flow and the EDA tools and methodologies used therein. Familiarity with multi-threaded and distributed code development. Self-motivation, self- discipline and the ability to set personal goals and work consistently towards them in a dynamic environment will go far towards contributing to your success. Quality focus - one who believes in quality and wants to make a difference. Experience of production code development on Unix/Linux platforms. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

Siemens EDA is a global technology leader in Electronic Design Automation software. Our software tools enable companies around the world to develop highly innovative electronic products faster and more cost-effectively. Our customers use our tools to push the boundaries of technology and physics to deliver better products in the increasingly complex world of chip, board, and system design. About the role: We are seeking a highly motivated and detail-oriented Application Support Engineer to join our dynamic, fast paced and growth-mindset team. In this role, you will be focused on supporting the Questa verification products, specifically in Verification IP line of products. In this position, you will be working closely with the product engineering team, field application engineers and customers. As an ASE, you will be solving some of our customers complex design, testbench and environment issues in the domain of functional verification. You will also be working closely on creating knowledge-based content and providing expertise on the Questa platform. You will work with multiple customers to understand their challenges and flow and be involved in technical presentations, training, evaluation and competitive benchmarking. You will part of the larger application support engineering organization and will be interfacing regularly with the North American and PACRIM teams. Minimum Qualifications: BS Electronic/Computer Engineering from an accredited institution Minimum of 2+ years of Digital Design/Verification experience Knowledge of VHDL or Verilog, or SystemVerilog RTL languages for ASIC or FPGA design Experience with ASIC or FPGA hardware design and implementation using RTL tool flows and methodologies Knowledge of Windows and Linux OS Self-motivated, flexible, self-disciplined, and comfortable in a dynamic, quick-moving environment. Strong interpersonal and communications skills with the ability to quickly establish rapport and credibility with our customers, sales, and product teams. Strong oral, and written communication, and presentation skills Excellent organizational and time management skills Preferred qualifications: MS Electronic/Computer Engineering Knowledge of UVM and System Verilog for Verification Clock Domain Crossing (CDC), Static and Formal Verification – Formal Applications Working knowledge of Working knowledge of Questa-Modelsim, VCS (Synopsys), NCSim (Cadence) or Aldec simulators. Knowledge of C/C++ programming languages Demonstrated proficiency with Object-Oriented Programming experience in test bench architecture and design Knowledge of scripting languages (e.g., Shell, Tcl, Perl, Python) Knowledge of CDC, low power and formal methodologies. Location : Noida/ Bangalore Why us? Working at Siemens Software means flexibility - Choosing between working at home and the office at other times is the norm here. We offer great benefits and rewards, as you'd expect from a world leader in industrial software. A collection of over 377,000 minds building the future, one day at a time in over 200 countries. We're dedicated to equality, and we welcome applications that reflect the diversity of the communities we work in. All employment decisions at Siemens are based on qualifications, merit, and business need. Bring your curiosity and creativity and help us shape tomorrow! Siemens Software. Transform the Everyday Show more Show less

Role: Verification/ Hardware Design Engineer Locations: Hyderabad No. of positions: Multiple Experience : 4+ years Requirements Detailed Job functions: Understand the FPGA design functionality, create detailed verification cases and test procedures. Experience in designing Analog circuit, Digital circuits and Power circuits. Hands-on Schematic design, Simulation and design verification. Hands-on troubleshooting Hardware issues of Analog and Digital circuits and Software issues. Well versed with FPGA design flow. Should have hands on experience and ability to work individually and be a team player. Must Skills Hands-on experience in EDA and Simulation Tools – Xilinx Vivado, Altera Quartus, Mentor graphics, and Synopsys. Familiarity with communication and serial protocols – ARINC, RS 232/422/485, SPI, and I2C. RTL development using – VHDL, Verilog, and System Verilog. Experience of working in a Windows and Linux based environment. Strong in oral and written communication skills. Nice To Have Experience in working with defense and aerospace industries. Experience in working on DOORS. Experience in peer reviews. Show more Show less

Looking for Siemens EDA ambassadors: Siemens EDA is a global technology leader in Electronic Design Automation software. Our software tools enable companies around the world to develop highly innovative electronic products faster and more cost-effectively. Our customers use our tools to push the boundaries of technology and physics to deliver better products in the Increasingly complex world of chip, board, and system design. Real trendsetters in every language. Before our software developers write even a single line of code, they have to understand what drives our customers. What is the environment and the user story based on? Implementation means trying, testing, and improving outcomes until a final solution emerges. Knowledge means exchange discussions with colleagues from all over the world. Join the team and enjoy the freedom to think in completely new categories. Be an integral part of a team that is developing comprehensive verification IPs for interfaces such as PCIe Gen5/Gen6, USB3.2, 400Gigabit Ethernet, DDR5, LPDDR5 and leading coherency protocols like CXL for use with Questa RTL simulation! We Make Real What Matters. This is your role. Questa verification IP’s help design teams find more bugs in less time than conventional simulation techniques. You will specify, implement, test and enhance these verification components for a wide range of end user applications. You will work on technologies involving SV, UVM, Assertions, Coverage, Test plan, BFM design, debug, and logger. You will work well with TMEs and Field AEs or directly with customers to deploy or resolve customer issues. We don’t need superheroes, just super minds. We are seeking Electronics Engineers (B.Tech/M.Tech) or professionals from related fields, graduated from reputed institutes, who possess strong expertise in verification engineering and bring 1-4 years of hands-on experience to the table. You've sound knowledge of System Verilog for test bench with exposure to verification methodologies like UVM, VMM etc. You've intimate knowledge of one or more standard bus protocols, like PCIe, USB, SATA, NVMe, Flash, DIMM etc. We are phenomenal teammates, resilient and sincere, with a passion for learning new things and building our knowledge base in new areas! We are an equal opportunity employer and value diversity at our company. We do not discriminate on the basis of race, religion, color, national origin, sex, gender, gender expression, sexual orientation, age, marital status, veteran status, or disability status. We are Siemens A collection of over 377,000 minds building the future, one day at a time in over 200 countries. We're dedicated to equality, and we welcome applications that reflect the diversity of the communities we work in. All employment decisions at Siemens are based on qualifications, merit, and business need. Bring your curiosity and creativity and help us shape tomorrow! We offer a comprehensive reward package which includes a competitive basic salary, bonus scheme, generous holiday allowance, pension, and private healthcare. Transform the everyday! #DVT Show more Show less

Company Qualcomm India Private Limited Job Area Engineering Group, Engineering Group > Hardware Engineering General Summary The role generally entails a mixture of: Ownership of a piece of the test bench Planning & execution of feature additions and mode re-enablement on particular variants Bug fixes Debug of regression signatures Developing/Deploying new tools for performance validation Performance monitor and profiler development and deployment Workload specific simulations on the emulator Following skillset is required: Strong Python, C++ skills Reading Specs and developing test plans Monitors, scoreboards, sequencers, and sequences, that utilize scripts, System Verilog, UVM, and methodologies to increase the rate with which bugs are found and resolved Candidates should be comfortable checking our builds, navigating big test benches, analyzing coverage, and adding or enabling extra debug, Must be willing to dig into fail and understand what is happening 6 months - 8 Years of industry experiences in the following areas: - Basic of digital design concepts, fifo etc Basic understanding of DDR is a plus Understanding of interconnect protocols like AHB/AXI/ACE/ACE-Lite Understanding of multi-core ARMv8 CPU architecture, coherency protocols and virtualization Minimum requirement is Bachelor of Engineering however preferred is Masters of Engineering in Computer Science or Computer Engineering Candidate must possess right analytical skills, debug oriented mindset and must be open to discuss , deep dive, collate and present the design and environment understanding . Minimum Qualifications Associate's degree in Computer Science, Electrical/Electronic Engineering, Engineering, or related field. Applicants : Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies : Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers. 3066347 Show more Show less

Siemens EDA is a global technology leader in Electronic Design Automation software. Our software tools enable companies around the world to develop highly innovative electronic products faster and more cost-effectively. Our customers use our tools to push the boundaries of technology and physics to deliver better products in the increasingly complex world of chip, board, and system design. Questa Simulation Product It is a core R&D team working on multiple verticals of Simulation. A very energetic and enthusiastic team of motivated individuals. This role is based in Noida. But you’ll also get to visit other locations in India and globe, so you’ll need to go where this job takes you. In return, you’ll get the chance to work with teams impacting entire cities, countries, and the shape of things to come. We make real what matters! Key Responsibilities : We are looking for a highly motivated software engineer to work in the QuestaSim R&D team of the Siemens EDA Development responsibilities will include core algorithmic advances and software design/architecture. You will collaborate with a senior group of software engineers contributing to final production level quality of new components and algorithms and to build new engines and support existent code. Self-motivation, self-discipline and the ability to set personal goals and work consistently towards them in a dynamic environment will go far towards contributing to your success. Are you excited to know more about this Role ? Job Qualification: An ideal candidate should have skills below: B.Tech or M.Tech in Computer Science & Engineering (CSE), Electrical Engineering (EE), or Electronics & Communication Engineering (ECE) from a reputable engineering institution having 5-8 years of experience. Strong knowledge of C/C++, algorithms, and data structures. Familiarity with compiler concepts and optimizations. Experience with UNIX and/or LINUX platforms is essential. Excellent problem-solving and analytical skills. Self-motivated with the ability to work independently and guide others towards successful project completion. We are not looking for superheroes, just super minds! Having the below skills will be an added advantage: Strong understanding of basic digital electronics concepts. Familiarity with machine learning (ML) and artificial intelligence (AI) algorithms, particularly their implementation in data-driven tasks. Proficiency in hardware description languages such as Verilog, SystemVerilog, and VHDL. Experience with parallel algorithms and job distribution techniques. Exposure to simulation or formal verification methodologies is a plus. We are Siemens A collection of over 377,000 minds building the future, one day at a time in over 200 countries. We're dedicated to equality, and we encourage applications that reflect the diversity of the communities we work in. All employment decisions at Siemens are based on qualifications, merit and business need. Bring your curiosity and creativity and help us shape tomorrow! We offer a comprehensive reward package which includes a competitive basic salary, variable pay, other benefits, pension, healthcare and actively support working from home. We are an equal opportunity employer and value diversity at our company. We do not discriminate based on race, religion, color, national origin, sex, gender, gender expression, sexual orientation, age, marital status, veteran status, or disability status. Transform the everyday #DVT Show more Show less

Company Qualcomm India Private Limited Job Area Engineering Group, Engineering Group > Hardware Engineering General Summary As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field. 3+ years of experience in Design Verification. Hands on experience in SOC level test bench and test plan development. Good knowledge of UVM, System Verilog, PSS Knowledge of Amba Protocols such as CHI, ACE. Hands on experience in PCIe, USB4, DDR4/5 Experience in bare metal post silicon Good Communication. Applicants : Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies : Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers. 3075456 Show more Show less

Role: DV Engineer Locations: Hyderabad, Ahmedabad, Bangalore. No. of positions: Multiple Experience : 3+ years Requirements Strond Knowledge of System Verilog and UVM Proven Expertise in Architecting Complex Verification Environments using System Verilog and UVM Ability to quickly ramp-up on complex FPGA Interfaces and must have completed at least one full verification life cycle Strong Digital and verification Fundamentals Ability to Understand the specifications and must have experience developing BFMs/UVCs for industry standard protocols Ability to Analyze Functional and Code reports and experience with the verification closure Strong Written and verbal Communication Strong knowledge of Verilog/VHDL and must be able to read and understand the complex HDL Coding” Show more Show less

Company Qualcomm India Private Limited Job Area Engineering Group, Engineering Group > Hardware Engineering General Summary As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. Job Summary This position is open for 2-10 years’ experience candidate in Qualcomm CSI (Custom/SemiCustom implementation) team Candidate will be part of CSI team working on RTL- GDS HM implementations using custom flow and methodology for custom design . Qualcomm is one of the fastest growing semiconductor organization in India making high-end Chips with the most advanced technologies. To support its growing needs, we have strong CSI team for the design, development of various highspeed and low power IP’s being used in SoC. Individual has to work on RTL-GDS implementation. This will involve innovating new solutions in close collaboration with the other design teams. Job Responsibilities Job responsibilities include design and development of custom macro using Schematic design at block level (Ex RegArray, memory subsystem) Frontend verification and model generations CLP/PAGLS/LEC verifications at block level. Functional verification using spice/gatesim. Timing Signoff using PT, Candidate should be able to collaborate with different teams. Skillset/Experience 2-10 year of experience: Strong knowledge in transistor circuit design& block level logic design of Memory subsystem & Data path. STA for the design to close Set-up, Hold, MPW, Transition, etc Design verification using ESPCV & LEC, Simulation using Finesim & HSPICE. Front-end RTL Design (Verilog RTL design, System Verilog, Synopsys Design Compiler, Cadence RTL Compiler, LEC, PLDRC, Static Timing Analysis and PTPX) Physical Design using industry-standard RTL2GDS flow including Synopsys ICC2, Cadence Encounter. Scripting in Perl/Python/Shell/Tcl for productivity is a plus IP development (custom macro transistor level design, physical integration, collateral generation, flow development) and PPA quantification. Interface with Process Technology Team to understand the complex DRC and DFM requirements of the advanced technology nodes Work with cross functional teams (Architecture, Test/Verification , Product, CAD, Layout, Physical Design) to gather/define/implement specs Transistor level implementation of the block using CMOS/Domino/Cell-Based/Data path styles Implement power/clock gating techniques, Implement power/clock gating techniques, Implement industry standard as well as custom DFT techniques Implement clock distribution using custom/CTS techniques for low skew/latency/power, Implement block layout using custom/compiler techniques using custom/semi-custom/stdcell libraries Implement block level floor planning using custom and/or tiling techniques Applicants : Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies : Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers. 3075292 Show more Show less

Company Qualcomm India Private Limited Job Area Engineering Group, Engineering Group > Hardware Engineering General Summary General Summary: Bachelors /Masters degree in Engineering Relevant experience of 2-12 yrs in any of the mentioned domain - Design/Verification/ Implementation Will be working on cutting-edge Wireless Technology (IEEE 802.11) team. Strong fundamentals in core areas: Microarchitecture, Computer Arithmetic, Circuit Design, Process Technology Minimum Qualifications Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field. Design You will be responsible for developing HW blocks (IP design), conduct High/Mid/Low level Design review and delivery IP to Subsystem team for making complex SoCs. You will be a critical part of the WLAN subsystem, contribute to IP design, sign-off the core to the SOC design team. Strong communication skills to work with design teams worldwide Verification Good understanding of OOP concepts Experience in HVL such as System Verilog, UVM/OVM & System C As a design verification engineer you will work on developing IPs catering to upcoming Wifi standards like 802.11bn and beyond. You will have opportunity to contribute to the life cycle of the technology right from IP specification, till productization/customer deployments, leveraging your verification, pre and post silicon debug expertise. Implementation Candidate will be responsible for next generation WLAN hardmacro implementation Extensive experience in Synthesis (DC or Genus), Formal Verification (LEC / Formality), Conformal Low Power, PTPX, Primetime, Conformal ECO Extensive experience in UPF based power intent and synthesis Applicants : Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies : Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers. 3064190 Show more Show less

Company Qualcomm India Private Limited Job Area Engineering Group, Engineering Group > Systems Engineering General Summary As a PCIe Architect Lead within the NoC Systems team, you will play a pivotal role in shaping the architecture of the next generation of PCIe (Peripheral Component Interconnect Express) Switches. This position requires a deep understanding of PCIe technology, strong architectural skills, and the ability to lead and collaborate with cross-functional teams. Key Responsibilities Architecture Development: Lead the design and development of the next-generation PCIe Switch architecture. Define and document the architectural specifications, ensuring they meet performance, reliability, and scalability requirements. Collaborate with hardware and software teams to ensure seamless integration of the PCIe Switch into the overall system. Technical Leadership Provide technical leadership and guidance to the NoC Systems team. Mentor and train junior engineers, fostering a culture of innovation and continuous improvement. Stay abreast of the latest industry trends and advancements in PCIe technology. Other Responsibilities SoC Interconnect for the next generation System-on-chip (SoC) for smartphones, notebooks, smart glasses, tablets and other product categories. This position includes but no limited to:- NoC Systems lead and is part of BDC infrastructure (NoC/Interconnect) core team Responsible for system requirement collection, use-case understanding and preparing specification for interconnect working with adjacent IPs Actively work with QPA team, SoC team, verification team, physical design team, Soc Floorplan, core teams and various other interconnect teams in various other sites Partner with SoC performance team ensuring Interconnect meeting all performance requirement, and with silicon validation team to co-relate pre-silicon and post silicon design assumptions Remains abreast with next generation ARM/Amba specification, PCIe specification, QNoC changes and Low Power Technology changes to guide and influence the NoC Design, Verification, Power and Physical Design teams in improving their KPIs, processes leading to better Qualcomm products at efficient NRE Advises and leads small groups of less experienced engineers in evaluating various design features to identify potential flaws, compatibility issues, and/or compliance issues; reviews design evaluations conducted by less experienced engineers Troubleshoots multiple advanced issues with NoCs; uses a variety of debugging tools and methods Exercises exceptional creativity to innovate new ideas and develop innovative NoC systems and IP solutions without established objectives or known parameters Minimum Qualifications: 7 to 12 years of experience in SoC design/Systems, NoC design/Systems Understanding of interconnect protocols like CHI/AHB/AXI/ACE/ACE-Lite/NoC concepts Good knowledge of Digital Design and RTL development Hands-on experience with SoC Design, Verilog RTL coding Understanding of multi-core ARMv8/v9 CPU architecture, coherency protocols and virtualization Working knowledge of Synthesis, DC/DCG synthesis with Synopsys design complier, DFT, verification, formal verification and silicon debug Working knowledge of Lint, CDC, PLDRC, CLP etc Good understanding of the design convergence cycle in terms of architecture, micro-architecture, synthesis, timing closure and verification Should possess effective communication and leadership skills Minimum requirement is Bachelor of Engineering however preferred is Masters of Engineering in Computer Science or Computer Engineering. PhD in Computer Science, Engineering, Information Systems, or related field and 15+ years of Hardware Engineering or related work experience is welcome Minimum Qualifications Bachelor's degree in Engineering, Information Systems, Computer Science, or related field and 4+ years of Systems Engineering or related work experience. OR Master's degree in Engineering, Information Systems, Computer Science, or related field and 3+ years of Systems Engineering or related work experience. OR PhD in Engineering, Information Systems, Computer Science, or related field and 2+ years of Systems Engineering or related work experience. Applicants : Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies : Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers. 3066994 Show more Show less

Role Description Role Proficiency: Independently execute mid sized customer projects in any field of VLSI Frontend Backend or Analog design with minimal supervision Outcomes Work as an individual contributor owning any one task of RTL Design/Module. Provide support and guidance to engineers in Verification/PD/DFT/Circuit Design/Analog Layout/STA/Synthesis/Design Checks/Signoff etc. Anticipate diagnose and resolve problems; coordinating as necessary with cross-functional teams On time quality delivery approved by the project manager and client Automate the design tasks flows and write scripts to generate reports Come up with novel ideas to reduce design cycle time and cost accepted by UST Manager and client Measures Of Outcomes Quality –verified using relevant metrics by UST Manager / Client Manager Timely delivery - verified using relevant metrics by UST Manager / Client Manager Reduction in cycle time cost using innovative approaches Number of papers published Number of patents filed Number of mandatory trainings attended adhering to training goals Outputs Expected Quality of the deliverables: Ensure zero bugs are present in the design / circuit design. Clean delivery of the design/module in-terms of ease in integration at the top level Meeting functional spec / design guidelines 100% without any deviation or limitation Documentation of tasks and work performed Timely Delivery Ensure project timelines as laid out by the client or program manager are met Meet intermediate tasks delivery for other team members to progress Calling out for help and support in the case of delay in tasks delivery New Skills Development Participate in training – skilling someone and also getting skilled in newer technologies Take up new areas of project development learn on the job and deliver Team Work Participation in team work and supporting team members at the time of need Able to take up additional tasks in-case of any team member(s) not available Able to hand hold junior team members to explain the project tasks and support to deliver Work dedication to go beyond the call of duty to ensure deadlines and quality are met Innovation & Creativity Approach towards repeated work by automating tasks to save design cycle time Participation on technical discussion training forum white paper etc Skill Examples Languages and Programming skills:a. System Verilog Verilog VHDL UVM C C++ Assembly Perl TCL/TK Makefile Spice EDA Tools: a. Cadence Synopsys Mentor tool sets (one or more)b. Simulators Lint CDC/RDC DC/RTL-C ICC/Innovus/Olympus ETS/TK/FS PT/Tempus Calibre etc. (experience in one or more tools) Technical Knowledge:a. IP Spec Architecture Design Micro Architecture Functional Spec Test Plan Verificationb. Bus Protocol AHB/AXI/PCIe/USB/Ethernet/SPI/I2C Microprocessor architecturec. Strong Physical Design / Circuit Design / Analog Layout Knowledged. Synthesis DFT Floorplan Clocks P&R STA Extraction Physical Verificatione. Soft / Hard / Mixed Signal IP Design Processor Hardening FPGA Design Technology: CMOS FinFet FDSOI - 28nm / 22nm / 16ff / 10nm and below Strong communication skills and ability to interact with team members and clients equally Strong analytical reasoning and problem-solving skills with attention to details Ability to understand the standard specs and functional documents Ability to deliver the tasks on-time in a quality fashion per quality guidelines and GANTT Well versed with the available EDA tools and able to use them efficiently Required technical skills and prior design knowledge to execute the assigned tasks Ability to learn new skills in-case required technical skills are not present at a level needed to execute the project Knowledge Examples Knowledge of project(s) in any of the design by executing – RTL Design / Verification / DFT / Physical Design / STA / PV / Circuit Design / Analog Layout etc. Understanding of the design flow and methodologies used in the designing Understand the assigned tasks and have sufficient knowledge to execute the project tasks assigned by the client / manager as per known skills Additional Comments The person should have hands on experience(>8 Yrs.) on full custom Memory design & architectures, Characterization, Layout design, net-listers, complete SRAM Design verification at compiler level (not only at instance level) covering both design and layouts. The person should ensure to populate and publish Execution plan, Design Quality plan, DFMEA, Publish project health along with reporting of any risk and mitigation strategy. “ Skills Memory design and compiler,SRAM design,Design quality plan Show more Show less

WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences - the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. AMD together we advance_ ASIC VERIFICATION ENGINEER The Role We are currently looking for MTS ASIC Verification Engineers who will be involved in all aspects of AMD's next generation Data center network products. This includes verifying designs using the latest UVM standard and developing comprehensive test plans to ensure coverage closure. The position allows exposure to all aspect of ASIC design stages. Our products are aimed at making Data Centre Networking solutions more effective. This is a highly strategic and important part of AMD’s business, targeting a set of customers that includes the most successful internet and cloud companies in the world. Successful candidate will work alongside an experienced design and architecture teams and will thus have enormous opportunities for learning and self-development. The position is likely to require some travel. THE PERSON: Creative innovator and thinker who loves technical problems and detail-oriented tasks Exhibits relentless commitment to help the team meet quality and development goals on schedule with high quality Drives to learn and perform at their highest potential in a technical capacity Thrives in both a team environment and in individual contribution. Able to lead a small team of engineers working towards a common objective Able to learn independenly and acquire new skills required for the job Communicates openly and clearly in meetings, presentations, emails, and reports KEY RESPONSIBILITIES: Collaborate with architects, hardware engineers, and firmware engineers to understand the new features to be verified Build test plan documentation, accounting for interactions with other features, the hardware, the firmware, and the software driver use cases Estimate the time required to write the new feature tests and any required changes to the test environment Build the directed and random verification tests Debug test failures to determine the root cause; work with RTL and firmware engineers to resolve design defects and correct any test issues Review functional and code coverage metrics - modify or add tests or constrain random tests to meet the coverage requirements PREFERRED EXPERIENCE: Proficient in IP level ASIC verification Proficient in debugging firmware and RTL code using simulation tools Proficient in using UVM testbenches and working in Linux and Windows environments Experienced with Verilog, System Verilog, C, and C++ Experience with PCIe and/or Ethernet protocols Developing UVM based verification frameworks and testbenches, processes and flows Automating workflows in a distributed compute environment. Exposure to simulation profile, efficiency improvement, acceleration Good understanding and hands-on experience in the UVM concepts and System Verilog language Scripting language experience: Python, Ruby, Makefile, shell preferred. Exposure to leadership or mentorship is an asset Desirable assets with prior exposure to network processors. ACADEMIC CREDENTIALS: Bachelors or Masters degree in computer engineering/Electrical Engineering Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process. Show more Show less

At Vicharak , we're on the forefront of a computing revolution. Just like the pioneers at Bell Labs in 1947 who witnessed the birth of the transistor, we're shaping the future of semiconductors with our innovative FPGA technology. Unlike traditional processors, FPGAs allow us to programmatically change their inner circuitry, opening up new horizons in parallelism, speed, and computing. We've developed VAAMAN , a cutting-edge hardware system that combines FPGA and SBC, and we're on the lookout for talented individuals who share our passion for this field. We're seeking researchers, developers, designers, engineers, and architects to join us in building the next generation of computing. What You Will Learn: Software languages such as C/C++ , Python, and HDL languages Verilog and System Verilog. Master FPGA tools like Vivado, Radiant. Develop the ability to learn, adapt, tackle challenges, and perform effectively. Gain insights into the workings of everything from keyboards to complex servers. What You Will Work On: You will be contributing to our groundbreaking projects across our Acceleration framework, focusing on AI Acceleration, Software Acceleration, and the optimization of peripheral systems. Gain hands-on experience with Verilog and System Verilog, becoming proficient in the fundamental aspects of these languages. Simulation and Testing: Utilize advanced simulation tools to rigorously test designs, ensuring they meet stringent functional requirements. Cross-Functional Collaboration: Work closely with various engineering disciplines to integrate FPGA designs into broader system architectures and resolve any arising issues. FPGA Development and Validation: Develop FPGA requirements and code for logic design, create self-checking test benches, conduct unit tests, perform synthesis, timing analysis, and support Built-In-Test (BIT) processes. Validate these designs by loading them onto FPGA boards for real-world testing. High-Speed Serial Interfaces: Address challenges related to high-speed serial interferences within FPGA designs. Collaboration and Teamwork: Collaborate effectively with cross-functional teams, leveraging diverse expertise to enhance project outcomes. Continuous Learning: Stay at the forefront of industry practices and technological advancements to ensure our methods and designs are state-of-the-art. Preferred Skills: Good understanding of digital electronics and design practices. Strong VHDL/Verilog Programming skills. In depth knowledge of RTL design, FPGA design, and FPGA design tools. Complete FPGA development flow from logic design, place & route, timing analysis closure, simulation, verification, and validation. Strong troubleshooting and debugging FPGA implementations on hardware boards. Hands-on experience on communication protocols (UART/I2C/SPI). Strong sense of ownership, passionate, fast learner, analytical mind set, perfection seeker. Excellent interpersonal, communication, collaboration and presentation skills. https://vicharak.in/ Show more Show less