Posted:5 days ago|
Platform:
On-site
Full Time
Please find the JD for your reference:
Experienced Required: 3+ Years
1. RTL programming (Verilog/System Verilog)
2. FPGA Design Development
3. Working with FPGA Development Tool (Quartus, Modelsim, Xilinx ISE, Libero etc.)
4. Functional and timing simulation using Verilog/System Verilog
5. RTL Code Optimization to meet timing closure and fit on-chip resources
6. Support all phases of FPGA base product development activities
7. System Architecture Design
8. Testing and troubleshooting of hardware
Looking forward to your response!
Thanks, and Regards
System Level Solutions (SLS)
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