101 Xilinx Jobs

Participate in the development and testing of Field-Programmable Gate Arrays (FPGAs) for various projects. In your new role you will: Experience with FPGA design and development Proficiency in Vivado and other design software Providing Simulation of digital designs and design FPGA board Design emulation circuits for analog parts with discrete device Experience with lab equipment and testing procedures Validating on lab testing of FPGA Strong understanding of digital and analog circuit design Strong analytical and problem-solving skills You are best equipped for this task if you have: Master’s or Bachelor’s Degree in Electrical/Electronic Engineering, Physics or equivalent field of studies. Experience in FPGA design, preferred with Xilinx/Vivado. Experience in digital and mixed-signal design, particularly with System Verilog. Good Analytical skills and good understanding of digital and mixed signal designs. Familiarity with power conversion topologies, such as DC/DC and AC/DC converters, is highly desirable. Experience in pre-silicon verification would be a plus. Proficiency in computer-aided design tools and methodologies. Excellent problem-solving and communication skills. Ability to work effectively in a collaborative team environment. Contact: Garima Chauhan - garima,chauhan@infineon.com #WeAreIn for driving decarbonization and digitalization. As a global leader in semiconductor solutions in power systems and IoT, Infineon enables game-changing solutions for green and efficient energy, clean and safe mobility, as well as smart and secure IoT. Together, we drive innovation and customer success, while caring for our people and empowering them to reach ambitious goals. Be a part of making life easier, safer and greener. Are you in? We are on a journey to create the best Infineon for everyone. This means we embrace diversity and inclusion and welcome everyone for who they are. At Infineon, we offer a working environment characterized by trust, openness, respect and tolerance and are committed to give all applicants and employees equal opportunities. We base our recruiting decisions on the applicant´s experience and skills. Please let your recruiter know if they need to pay special attention to something in order to enable your participation in the interview process. Click here for more information about Diversity & Inclusion at Infineon.

Participate in the development and testing of Field-Programmable Gate Arrays (FPGAs) for various projects. In your new role you will: Experience with FPGA design and development Proficiency in Vivado and other design software Providing Simulation of digital designs and design FPGA board Design emulation circuits for analog parts with discrete device Experience with lab equipment and testing procedures Validating on lab testing of FPGA Strong understanding of digital and analog circuit design Strong analytical and problem-solving skills You are best equipped for this task if you have: Master’s or Bachelor’s Degree in Electrical/Electronic Engineering, Physics or equivalent field of studies. Experience in FPGA design, preferred with Xilinx/Vivado. Experience in digital and mixed-signal design, particularly with System Verilog. Good Analytical skills and good understanding of digital and mixed signal designs. Familiarity with power conversion topologies, such as DC/DC and AC/DC converters, is highly desirable. Experience in pre-silicon verification would be a plus. Proficiency in computer-aided design tools and methodologies. Excellent problem-solving and communication skills. Ability to work effectively in a collaborative team environment. Contact: Garima Chauhan - garima,chauhan@infineon.com #WeAreIn for driving decarbonization and digitalization. As a global leader in semiconductor solutions in power systems and IoT, Infineon enables game-changing solutions for green and efficient energy, clean and safe mobility, as well as smart and secure IoT. Together, we drive innovation and customer success, while caring for our people and empowering them to reach ambitious goals. Be a part of making life easier, safer and greener. Are you in? We are on a journey to create the best Infineon for everyone. This means we embrace diversity and inclusion and welcome everyone for who they are. At Infineon, we offer a working environment characterized by trust, openness, respect and tolerance and are committed to give all applicants and employees equal opportunities. We base our recruiting decisions on the applicant´s experience and skills. Please let your recruiter know if they need to pay special attention to something in order to enable your participation in the interview process. Click here for more information about Diversity & Inclusion at Infineon. Show more Show less

Location : Hyderabad Work Mode : WFO Experience : 5-10 years Qualification : B.E./B. Tech or M.E./MTech in ECE, EE, or related field Employment Type : Full-time Job Description We are looking for a skilled Hardware Verification Engineer to join our team and contribute to the development of cutting-edge hardware solutions. The ideal candidate will have hands-on experience in RTL verification, System Verilog/UVM, and exposure to industry-standard protocols and tools. Key Responsibilities Develop and maintain System Verilog /UVM test-benches at block, subsystem, and top levels. Define and drive test plan, test specification, and test execution for complex hardware modules. Engage in verification environment architecture and methodology development. Collaborate with design teams to ensure functional correctness, coverage, and debugging of RTL code. Generate and maintain comprehensive documentation : user guides, test plans, test specifications, and test reports. Perform hardware testing using test equipment such as logic analyzers, traffic generators, and signal analyzers. Contribute to FPGA-based verification using Xilinx tools and technology. Required Skills & Experience Strong experience in SystemVerilog and UVM-based verification. Proficiency in verification of standard protocols : Ethernet, PCIe, SPI, I2C, USB. Hands-on experience with hardware test equipment (logic analyzers, oscilloscopes, traffic generators, etc.). Experience with Xilinx FPGA verification and toolchains. Strong debugging skills at device, signal, and board levels. Familiarity with scripting languages like Perl, Python, or TCL. Excellent analytical, problem-solving, and communication skills. Ability to work effectively in a collaborative and fast-paced development environment. Additional Relevant Skills (Preferred/Bonus) Experience with code and functional coverage collection and analysis tools (e.g., VCS, Questa, Incisive). Proficiency with constraint random verification and assertion-based verification (ABV). Familiarity with simulation acceleration, emulation (e.g., Palladium, Veloce), or formal verification tools. Understanding of SoC architecture, DMA, memory controllers, and bus interfaces (AXI, AHB, APB). Exposure to version control systems (e.g., Git, Perforce) and CI/CD verification automation. Experience working in Agile/Scrum environments. Exposure to cloud-based verification environments or remote simulation tools. Familiarity with coverage-driven verification (CDV) and verification management tools like JasperGold, Specman, or Cadence vManager. Why Join Us ? Work on next-generation products in a technically driven team. Opportunities for growth in both frontend and backend design flows. Supportive work environment with access to advanced labs and equipment. (ref:hirist.tech) Show more Show less

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Bachelors /Masters degree in Engineering Relevant experience of 6+yrs in any of the mentioned domain - Verification/ Emulation/ Validation Verification: Strong knowledge of digital design and SOC architecture. Good understanding of OOP concepts Experience in HVL such as System Verilog, UVM/OVM & System C Experience in HDL such as Verilog Knowledge of ARM/DSP CPU architecture, High Speed Peripherals like USB2/3, PCIE or Audio/Multimedia Familiarity with Power-aware Verification, GLS, Test vector generation is a plus Exposure to Version managers like Clearcase/perforce FPGA Emulation : Familiarity with Verilog/Vhdl and General Digital Logic Design concepts Knowledge of system-level architecture including buses like ARM processor bringup, AXI/AHB, bridges, memory controllers such as DDR/Nand. Knowledge of peripheral emulation like PCIE/USB is a plus. Strong working knowledge of UNIX environment and scripting languages such as Perl or shell Working knowledge XILINX Virtex FPGA architecture and experience with ISE tool flow Pre/Post silicon Validation: ARM based System-On-Chip Pre-Silicon emulation and Post-Silicon ASIC Validation experience related to board bring up and debug. Perform system level validation and debug Debug experience with Lauterbach Trace32 environment. Test equipment like Logic analyzer, Oscilloscope and Protocol analyzers. Embedded software development of low level hardware drivers in C language. Working experience related to one or more of the following is required. ARM/DSP Processors/USB/PCIE, Ethernet Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a "CPU Core Validation Engineer" you would be part of CPU Validation team in CPU org working on validation of CPU core pipeline arch and micro arch features. Roles and Responsibilities Develop detailed test plan considering the IP arch and uarch features. Work with CPU design and verification teams to develop CPU bring up and functional validation test plans for the IP owned. Develop validation methodology and test contents to exercise on emulators during pre-Si phase and on Silicon.Work with SOC bring up teams, software teams to plan CPU core features bringup and end to end validation. Triage and debug failures on Silicon. Develop test contents and testing strategies to assist validation of CPU on silicon. Work with CPU verification teams to reproduce silicon fails on emulators and FPGAs. Work with design team to suggest, architect new debug features to improve future CPU bringups. Minimum BA/BS degree in CS/EE with 5+ years experience. 3+ Experience in Silicon Validation and bring up. Implementation of assembly, C/C++ language embedded firmware Experience with software tool chain including assemblers, C compilers, Makefiles, and source code control tools.Preferred Good understanding of micro-processor architecture, in domains such asCache Coherence, Memory ordering and Consistency, Prefetching, Branch Prediction, Renaming, Speculative execution, and Address Translation/Memory Management.Knowledge of Random Instruction Sequencing (RIS) and testing a given design, at the Block/Unit-level and Subsystem/Chip-level for proving correctness.Experience in writing Test plans and Assembly code.Ability to develop and work independently on a block/unit of the design. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Qualcomm is a company of inventors that unlocked 5G ushering in an age of rapid acceleration in connectivity and new possibilities that will transform industries, create jobs, and enrich lives. But this is just the beginning. It takes inventive minds with diverse skills, backgrounds, and cultures to transform 5Gs potential into world-changing technologies and products. This is the Invention Age and this is where you come in. Join QCOM Technologies Inc Global Emulation(Prototyping) team delivering solutions for design of leading-edge wireless products. Qualcomm is leading 5G innovations ushering in an age of rapid acceleration in connectivity and new possibilities that will transform industries, create jobs, and enrich lives. The Qualcomm Global emulation team is currently seeking a lead engineer role for our team doing development/validation of large scale FPGA emulation tools/flows/methodologies In this role, you will be working in multiple areas of SoC/IP prototyping flows and methodologies. Would also involve enabling execution teams doing SOC prototyping during their usage of the platform Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field. 4-7 years of experience working in FPGA Synthesis, Prototyping of SoCs & IPs Candidates are expected to have experience in: Prior work experience on Emulation/Prototyping Platforms (HAPS, VPS, Protium etc) Multi-FPGA prototyping flow, from RTL preparation to h/w implementation Proficient in analysis & debug of issue in Synthesis, Place and Route, Timing closure, Clocking. Hands on experience in FPGA h/w debug using probes/ILA Proficient in EDA tools like - Vivado, Synplify, Protocompiler, VPS, VCS/Verdi etc RTL coding and simulation Well versed with working in unix/linux environment, using GVIM/VI editors, shell scripting Strong debug skills, aptitude to learn and resolve complex issues Experience in one or more scripting language - TCL, Python, Perl, Shell etc Sound knowledge of: FPGA architecture preferably Xilinx (ultrascale), Vivado IP catalog Synthesis, Timing concepts and SDC constraints Prototyping concepts like - partitioning, pinmux

Job Area: Engineering Group, Engineering Group > Hardware Applications Engineering General Summary: This position is for RTL designer role in DSP processor team. The position involves in-depth understanding of the ASIC design flow from RTL to GDS2 and the challenges posed by advanced technologies. The successful candidate will possess detailed understanding of RTL design, synthesis, static timing analysis, formal verification, PLDRC, clock domain crossing, and low power techniques. Knowledge and experience of microprocessor integration is a definite advantage. Skills/Experience Must have 3 to 15 years of practical experience with details of RTL development (VHDL and/or Verilog) including:functional and structural RTL design, design partitioning,simulation and regression, collaboration with design verification team. Must have good familiarity with latest RTL languages and tools, includingsimulation systems (e.g. Modelsim, VCS), synthesis tools (e.g. Design Compile), static timing tools (e.g. Prime Time), Linting tools, CDC tools, UPF, code coverage, System Verilog Assertion, etc. Experience with the following area is highly desirable Strong processor architecture knowledge Microarchitecture implementation Microprocessor integration Low power design Responsibilities Develop RTL for multiple logic blocks of a DSP core Run various frontend tools to check for linting, clock domain crossing, synthesis, etc. Work with physical design team on design constrain and timing closure Work with power team on power optimization Work with verification team to collaborate on test plan, coverage plan, and coverage closure Minimum Qualifications: Bachelor's degree in Electrical/Electronics Engineering, Computer Engineering, or related field and 3+ years of Hardware Applications Engineering or Hardware Design experience or related work experience. OR Master's degree in Electrical/Electronics Engineering, Computer Engineering, or related field and 2+ years of Hardware Applications Engineering or Hardware Design experience or related work experience. OR PhD in Electrical/Electronics Engineering, Computer Engineering, or related field and 1+ year of Hardware Applications Engineering or Hardware Design experience or related work experience.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: This position is for RTL designer role in DSP processor team. The position involves in-depth understanding of the ASIC design flow from RTL to GDS2 and the challenges posed by advanced technologies. The successful candidate will possess detailed understanding of RTL design, synthesis, static timing analysis, formal verification, PLDRC, clock domain crossing, and low power techniques. Knowledge and experience of microprocessor integration is a definite advantage. Skills/Experience Must have 10 to 15 years of practical experience with details of RTL development (VHDL and/or Verilog) including:functional and structural RTL design, design partitioning,simulation and regression, collaboration with design verification team. Must have good familiarity with latest RTL languages and tools, includingsimulation systems (e.g. Modelsim, VCS), synthesis tools (e.g. Design Compile), static timing tools (e.g. Prime Time), Linting tools, CDC tools, UPF, code coverage, System Verilog Assertion, etc. Experience with the following area is highly desirable Strong processor architecture knowledge Microarchitecture implementation Microprocessor integration Low power design Responsibilities Develop RTL for multiple logic blocks of a DSP core Run various frontend tools to check for linting, clock domain crossing, synthesis, etc. Work with physical design team on design constrain and timing closure Work with power team on power optimization Work with verification team to collaborate on test plan, coverage plan, and coverage closure Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 6+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 5+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience.

Apply now » Technical Product Development Company: NEC Corporation India Private Limited Employment Type Office Location: Kandanchavadi, Perungudi, TN, IN, 600096 Work Location: Hybrid Req ID: 4514 Description Job title: FPGA Architect (Telecom/Aerospace) Reporting Relationship: Reporting to Project Manager Job Summary NEC Corporation India Pvt. Ltd is looking for an experienced and highly talented FPGA Architect with strong telecom or aerospace expertise at NEC Mobile Network Excellence Center (NMEC), Chennai Scope of work System modeling, architecture, and implementation of high-performance FPGA designs for wireless communication and aerospace system Conducting research and development of logical synthesis, netlist partitioning, placement, and routing optimizations for FPGA prototyping. Optimize FPGA designs for latency, throughput, power, performance, and area efficiency Evaluate and select appropriate technologies and tools to support the development process Work with cross-functional teams to align on product requirements and technical specifications. Qualifications BE/B.Tech/M.E/M.Tech Or Its Equivalent Experience 12+ years Domain Skills Strong knowledge of SoC architecture, including CPU, GPU, memory hierarchy, interconnects, and accelerators. Hands-on experience in hardware simulators, SoC design (SoC integration, peripherals, bus design, RTL coding in Verilog/VHDL, CDC, LINT) Experience in RTL coding, synthesis, place-and-route, STA, power analysis, back-end flow, implementing designs in hardware, and advanced digital verification methodology(UVM) Prior experience in integrating Nios, MPIS, MicroBlaze, ARM Cortex, GTX/GTH transceivers, and 10GE MAC/DMA controller/PCIe /CPRI/JESD/FFT IP core. Knowledge of AXI/AHB AMBA bus-based complex multi-master and slave systems, L2/L3 switching, TCP/IP, and network protocols. Experience with EDA tools such as Xilinx Vivado, SystemGenerator, ModelSim/QuestaSim. Proficiency in MATLAB and Python for modelling, simulation, and analysis. Specialization Description Responsible for improving or developing new products, components, equipment, systems, technologies, or processes including: Ensuring that research and design methodologies meet established scientific and engineering standards Assisting with formulating business plans and budgets for product development Analyzing quality/safety test results to ensure compliance with internal and external standards Keeping abreast of new developments in the industry and translating those developments into new and viable options for the organization and customers Organizing technical presentations to customers and/or industry groups Monitoring product development outcomes to ensure technical, functional, cost, and timing targets are met In some organizations, may be responsible for managing product regulatory approval process Level Description Senior level professional that applies advanced knowledge of job area typically obtained through advanced education and work experience. Works independently applying an advanced knowledge of a job area typically obtained through advanced education and work experience. Works to achieve results in a job area, overseeing and managing projects/ processes independently with limited supervision. Problems faced are difficult and are sometimes complex, though are routine. Coaching and reviewing the work of lower level professionals. Headquartered in Japan, NEC is a leader in the integration of IT and network technologies. With over 123 years of expertise in providing solutions for empowering people, businesses, and society, NEC stands tall as a champion in enabling change and transformation across the globe. Present in India since 1950, NEC has been instrumental in burgeoning India’s digitization journey continually for the past 70 years. NEC India has proved its commitment to orchestrating a bright future through its diverse businesses from Telecommunications to Public Safety, Logistics, Transportation, Retail, Finance, Unified Communication and IT platforms , serving across the public and private sectors. NEC India, through the deployment of cutting-edge technology, has been powering India in seminal ways, making lives easier, safer, and more productive for all. With its Centre of Excellence for verticals like Analytics platform solutions, Big Data, Biometrics, Mobile and Retail , NEC India brings to the table, innovative, seamless solutions for India and across the world. NEC India is headquartered in New Delhi and has its offices panned across the country. It has branches in Ahmedabad, Bengaluru, Chennai, Mumbai, Noida and Surat. Specialties IT & Networking Solutions, Unified Communication Solutions, Safety and Security Solutions, Integrated Retail Solutions, Data Centre Solutions, Safe and Smart City Solutions, Transportation Solutions, SDN Solutions, Carrier Telecom Solutions, and Solutions for Society. NEC Career Site - LinkedIn Apply now » Show more Show less

#Urgent_Opening_for Canvendor #Hiring: RTL Verification (5+ Years Experience) | Hyderabad | Immediate Joiners Preferred Location: Hyderabad, India Experience: 5+ Years Domain: Semiconductor Notice period: Immediate to 30days Skills Highlighted: SV/UVM testbenches at Top/Sub-system/Block-levels. FPGA #Key_Requirements: HW Verification Engineer - Responsible for #RTL_verification, developing Develop SV/UVM #testbenches at Top/Sub-system/Block-levels. - Responsible for driving test plan and test spec development and execution, generating documents, such as user-guide, test plan, test spec, test report etc., - Engaging in verification environment architecture and methodology development. - Experience in #System_Verilog and #UVM programing - Experience with verification of #protocols like Ethernet/PCIe/SPI/I2C/USB - Experience in#HWtesting, including working with test equipment – logic and traffic analysers, test generators, etc. - Experience with #Xilinx technology and tools, #FPGA verification and test - Strong #debugging skills at device and board level - Scripting language experience like Perl, Python or TCL - Excellent interpersonal, written and verbal communication skills - Excellent communication, problem solving and analytical skills If interested kindly share your updated CV to anushab@canvendor.com Show more Show less

Experience - 3-6 Years Key Responsibilities: Design, develop, and verify FPGA-based solutions for physical layer signal processing. Develop and simulate RTL code using Verilog or VHDL. Implement and debug FPGA designs using Xilinx FPGAs and Vivado tools. Create and maintain development documentation in compliance with DO-254 standards. Collaborate with cross-functional engineering teams to define requirements and system interfaces. Participate in code reviews, design analysis, and performance optimization. Required Skills And Experience: Minimum 3 years of experience in FPGA software development. Strong hands-on experience with Verilog/VHDL. Experience in physical layer signal processing. Proficient in Xilinx FPGA development using Vivado. Knowledge and experience in DO-254-based development and documentation processes. Strong debugging and analytical skills. Excellent communication and documentation abilities. Job Requirements: Experience Required: 3-6 Years Educational Qualification: B.Tech in Computer Science or Information Technology / Bachelor in Computer Applications / Bachelor of Science / Master of Computer Applications Job Location: Dehradun(WFO)

Hands on Experience in C/C++ programming Experience in developing and debugging linux device drivers Understanding of Linux boot-up sequence Experience in Linux kernel, Board bring up and kernel porting Experience with target architectures (ARM Cortex Ax, Intel x86) Experience with communication protocols (PCIe, UART, SPI) Experience with working on FPGA (specially on Xilinx Zynq) based systems Ability to work with and guide cross-functional teams Experience with bring-up QEMU emulation environment is a plus Show more Show less

WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences - the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. AMD together we advance_ MTS SOFTWARE DEVELOPMENT ENGINEER - FPGA Engineer / Software Verification / Product Validation Engineer The Role AMD is looking for a specialized software product verification engineer who is passionate about improving the quality of products and benchmarks . You will be a member of a core team of incredibly talented industry specialists and will work with the very latest hardware and software technology. The Person The ideal candidate should be passionate about software engineering and possess leadership skills to drive sophisticated issues to resolution. Able to communicate effectively and work optimally with different teams across AMD. Key Responsibilities Develop and execute test cases to validate all AMD products Automate tests using Python. Identify, document, and track issues using JIRA Participating in new ASIC and hardware bring ups Report coverage metrics using tools Review requirements and create associated test cases to ensure traceability Debugging/fix existing issues and research alternative, more efficient ways to accomplish the same work Develop technical relationships with peers and partners Preferred Experience Strong object-oriented programming background, Python preferred with 8+yrs of hands-on experience Understanding of FPGA design flow and tools (Design Entry, Synthesis, Simulation and Implementation) AMD/Xilinx Vivado Design Suite experience Hands on experience simulators like XSIM, Questa, Modesim, VCS etc. Ability to debug code with a keen attention to detail Experience with Windows, Linux and/or Android operating system development Experience with software development processes and tools such as debuggers, source code control systems (GitHub) and profilers is a plus Effective communication and problem-solving skills Hands on experience with scripting preferabley TCL Academic Credentials Bachelor’s or Master's degree in Computer Science, Computer Engineering, Electrical Engineering, or equivalent Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process. Show more Show less

Responsibilities: * Collaborate with cross-functional teams on project requirements and deliverables. * Design FPGAs using Xilinx tools and Vivado software. * Implement RTL designs in System Verilog and Python scripts. DM to sreeja.s@sasnee.com

Location: Gurugram, India (On-site/Hybrid) Type: Full-Time | Engineering Role We are seeking a skilled and detail-oriented Verilog Engineer to join our hardware design and development team. The ideal candidate will have hands-on experience in digital design using Verilog HDL , and a strong understanding of FPGA/ASIC development cycles . Key Responsibilities Design, implement, and verify digital logic circuits using Verilog Work on FPGA/ASIC development, simulation, and synthesis Perform functional verification and debugging using tools like ModelSim, Vivado, or QuestaSim Collaborate with cross-functional teams including hardware, embedded, and software engineers Create and maintain comprehensive design documentation Optimize RTL code for timing, area, and power based on design constraints Required Skills & Qualifications Bachelor’s or Master’s degree in Electronics, Electrical, or related field 2–5 years of hands-on experience with Verilog HDL, preferably in an FPGA/ASIC environment Solid understanding of digital design concepts (FSMs, pipelines, memory, interfaces, etc.) Experience with simulation and verification tools (e.g., ModelSim, Vivado, Synopsys) Familiarity with synthesis and timing analysis Knowledge of scripting (TCL, Python, Bash) is a plus Good to Have Experience with industry-standard FPGA platforms (Xilinx, Intel/Altera) Exposure to system-level modeling or verification languages (SystemVerilog, UVM) Understanding of hardware-software integration Why Join Us? Work on cutting-edge digital design projects Exposure to full-chip development cycles and real-world applications Dynamic work environment with growth opportunities Based in Gurugram with flexible hybrid options Skills: bash,python,modelsim,fpga,vivado,tcl,asic,timing analysis,synthesis,fgpa,asic design,questasim,verilog,digital design,verilog hdl Show more Show less

B.E. in Electronic & Communication Engineering or related field with a minimum of 60% aggregate 2 to 8 years of experience in VHDL coding for both RTL and test bench Proficient in digital design using FPGAs, preferably Xilinx FPGAs Familiar with FPGA design and verification flow Good in using Xilinxs Vivado Familiar with Vivado simulators Familiar with debug tools like Xilinx ILA Knowledge of telecom/networking domain protocols is an added advantage Experience in timing analysis Experience in RTL design for high-speed design Good communication skills Responsibilities : Develop and test FPGA designs for a variety of applications, including Ethernet MAC, Ethernet PHY, GMII, RGMII, AXI4-Stream, MDIO, I2C, DDR2/DDR3/DDR4, PCIe, SPI, FIFOs, and BRAM Write VHDL code for both RTL and test bench Work with digital design using FPGAs, preferably Xilinx FPGAs Follow the FPGA design and verification flow Use Xilinx's Vivado and Vivado simulators for design and simulation Use debug tools like Xilinx ILA Analyze timing for high-speed designs Collaborate with other engineers and team members to ensure the successful completion of projects Keep up-to-date with new technologies and techniques in the field of FPGA design

At Astrome Technologies, we are pioneering advanced communication solutions tailored for the unique demands of the aerospace sector. We are actively seeking a Lead FPGA Design Engineer for our Space Division, aimed at creating high-performance and reliable FPGA-based systems for satellite and space applications. Lead the design and development of FPGA architectures specifically for space-grade applications, ensuring optimal performance and reliability. Mentor and guide a team of engineers in the implementation of complex digital systems while fostering a collaborative and innovation-driven environment. Conduct rigorous testing, validation, and optimization of FPGA designs to meet the specific environmental and operational requirements of space missions. Collaborate with cross-functional teams to define system specifications and integrate the FPGA designs into larger communication solutions. Maintain up-to-date knowledge of the latest developments in space technology and apply this knowledge to enhance product offerings. Required Skills: 8+ years of experience in FPGA design, with a strong focus on aerospace or space applications. Proven expertise in digital design, RTL development, and verification processes, with leadership experience in guiding design teams. Mastery of HDLs, specifically SystemVerilog and Verilog, with practical experience in space-grade designs. Experience with designing IPs compliant with rigorous space standards using AXI4 and other protocols. In-depth understanding of radiation-hardened design principles and the challenges specific to space communication systems. Excellent knowledge of Xilinx FPGA architectures and proficiency in using tools like Vivado, tailored for space applications. Strong capability in digital signal processing techniques relevant to satellite communication, including techniques like OFDM. Track record of successfully leading projects from concept to completion in the aerospace domain, including working with relevant regulatory and compliance bodies. Exceptional communication skills and ability to work collaboratively in a multidisciplinary environment, ensuring project goals are met effectively. We offer great career growth, ESOPs, Gratuity, PF and Health Insurance.

As CPU/Processor Nest Verification Lead, you will be responsible for the pre-silicon functional and performance verification of our chipsets, covering the CPU core, cache/nest subsystem, memory hierarchy, and other on-silicon IP used in our next-generation IBM Power Systems offerings. You will use state-of-the-art techniques to simulate and verify the designs of these custom microprocessor-based systems. The job uses both hardware and software engineering skills, and entails creating environments and methodologies for simulating the VHDL input, as well as analysis and problem debug. Verification is performed at various levels within the design hierarchy. A background in Electronics / Micro Electronics / Computer Science with strong programming skills is required. Required education Bachelor's Degree Preferred education Master's Degree Required technical and professional expertise As a CPU/Processor Nest Verification lead, you will play a pivotal role in the pre-silicon functional and performance verification of our cutting-edge chipsets. Your responsibilities will cover a spectrum of critical areas, including the cache/nest subsystem, interrupt, Fabric, memory hierarchy, and various on-silicon IP integral to our upcoming IBM Power Systems offerings. Leveraging state-of-the-art techniques, you will be at the forefront of simulating and validating the designs of these bespoke microprocessor-based systems and providing technical guidance to junior/mid-level engineers in the team. Key Duties: Verification Environment OwnershipTake charge of the verification environments for microprocessor components, contributing significantly to the identification of functional and performance issues before silicon production. Implement best practices and innovative methodologies to ensure robust and efficient verification processes. Documentation and CommunicationThoroughly document verification environment details, providing comprehensive insights for future reference and continuous improvement. Communicate progress effectively, keeping team members and stakeholders informed of milestones achieved and potential challenges encountered.Lead the development of the verification plans, environment, testbenches and writing testcases for the Cache Coherency Transport Interconnect Fabric in IBM Server Processors. Technical leadership Providing Technical leadership to the senior/mid-level engineers who will be working closely with you. Stakeholder management Managing and influencing stakeholders technically, periodic update in status meeting/technical forums. Functional Verification Experience: 15+ years of extensive experience in functional verification of processors, demonstrating a deep understanding of verification methodologies and technically leading a large team. Computer Architecture Knowledge: Good understanding of computer architecture, including Processor core design specifications, Coherency and Cache Designs, Processor IO subsystem, Interrupt architecture, with expertise in at least any one of the above domains. Multi-processor Cache Coherency Transport Fabric Experience in functional verification of system level Coherency Transport Network designs and ways to stress verify them. Strong programming skills Proficiency in C++, Python scripting or similar languages. Preferred technical and professional experience Experience with Hardware Description Languages (HDLs): Proficiency in hardware description languages like Verilog and VHDL and general computational logic design and verification concepts. Experience in System-Level Verification: Exposure to system-level verification methodologies and techniques, ensuring holistic verification coverage across multiple levels of design. Experience in specifying and developing the verification infrastructure for verifying processor based designs. Minimum one full life cycle experience of a processor/SoC verification flow with focus on Coherency Transport Interconnect/Fabric Verification. Knowledge of system-level architecture including buses like AXI/ACE/CHI, AMBA interconnects

Job Description As an FPGA Engineer specialised in RTL (Register Transfer Level) coding, you will be responsible for designing, optimising, and implementing hardware solutions on Field-Programmable Gate Arrays (FPGAs) to support high-frequency trading strategies. You will work closely with the trading systems team to develop and deploy ultra-low latency trading infrastructure, ensuring the highest levels of performance, reliability, and efficiency. Key Responsibilities RTL Design and Optimisation: Design and optimise FPGA-based solutions using RTL coding techniques to achieve ultra-low latency and high throughput for trading algorithms and strategies. Algorithm Implementation: Implement trading algorithms and strategies in hardware, leveraging FPGA capabilities to minimise latency and maximise performance. Hardware Acceleration: Identify opportunities for hardware acceleration of critical trading functions and develop FPGA-based solutions to achieve significant speedups. Performance Analysis and Tuning: Conduct performance analysis of FPGA designs, identify bottlenecks, and fine-tune the implementations to achieve optimal performance. Hardware Integration: Collaborate with software engineers and system architects to integrate FPGA-based solutions into the overall trading infrastructure, ensuring seamless operation and compatibility. Testing and Validation: Develop test benches and perform thorough testing and validation of FPGA designs to ensure correctness, reliability, and robustness under real-world trading conditions. Documentation and Reporting: Document FPGA designs, methodologies, and implementation details, and provide regular reports and updates to stakeholders on project progress and performance metrics. Requirements Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field. Proven experience in FPGA design and development, with a focus on RTL coding using Verilog or VHDL. Deep understanding of computer architecture, digital design principles, and hardware/software co-design concepts Experience with high-frequency trading systems and ultra-low latency design techniques is highly desirable. Proficiency in FPGA development tools and workflows, such as Xilinx Vivado or Intel Quartus. Strong analytical and problem-solving skills, with the ability to optimise designs for performance, power, and resource utilisation. Excellent communication and collaboration skills, with the ability to work effectively in a fast-paced, team-oriented environment. Show more Show less

✅ JD 1: FPGA Engineer – Transceiver Development (MIPI/CML/Other Protocols) Location: Remote/Hybrid/UnivLabs R&D Centre Type: Full-Time | Immediate Hiring About UnivLabs UnivLabs Technologies Pvt. Ltd. is one of India’s most innovative medical device companies, focusing on Surgical EndoVision and Urology Fluid Management . Founded by technocrats and surgeons, UnivLabs designs, develops, and manufactures patented, high-performance devices that improve surgical outcomes globally. We are backed by Government of India initiatives (DBT, MeitY, MSME), with an ISO 13485-certified facility, a 150+ person team, and regulatory capabilities for FDA and CE approvals. We’re expanding our core FPGA and embedded team to build the next generation of smart, connected surgical platforms. Role Overview We are seeking a skilled FPGA Engineer to develop high-speed transceiver modules using protocols like MIPI CSI/DSI, CML, LVDS , and HDMI. This role is central to our camera and surgical imaging pipeline. Responsibilities • Design and implement transceiver logic for MIPI, CML, and LVDS • Ensure signal synchronization, jitter control, and high-speed reliability • Interface sensors and displays with the central compute unit via FPGA • Collaborate with QA and testing teams for compliance and performance validation Requirements • B.E./M.E. in Electronics or Embedded Systems • 4–7 years of FPGA experience in transceiver development • Strong knowledge of MIPI CSI/DSI, CML, LVDS, HDMI • Proficiency with Xilinx/Intel toolchains (Vivado, Quartus)• Familiarity with test tools like ILA, SignalTap, Oscilloscopes Show more Show less

JOB DESCRIPTION Key Responsibilities:  Develop RTL code using Verilog/VHDL for FPGA implementations.  Optimize hardware designs for performance, area, and power.  Work on Xilinx Vivado IPs and other FPGA toolchains.  Implement and optimize DSP algorithms for image and signal processing.  Work with MATLAB/Simulink for algorithm modeling and hardware mapping.  Perform functional and timing verification using UVM, SystemVerilog.  Develop testbenches, run simulations, and analyze waveforms.  Conduct post-synthesis and post-layout verification.  Implement and verify standard communication protocols (I2C, SPI, UART, PCIe, AXI, etc.).  Integrate and validate external peripherals in FPGA-based designs.  Guide students and Ph.D. scholars in developing VLSI-based academic projects.  Provide documentation, reports, and technical support for research work.  Deliver workshops and training sessions on VLSI, FPGA, and Signal Processing. Required Skills & Qualifications :  B.Tech/M.Tech/Ph.D. in VLSI, Electronics, Electrical, or a related field.  Strong experience in RTL design (Verilog/VHDL).  Hands-on experience with FPGA toolchains (Xilinx Vivado, Quartus, etc.).  Knowledge of MATLAB/Simulink for DSP applications.  Expertise in verification methodologies (UVM, SystemVerilog, ModelSim, QuestaSim).  Familiarity with communication protocols (AXI, PCIe, Ethernet, etc.).  Experience in hardware debugging and timing analysis.  Experience in HLS (High-Level Synthesis).  Knowledge of ASIC design flow and RTL-to-GDSII concepts.  Exposure to AI/ML accelerators on FPGA (optional but a plus).  Passion for mentoring students and guiding research projects. Job Type: Full-time Pay: ₹20,000.00 - ₹30,000.00 per month Schedule: Fixed shift Experience: VLSI: 1 year (Required) Work Location: In person

Company Description At Sq.M Technologies, we are a team of Embedded Product Engineers and Innovators committed to transforming ideas into tangible products. Our expertise encompasses end-to-end embedded product engineering, hardware design, firmware/software design, mechanical styling, and compliance services. We specialize in designing and developing medical and automation systems, utilizing Xilinx and Altera FPGAs, as well as our in-house Zynq SOC platform for AI and ML applications. Our mission is to provide comprehensive solutions that combine technical expertise, creativity, and reliable engineering practices. Role Description This is a full-time on-site role for a Firmware Design Engineer located in Pune. The Firmware Design Engineer will be responsible for developing and testing firmware and embedded software, debugging hardware and software issues, and working closely with electrical engineers to design and implement embedded systems. The role also includes documenting development processes and ensuring compliance with industry standards. Qualifications Strong skills in Firmware and Embedded Software development, Linux, RTOS based development Proficiency in Debugging and Software Development Background in Electrical Engineering Excellent problem-solving and analytical skills Ability to work on-site in Pune Bachelor's degree in electronics engineering, Computer Engineering, or a related field Experience with Xilinx, Altera, Microchip FPGAs is a plus, Experience with Texas, Microchip, ST controllers is a plus Hand on experience in Tool flow, builds are desirable Strong in C, C++, Embedded C , Scripting etc is must Show more Show less

Digantara is a leading Space Surveillance and Intelligence company focused on ensuring orbital safety and sustainability. With expertise in space-based detection, tracking, identification, and monitoring, Digantara provides comprehensive domain awareness across regimes, allowing end users to have actionable intelligence on a single platform. At the core of its infrastructure lies a sophisticated integration of hardware and software capabilities aligned with the key principles of situational awareness: perception (data collection) , comprehension (data processing) , and prediction (analytics) . This holistic approach empowers Digantara to monitor all Resident Space Objects (RSOs) in orbit, fostering comprehensive domain awareness. Digantara seeks a highly skilled Senior Embedded Software Engineer to design and develop embedded software solutions tailored specifically for real-time image processing. You will leverage your expertise to enable the development of state-of-the-art embedded software with applications such as tracking objects from both space and the ground.\ Why Us? Be part of a collaborative and innovative environment where your ideas and skills make a real difference to the entire space realm Push the boundaries with hands-on experience, greater responsibilities, and rapid career advancement Competitive incentives, galvanizing workspace, blazing team—pretty much everything you have heard about a startup Responsibilities Design, develop, and implement embedded software for real-time image processing for satellite payload applications. Translate and optimize image processing algorithms to FPGA/SoC platforms to achieve low latency and high throughput. Collaborate with system-level designers and hardware designers, generate software functional requirements and architecture, and ensure seamless integration of software and hardware. Collaborate effectively with cross-functional teams to conceptualize, design, and implement optimal embedded software solutions for image processing. Define and implement interface and communication protocols for data handling between the satellite payload and bus systems. Develop clean, well-structured, maintainable code and execute comprehensive testing according to space industry standards (e.g., the ECSS software engineering standard). Implement rigorous software quality assurance practices, including static analysis, code coverage analysis, and other verification techniques. Develop efficient embedded software for high-performance embedded systems with the ARM Cortex processor architecture. Leverage AMD-Xilinx/Microchip EDA tools (e.g., Vivado/Vitis IDE, Libero SoC design suite) to develop efficient embedded software solutions. Troubleshoot and resolve embedded software defects and hardware interface issues. Required Qualifications B.Tech/B.E in Electronics Engineering or M.Tech/M.E or PhD degree in Embedded Systems/VLSI. 5+ years of experience in Embedded software design and development, with a strong focus on image processing and experience in handling communication protocols. Strong proficiency in bare-metal and RTOS programming for embedded systems, with expertise in real-time scheduling, interrupt handling, and device drivers. Proven ability to optimize embedded software implementation, including code optimization, memory management, and power efficiency techniques. Proficiency in Embedded C and C/C++ programming languages. Strong understanding of data communication protocols such as I2C, UART, SPI, CAN, Gigabit Ethernet, LVDS, RS422, etc. Working knowledge of software configuration management tools and defect tracking tools. Preferred Skills Prior experience in embedded software implementation in the areas of satellite imaging payload or ground-based imaging systems is highly preferred. Working knowledge of FPGA/SoC-based embedded systems designed for image processing applications is highly valued. Experience in hardware-related programming of FPGA interfaces and high-level synthesis. Knowledge of implementing fault-tolerant embedded systems for satellite applications. Familiarity with digital image processing and implementation. Experience in Python programming language and knowledge of Verilog/VHDL. Experience with camera interfaces such as USB3, CoaXPress, CameraLink, PCIe, Gigabit ethernet, etc. General Requirements Ability to work in a mission-focused, operational environment. Ability to think critically and make independent decisions. Interpersonal skills to enable working in a diverse and dynamic team. Maintain a regular and predictable work schedule. Writing and delivering technical documents and briefings. Verbal and written communication skills as well as organizational skills. Travel occasionally as necessary. PI267575298 Show more Show less

This role involves the development and application of engineering practice and knowledge in the following technologiesElectronic logic programs (FPGA, ASICs); Design layout and verification of integrated circuits (ICs),printed circuit boards(PCBs), and electronic systems; and developing and designing methods of using electrical power and electronic equipment; - Grade Specific Focus on Electrical, Electronics Semiconductor. Develops competency in own area of expertise. Shares expertise and provides guidance and support to others. Interprets clients needs. Completes own role independently or with minimum supervision. Identifies problems and relevant issues in straight forward situations and generates solutions. Contributes in teamwork and interacts with customers.

Job Description As an FPGA Engineer specialised in RTL (Register Transfer Level) coding, you will be responsible for designing, optimising, and implementing hardware solutions on Field-Programmable Gate Arrays (FPGAs) to support high-frequency trading strategies. You will work closely with the trading systems team to develop and deploy ultra-low latency trading infrastructure, ensuring the highest levels of performance, reliability, and efficiency. Key Responsibilities RTL Design and Optimisation: Design and optimise FPGA-based solutions using RTL coding techniques to achieve ultra-low latency and high throughput for trading algorithms and strategies. Algorithm Implementation: Implement trading algorithms and strategies in hardware, leveraging FPGA capabilities to minimise latency and maximise performance. Hardware Acceleration: Identify opportunities for hardware acceleration of critical trading functions and develop FPGA-based solutions to achieve significant speedups. Performance Analysis and Tuning: Conduct performance analysis of FPGA designs, identify bottlenecks, and fine-tune the implementations to achieve optimal performance. Hardware Integration: Collaborate with software engineers and system architects to integrate FPGA-based solutions into the overall trading infrastructure, ensuring seamless operation and compatibility. Testing and Validation: Develop test benches and perform thorough testing and validation of FPGA designs to ensure correctness, reliability, and robustness under real-world trading conditions. Documentation and Reporting: Document FPGA designs, methodologies, and implementation details, and provide regular reports and updates to stakeholders on project progress and performance metrics. Requirements Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field. Proven experience in FPGA design and development, with a focus on RTL coding using Verilog or VHDL. Deep understanding of computer architecture, digital design principles, and hardware/software co-design concepts Experience with high-frequency trading systems and ultra-low latency design techniques is highly desirable. Proficiency in FPGA development tools and workflows, such as Xilinx Vivado or Intel Quartus. Strong analytical and problem-solving skills, with the ability to optimise designs for performance, power, and resource utilisation. Excellent communication and collaboration skills, with the ability to work effectively in a fast-paced, team-oriented environment. Show more Show less