2434 System Verilog Jobs - Page 24

Work Expertise : 4+ years Job Specs : - Expertise in Digital Verification - Expertise in Functional Verification - Expertise in SOC IP Verification - Expertise in working on system Verilog assertions & test benches - Expertise in working on OVM UVM VMM based verification flow - Expertise in working on ARM processor - Expertise in working on AMBA bus protocols (AXI, AHB, APB) - Expertise in CXL or PCIe Protocol Verification - Expertise in simulation tools (VCS, ModelSim, Questa) - Expertise in driving Verification Strategy, writing Test Plan, developing Test Bench, Test cases. - Expertise in analysing Code Coverage, Functional Coverage and Assertions. - Expertise in verification of complex So...

Work Expertise : 4+ years Job Specs : - Expertise in Digital Verification - Expertise in Functional Verification - Expertise in SOC IP Verification - Expertise in working on system Verilog assertions & test benches - Expertise in working on OVM UVM VMM based verification flow - Expertise in working on ARM processor - Expertise in working on AMBA bus protocols (AXI, AHB, APB) - Expertise in CXL or PCIe Protocol Verification - Expertise in simulation tools (VCS, ModelSim, Questa) - Expertise in driving Verification Strategy, writing Test Plan, developing Test Bench, Test cases. - Expertise in analysing Code Coverage, Functional Coverage and Assertions. - Expertise in verification of complex So...

Work Expertise : 4+ years Job Specs : - Expertise in Digital Verification - Expertise in Functional Verification - Expertise in SOC IP Verification - Expertise in working on system Verilog assertions & test benches - Expertise in working on OVM UVM VMM based verification flow - Expertise in working on ARM processor - Expertise in working on AMBA bus protocols (AXI, AHB, APB) - Expertise in CXL or PCIe Protocol Verification - Expertise in simulation tools (VCS, ModelSim, Questa) - Expertise in driving Verification Strategy, writing Test Plan, developing Test Bench, Test cases. - Expertise in analysing Code Coverage, Functional Coverage and Assertions. - Expertise in verification of complex So...

About the Role We are seeking a highly skilled and experienced Hardware Architect to join our dynamic team. The ideal candidate will have a strong background in hardware architecture, particularly in writing architectural models and conducting performance and power analysis of chips. In addition to collaborating closely with our hardware team, the successful candidate will also work with our software department, which focuses on compilers, runtime software, and kernel software, to ensure cohesive and efficient chip design and functionality. This is what you are responsible for Architecture Modeling: Develop architecture models for AI chips. Collaborate with cross-functional teams to ensure m...

You will be a member of the FPGA development team designing and developing complex FPGAs for use in state-of-the-art embedded systems. As an FPGA Design Engineer, you will be involved in the various stages of FPGA development life cycle - design, coding, verification, and validation of FPGAs. **Key Responsibilities:** - Experience in design of FPGA functional blocks - Excellent RTL coding skills in Verilog / VHDL - Familiarity with AMD (Xilinx) / Intel (Altera) / Lattice / Microchip FPGAs - Familiarity with AMD (Xilinx) ISE, Vivado / Intel (Altera) Quartus / Lattice Diamond / Microchip Libero FPGA tools - Experience in Functional verification using ModelSim - Familiarity with one or more of ...

As a software developer at Siemens EDA, your role involves understanding customer requirements and user stories to drive the implementation process effectively. You will have the opportunity to work on developing comprehensive verification IPs for various interfaces such as PCIe Gen5/Gen6, USB3.2, 400Gigabit Ethernet, DDR5, LPDDR5, and coherency protocols like CXL. Your responsibilities will include: - Specifying, implementing, testing, and improving verification components for different end-user applications. - Working with technologies like SV, UVM, Assertions, Coverage, Test plan, BFM design, debug, and logger. - Collaborating with TMEs, Field AEs, and customers to deploy solutions and re...

We are seeking experienced Emulation Engineers with a strong aptitude for working on Emulation Platforms. Candidates should have a deep understanding of system-level aspects of ASIC development and be skilled in emulation testbench and test plan development. Responsibilities: Develop and execute emulation test benches and test plans. Utilize coding and problem-solving skills to contribute to the functional verification of designs. Manage the full life cycle of emulation, from planning to system-level tests. Develop platform agnostic methodologies that scale across traditional DV and emulation and post-silicon bringup for functionality, performance etc Collaborate with software and system val...

Position: System C Modelling (SI28FT RM 3610) Job Description System C experience (preferred). Firmware experience with decent C++ expertise and SoC knowledge. Job Category: Embedded HW_SW Job Type: Full Time Job Location: Bangalore Experience: 2-8 years Notice period: 0-30 days

As a Senior Logic Design Engineer in the IBM Systems division, you will be responsible for the microarchitecture design and development of features to meet Secure, high performance & low power targets of the Mainframe and / or POWER customers. Deep expertise in the implementation of functional units within the core / cache / Memory controller / Interrupt / crypto / PCIE / DLL Additional responsibilities: logic (RTL) design, timing closure, CDC analysis etc. Understand and Design Power efficient logic. Agile project planning and execution. RequirementsMasters in VLSI with demonstrated experience in the micro architecture and design of state of art Processor features to enhance high performanc...

The engineer should be well versed in Verilog/VHDL RTL coding, experienced in using Mentor DfT tools and Cadence tools. The engineer needs to have hands-on experience in scan insertion, JTAG, ATPG DRC and coverage analysis, Simulation debug with timing/SDF. Candidate with LBIST and Mixed Signal Radar IC experience is highly desirable Must be proactive, collaborative and detail-oriented capable of exercising independent judgment The engineer with experience on debug and root cause the problem in simulation failures Self-motivation, flexibility, with strong interpersonal skills. Effective communication skills, oral and written skills.

Job Specs : - Expertise in Digital Verification - Expertise in Functional Verification - Expertise in SOC / IP Verification - Expertise in working on system Verilog assertions & test benches - Expertise in working on OVM / UVM / VMM based verification flow - Expertise in working on ARM processor - Expertise in working on AMBA bus protocols (AXI, AHB, APB) - Expertise in CXL or PCIe Protocol Verification - Expertise in simulation tools (VCS, ModelSim, Questa) - Expertise in driving Verification Strategy, writing Test Plan, developing Test Bench, Test cases. - Expertise in analysing Code Coverage, Functional Coverage and Assertions. - Expertise in verification of complex SoCs. - Expertise in T...

Job Specs : - Expertise in Digital Verification - Expertise in Functional Verification - Expertise in SOC / IP Verification - Expertise in working on system Verilog assertions & test benches - Expertise in working on OVM / UVM / VMM based verification flow - Expertise in working on ARM processor - Expertise in working on AMBA bus protocols (AXI, AHB, APB) - Expertise in CXL or PCIe Protocol Verification - Expertise in simulation tools (VCS, ModelSim, Questa) - Expertise in driving Verification Strategy, writing Test Plan, developing Test Bench, Test cases. - Expertise in analysing Code Coverage, Functional Coverage and Assertions. - Expertise in verification of complex SoCs. - Expertise in T...

Job Specs : - Expertise in Digital Verification - Expertise in Functional Verification - Expertise in SOC / IP Verification - Expertise in working on system Verilog assertions & test benches - Expertise in working on OVM / UVM / VMM based verification flow - Expertise in working on ARM processor - Expertise in working on AMBA bus protocols (AXI, AHB, APB) - Expertise in CXL or PCIe Protocol Verification - Expertise in simulation tools (VCS, ModelSim, Questa) - Expertise in driving Verification Strategy, writing Test Plan, developing Test Bench, Test cases. - Expertise in analysing Code Coverage, Functional Coverage and Assertions. - Expertise in verification of complex SoCs. - Expertise in T...

Mainframe IBM Z/OS , Mainframe COBOL , VSAM , QSAM , other file formats JCL , EAZYTRIEVE , REXX , SORT , ICETOOLS FILEAID , ABEND AID , EXPEDITER , CODE COVERAGE ENDAVOR, CICS COBOL , MAP Credit Card CARD LINK 1.0 or Vision Plus Familiar with card application domain knowledge on Cardlink online and batch processing and cutoff point Card on-boarding processing Card Installment & Personal loan processing Loyalty and Rewards Statement process Card Embossing process PIN, CVV generation & validation GL processing Cardlink Interest, Fees and charges CARD Scheme End-to-end authorization - VISA, MasterCard, UPI, NCCC Card schemes clearing and settlement - VISA, MasterCard, UPI, NCCC HSM HSM function...

As an ASIC Verification Expert at Sandisk, you will play a crucial role in ensuring the quality and performance of cutting-edge solutions. Your responsibilities will include: - Demonstrating expertise in ASIC verification, System Verilog, UVM, and Verilog. - Leading a team of 2-5 engineers as a technical lead. - Handling IP level verification, testbench architecture development, and Testbench component developments effectively. - Utilizing your expertise in coverage closure, code coverage, functional coverage, and Gate level simulations. - Independently defining verification plans, creating testbenches, test cases, and gate level simulations. - Applying knowledge of serial protocols such as ...

As a Deployment Engineer at the company, you will play a crucial role in deploying emerging protocol standards solutions for simulation and emulation platforms. Your responsibilities will include publishing success stories for each deployment, upgrading periodic protocol specifications, and providing the latest product training to field AEs for enhanced scalability. Tracking protocol evolution in standards organization meetings and sharing insights with different teams will be essential. Your technical contributions in standards conferences will help promote the visibility of Synopsys solutions. Validating the field of use through expert testing, ensuring solutions collateral readiness, and ...

As an RTL Design Engineer at Qualcomm India Private Limited, you will be responsible for developing micro-architecture and RTL design for Cores related to security. Your role will involve block level design, enabling software teams to use hardware blocks, and running ASIC development tools including Lint and CDC. You will report status and communicate progress against expectations. **Key Responsibilities:** - Develop micro-architecture and RTL design for Cores related to security - Responsible for block level design - Enable software teams to use hardware blocks effectively - Run ASIC development tools including Lint and CDC - Report status and communicate progress against expectations **Qua...

As a member of the performance verification team at the company, you will play a crucial role in ensuring that complex SOCs meet demanding performance goals. Your responsibilities will include developing a deep understanding of chip architecture, creating performance verification scenarios, analyzing detailed metrics, and collaborating with various teams to optimize the design implementation. - Develop a thorough understanding of chip architecture to define and develop performance verification scenarios. - Create test cases that cover system scenarios and benchmarks to stress target paths and features. - Synthesize reference metrics based on inputs from different teams and industry standards...

As an FPGA Engineer at Ceragon Networks, you will be part of a team responsible for transforming ideas into fully developed products. You will play a crucial role in shaping the entire product lifecycle, including internal development of ASIC, RF chip, and FPGA technologies. Your primary focus will be on contributing to the advancement of next-generation backhaul communication systems within Ceragon's FPGA team based in India. Key Responsibilities: - Engage in various aspects of FPGA design activities, such as coding, synthesis, mapping, timing closure, providing verification support, and conducting LAB bring up. - Contribute to FPGA architecture and design efforts for current and upcoming p...

Advantal Technologies is looking for FPGA Engineer to join our dynamic team and embark on a rewarding career journey An FPGA (Field-Programmable Gate Array) Engineer is responsible for designing, developing, and implementing digital circuits and systems using FPGA technology They work on projects that require complex digital logic, high-speed data processing, and real-time hardware acceleration FPGA Engineers play a crucial role in various industries, including telecommunications, aerospace, defense, automotive, and consumer electronics Key Responsibilities:FPGA Design and Development: Design and develop FPGA-based solutions to meet specific project requirements This involves creating high-l...

Duties in this position will include: Testbench and test sequence development for verification of new controller technologies and features Functional coverage planning, coverage item coding, and test suite augmentation to achieve Functional Coverage Regression test development, monitoring, debug/triage, and correction to test environment, sequences, debug of controller RTL design Development & support of Verification environment scripting and capabilities Qualifications Bachelors Degree or above in EE/CS, at least 5-7 years experience with HDL logic Design-Verification System Verilog / UVM testbench, Verilog/System Verilog logic design/RTL fluency a must Pre-existing Experience / familiarity...

We are seeking highly motivated, energetic, and team-oriented individual contributors who can work on synthesis, LEC, and constraints for NXPs digital IPs, working in close collaboration with the RTL team. Key Responsibilities Work closely with the architects and RTL team on synthesis, LEC, and constraints of NXP digital IPs Carry out floor planning, and physically aware synthesis on high-performance IPs Perform timing and power analysis on the design database (db), improve the recipe, and provide timing feedback to the RTL team Leads or solo owners are expected to work with minimal micro-management needs. They should be able to communicate with other project members to manage task divisions...

Roles and Responsibilities Design verification using UVM, OVM, PCIe, Ethernet, Amba, USB protocols. Develop testbenches for IP verification and SOC verification. Collaborate with cross-functional teams to identify requirements and develop solutions. Conduct functional verification of designs using System Verilog and Verilog HDL. Participate in code reviews to ensure high-quality deliverables.

As a member of the core R&D team working on multiple verticals of Simulation at Questa Simulation Product, you will be part of a highly energetic and enthusiastic team based in Noida/Bangalore. Additionally, you will have the opportunity to travel to various locations in India and around the globe, working with teams that impact entire cities, countries, and the future landscape. **Key Responsibilities:** - Contribute to core algorithmic advancements and software design/architecture within the QuestaSim R&D team of Siemens EDA. - Collaborate with senior software engineers to ensure the final production quality of new components and algorithms, as well as develop new engines and enhance exist...

As a Verification Lead at Krutrim, you will lead the verification efforts for complex System on Chips (SoCs) and multi-chiplet System on Packages. Your responsibilities will include developing verification plans, testbench environments, and reusable verification IP. You will work on module, sub-systems, chiplets, and complex multi-chiplet testbench environments. Additionally, you will contribute to developing UVM and C/Python based testbench environments for functional, netlist, and power simulations. Your role will also involve developing reference models using System Verilog/SystemC/Python and enhancing verification flow and methodology. Debugging design units using simulation and formal t...