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Senior Engineer Emulation QA

Senior Engineer Emulation QA

Siemens

2 - 8 years

0 Lacs

noida uttar pradesh

Posted:3 weeks ago| Platform: Shine logo

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Skills Required

system verilog uvm assertions test plan coverage bfm design debug logger

Work Mode

On-site

Job Type

Full Time

Job Description

As a software developer at Siemens EDA, your role involves understanding customer requirements and user stories to drive the implementation process effectively. You will have the opportunity to work on developing comprehensive verification IPs for various interfaces such as PCIe Gen5/Gen6, USB3.2, 400Gigabit Ethernet, DDR5, LPDDR5, and coherency protocols like CXL. Your responsibilities will include: - Specifying, implementing, testing, and improving verification components for different end-user applications. - Working with technologies like SV, UVM, Assertions, Coverage, Test plan, BFM design, debug, and logger. - Collaborating with TMEs, Field AEs, and customers to deploy solutions and resolve any issues efficiently. To excel in this role, we are looking for a candidate with the following qualifications: - Graduation in Electronics Engineering (B.Tech/ M.Tech) or a related field from a reputed institute. - 2-8 years of experience in verification engineering. - Proficiency in System Verilog for test bench and exposure to verification methodologies like UVM, VMM. - Knowledge of standard bus protocols such as PCIe, USB, SATA, NVMe, Flash, DIMM. - Strong teamwork skills, resilience, openness to learning, and building expertise in new areas.,

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Senior Engineer Emulation QA