Job Title : C++ / Runtime Engineer About the Role : We're seeking an experienced Runtime Engineer to develop and optimize software systems for our silicon platform. This role focuses on building efficient runtime systems that maximize chip performance while ensuring reliability and ease of use. Key Responsibilities : - Design and implement runtime systems for AI accelerator execution and memory management - Develop and optimize runtime libraries for high-performance tensor operations - Create efficient memory allocation and scheduling algorithms for ML workloads - Interface with hardware subsystems through PCIe interface for optimal data transfer - Build and maintain runtime profiling and debugging tools - Work closely with hardware team to optimize end-to-end performance - Document runtime architecture and implementation strategies - Perform thorough testing and performance analysis of runtime components Required Qualifications : - BTech/MTech in Computer Science or Electronics & Communication - 4+ years of experience in systems programming with C/C++ - Strong understanding of concurrent programming and multithreading - Proficiency with debugging and profiling tools (gdb, valgrind, WinDbg, address sanitizer) - Experience with performance optimization and low-level system interfaces - Knowledge of memory management and scheduling algorithms Nice To Have : - Experience with ML frameworks (TensorFlow, PyTorch) and their runtime systems - Understanding of AI/ML workload characteristics - Background in driver development or hardware interfaces What We Offer : - Opportunity to work on cutting-edge high performance compute hardware - Collaborative environment with global teams - Fast-paced and innovation-driven culture - Chance to shape the future of AI acceleration
What we do : Our game-changing AI solutions revolutionize what people and businesses can achieve. Ara inference processors combined with our SDK deliver unrivaled deep learning performance at the edge to accelerate and optimize real-time decision making where every millisecond is critical, and power efficiency is a must. solutions embed high-performance AI into edge devices to create a smarter, safer, and more enjoyable world. Edge AI is on the brink of a boom, and looking forward to playing a significant role in it. This is what you are responsible for : - Will be part of a highly talented global team developing neural network systems. - Will have the opportunity to develop the application and system software for a cutting-edge AI silicon. - Member of a software engineering team, you will design and implement compilers, translators for AI computing system - Work closely with ASIC and hardware teams, propose architectural features and develop software for the system and build the highest perf/watt system Necessary Qualifications : - Excellent knowledge of Python/C/C++, data structures and algorithms. - Experience in neural network frameworks like TensorFlow, ONNX, Caffe, PyTorch etc. is a plus - BTech/MTech with 4+ years of experience in software development
Work Profile : - Work on development of custom Analog circuit boards for applications related to RF, interfaces etc. - Implement new features and bug fixes - Verify analog/mixed-signal integrated circuits - Develop test cases to verify new features and bug fixes - Review and update the user manuals for software tools. - Supporting digital modelling of analog circuits for mixed-signal verification - Creating design specifications and circuit schematics - Work both independently and in a team environment, with the opportunity to provide technical leadership to other members of the engineering team - Create and/or modify specification documents detailing system design and enhancements to meet marketing requirements - Collaborate with others in the creation of technical reports, whitepapers, and user documentation Requisites : - EE/EEE/ECE graduate, undergraduate degree from reputed Tier 1 or Tier 2 colleges . - Strong knowledge of analog integrated circuit design fundamentals - Proven experience taking designs from concept to production - Experience in analog/mixed-signal IC design & verification - Understanding of BJT, CMOS and Op-Amp technologies. - Good understanding of analog/mixed-signal design flows (Cadence, Synopsys) - Transistor and system level simulation skills - Discrete time and continuous time signal processing skills - Strong lab and silicon validation skills - Verilog based digital design and test bench development, is a plus - Strong communication skills, both written and verbal.
We are seeking an exceptional Senior ASIC Verification Engineer to join our innovative semiconductor team. You will lead verification initiatives for complex ASIC designs and drive technical excellence across projects. About the Role : You will be responsible for developing advanced verification environments, leading cross-functional technical initiatives, and mentoring team members while ensuring the highest quality standards in our ASIC designs. What You'll Do : - Design and implement advanced System Verilog/UVM verification infrastructures - Lead verification planning and execution for complex ASIC projects - Develop comprehensive test strategies ensuring thorough design validation - Drive debug resolution through collaboration with cross-functional teams - Mentor and provide technical guidance to verification team members - Enhance and optimize verification methodologies - Own end-to-end SOC verification environments Required Skills & Experience : - BS / MS in Electrical/Computer Engineering - 2+ years of hands-on ASIC verification experience - Expert-level SystemVerilog, UVM, and object-oriented programming skills - Strong proficiency with industry tools like VCS, Xcelium, QuestaSim - Advanced debugging and problem-solving capabilities - Excellent communication and collaboration abilities - CLP and GLS - Python/Perl scripting expertise Nice to Have : - Experience with PCIe, DDR, USB, C2C - Knowledge of on-chip interconnects and processor subsystems - Background in formal verification methods - Prior experience on Emulators What We Offer : - Opportunity to work on cutting-edge semiconductor projects - Collaborative and innovative work environment - Professional growth and leadership opportunities
Were looking for a talented and motivated Driver Development Engineer who specializes in Windows software. In this role, youll help build and improve low-level software drivers that allow hardware and software to work together smoothly. The ideal candidate has experience with low-level programming, working in the Windows kernel, and understanding how hardware works. If you enjoy solving technical challenges and working with a great team, wed love to hear from you. This is what you are responsible for - Design and develop PCIe and USB drivers for AI chipsets, ensuring performance and reliability - Maintain clear communication in understanding the hardware subsystems and internals to identify possible solutions for a given problem - Optimize data path efficiency and minimize latency Necessary Qualifications : - BTech/MTech in CS or ECE - 4+ years experience in Windows PCIe and USB kernel and/or userspace drivers. - Strong fundamentals in C/C++ and OS internals. - Proficiency in Windows driver frameworks (WDM/WDF) and understanding of - Windows-specific DMA protocols. - Familiarity with MCDM is a plus. - Expertise in kernel space debugging using tools like WinDbg, dbgview, Visual Studio, or similar. - ARM Processor architecture and Assembly Language. - Experience with PC software - System BIOS, UEFI, ACPI, Drivers, Applications - Embedded OS (Kernel architecture, OS services heap, memory, multi-core, multi-threading, and crash debugging)
About the Role : We are seeking an experienced Software Architect with a strong background in designing and implementing scalable, high-performance systems. As a Software Architect , you will play a key role in shaping the technical direction of our products, defining architectural best practices, and collaborating closely with cross-functional teams to deliver state-of-the-art AI-driven solutions. This is what you are responsible for : - Lead the architectural design and implementation of scalable, reliable, and high-performance software systems for AI, AI Compiler and edge computing applications. - Collaborate with product managers, software engineers, and hardware engineers to ensure alignment of technical decisions with business objectives. - Define and maintain architectural best practices, guidelines, and documentation for the software engineering team. - Evaluate and recommend technologies, frameworks, and tools to optimize the performance and scalability of our solutions. - Mentor and provide technical leadership to the engineering team, fostering a culture of collaboration and innovation. - Participate in code reviews, design discussions, and technical roadmap planning to ensure high-quality delivery. - Drive continuous improvement in system architecture and development processes to support the company's growth and evolving requirements. Necessary qualifications : - 8+ years of experience in software architecture, system design, and development of scalable, distributed systems. - Proven experience in designing edge-based solutions, compilers, runtime, firmware. - Strong programming skills in modern languages such as Python, C++ or similar language. - Expertise in designing high-performance, low-latency systems for AI/ML workloads. - Strong understanding of software development methodologies, DevOps practices, and CI/CD pipelines. - Familiarity with hardware-software co-design, embedded systems, and edge computing solutions is a plus. - Excellent problem-solving and communication skills, with the ability to explain complex technical concepts to both technical and non-technical stakeholders. Preferred qualifications : - Experience with AI frameworks (e.g., TensorFlow, PyTorch) and understanding of AI/ML pipelines. - Knowledge of hardware accelerators (e.g., GPUs, NPUs) and optimization for low-power AI inferencing. - Experience working in a fast-paced, startup environment is a plus. What you will gain : - Be part of a pioneering team shaping the future of AI and edge computing. - Work on innovative projects that solve real-world challenges. - Opportunity to grow with a dynamic, forward-thinking company. - Competitive salary, benefits, and a collaborative work environment.
Job Description : This is what you are responsible for : - Lead the architectural design and implementation of scalable, reliable, and high-performance software systems for AI, AI Compiler and edge computing applications. - Collaborate with product managers, software engineers, and hardware engineers to ensure alignment of technical decisions with business objectives. - Define and maintain architectural best practices, guidelines, and documentation for the software engineering team. - Evaluate and recommend technologies, frameworks, and tools to optimize the performance and scalability of our solutions. - Ensure that all software architecture aligns with security, performance, and reliability standards. - Mentor and provide technical leadership to the engineering team, fostering a culture of collaboration and innovation. - Participate in code reviews, design discussions, and technical roadmap planning to ensure high-quality delivery. - Drive continuous improvement in system architecture and development processes to support the company's growth and evolving requirements. Necessary qualifications : - 8+ years of experience in software architecture, system design, and development of scalable, distributed systems. - Proven experience in designing edge-based solutions, compilers, runtime, firmware. - Strong programming skills in modern languages such as Python, C++ or similar language. - Expertise in designing high-performance, low-latency systems for AI/ML workloads. - Strong understanding of software development methodologies, DevOps practices, and CI/CD pipelines. - Familiarity with hardware-software co-design, embedded systems, and edge computing solutions is a plus. - Excellent problem-solving and communication skills, with the ability to explain complex technical concepts to both technical and non-technical stakeholders.
Job Description : As Run time Engineer , on our team, you will have the opportunity to work on the fundamental abstractions, programming models, compilers, runtimes, libraries, and Application Programming Interfaces (APIs) that enable large scale training and inferencing of the world's most advanced AI models. Requirements : - 4+ years experience with C/C++11 with strong fundamentals in concurrent coding. - Ability to mentor juniors and drive feature completion with little supervision. - Highly skilled in using debugging tools like gdb, valgrind, WinDbg, address sanitizer, or similar. - Demonstrated ability in debugging under high-pressure, customer-facing situations. - Familiarity with security protocols like TSL/RSA is preferred. - Working experience with Rust is a strong plus. Responsibilities : - Design and develop the application and system software for a cutting-edge AI silicon - Ability to work in a fast-paced environment collaborating with various teams locally and globally - A passion for problem-solving and the ability to consider the bigger picture during feature development - Define feature requirements with customers and teams, gathering feedback to improve products - Ensure clear understanding of requirements, documenting implementation strategies - Review and test features to prevent issues, conducting impact analysis to mitigate potential problems Minimum Qualifications : - Bachelor's degree in Engineering, Information Systems, Computer Science, or related field and 2+ years of Software Engineering or related work experience.
Hiring : ASIC Engineering Director : Experience : 20+Years Our game-changing AI solutions revolutionize what people and businesses can achieve. Ara inference processors combined with our SDK deliver unrivaled deep learning performance at the edge to accelerate and optimize real-time decision making where every millisecond is critical, and power efficiency is a must. embed high-performance AI into edge devices to create a smarter, safer, and more enjoyable world. Edge AI is on the brink of a boom, and Kinara is looking forward to playing a significant role in it. KEY EXPERTISE : - Seasoned ASIC Front End leader with 20 years of cross domain experience ranging from architecture, uArch, IP/Sub- systems/SOC/chiplets design/integration, RTL coding, Synthesis, CDC, timing, power analysis, system/IP verification, Silicon Bring up. - Proven track record of leading the design and development of complex IPs, sub-systems, chiplets for SOCs in the multiple domains like PCIE, USB, UCIE, ARM/x86 CPUs, RISC-V, VPU/NPU, GPU, LSIO, NOC, Fabrics, AMBA buses, DRAM, SD/SDIO/eMMC etc. Responsible for defining the technical direction of ASIC designs and collaborating with cross- functional teams to ensure successful ASIC implementation. - Demonstrated strong leadership, project timelines & resources management and team management skills, and the ability to influence the technical strategy of the organization. - Familiar with ASIC verification methodologies, DFT, Physical design and board design which help in influencing cross functional teams in getting desired results. - Excellent execution capabilities to handle multiple domains in multiple projects simultaneously. - Delivered superior results through team collaboration and diversity of thought. Always open to learn new technologies to grow in technical breadth and depth. - Managed development of multiple sub-systems and IPs designed from scratch for Intel IOT (Elkhart Lake), Edge (Reefbay), dVPU/NPU (Arrow LakeR), GPU (DMR-D), Media (MTL-D), Smart NIC (Altera NIC), Palm Ridge, Mount Morgan IPU SoCs which are executed in advanced technology nodes of both Intel (18A, 3nm, 5nm) and TSMC (N3e, N5, N6). - Have hands on experience in chiplets, Sub-systems and IP development (micro-architecture development, 3rd party IP integration (Synopsys, Verisilicon. SiFive RISCV, ARM cores etc.,), RTL implementation, synthesis, static timing analysis, Power analysis, system/IP level verification, FPGA emulation, Si bring-up) and SoC integration flows and methodologies. - Led 30+ engineer design team and have good experience in working with cross-functional teams and cross BU teams across multiple geos, resulting in good collaboration and accelerated time to market. - Led IP development (RTL design, Lint, CDC, Synthesis, timing, unit level and system level verification) of various IPs in Nvdia Tegra SoC processors (from first generation [APX] to ninth generation [Xavier]) and Cisco NIC chips. - Have good working experience on low power design methodologies (clock gating, power gating, multi-vt and DVFS) used in mobile SoCs. - Designed couple of modules in Tegra SoC like DMA engine, SD/SDIO/eMMC5.2 host controller and bus-bridges for Nvidia proprietary buses. Worked on architecture, micro architecture, RTL design and timing analysis. Familiar with automotive electronics ISO26262 safety requirements. - Was Executive member from Nvidia in SD card org and JEDEC (eMMC) forum. Participated in SD/SDIO4.x, SD host4.x and eMMC5.x specification development. - Working experience with cross functional teams like back end, analog I/O pad and SW teams to ensure IP requirements are met at each stage. Have working experience in developing tree build and regression infrastructure. - Have hands on experience in ASIC verification also - Test Planning, Develop Directed, Random and System-level (soc level) Test Cases; Design Test Bench using System Verilog; Develop Random Test environment; Execute Code Coverage & Analyse Reports, Execute Gate-level Simulations; Execute Functional & Regression Tests. - Good Team Player : Participated and lead the effort of SD4.x/eMMC5.x host controller design and verification. Detail oriented go- getter with Fast Learning Curve and strong analytical, decision making, problem solving, visualizing, negotiating, communication & interpersonal skills. - Mentored engineers, designed IP/SS schedules with proper staging plan with cross team dependencies, identified and solved technical issues, and ensured development of high-quality products.
About the Role : We are seeking a talented Implementation Engineer to join our dynamic team. The successful candidate will be responsible for leading and executing Synthesis and STA for complex AI SOC with multi-mode and multi power domain design, ensuring the quality and reliability of our products. This is what you are responsible for : - Synthesis and STA (static timing analysis). - Ability to optimize designs for best in class in low power and high performance with logically equivalent RTL. - Professional experience with ECO implementation, both functional and timing closure. - Experience with multi-clock, multi-power domain designs and multi-mode timing constraints. - Familiarity with DFT insertion. - Familiarity with simulation, debugging tools, and working closely with Design teams. - Ability to collaborate with different functional teams like RTL Design, DFT and Physical design. - Showcase your deep understanding of the following physical design concepts/constraints: floor-planning, placement, congestion, and setup/hold timing closure. Necessary Qualifications : - Bachelor's or Master's degree in Electronics, Computer Science Engineering, or a related field - Minimum of 5 to 7 years of experience in Implementation flows/ Synthesis and STA. - Experience with Cadence, Synopsys and Mentor tools - Experience with Verilog and VHDL. - Experience with sign-off Static Timing Analysis, Logic equivalency checks, and Static Low Power Checks (UPF/CPF/CLP) - Formal verification for RTL 2 gates and gates2gates - Conformal ECO for doing complex functional ECOs. - Low power synthesis on smaller blocks and subsystems using DC/Genus - Physical Aware synthesis - Writing Timing Constraints sub-blocks and Top level. - Flow Automation and Scripting using TCL and Python or Perl.
What You'll Be Doing : - In this position, you will expect to lead all block/chip level PD activities. - PD activities includes floor plans, abstract view generation, RC extraction, PNR, STA, EM,IR DROP, DRCs & schematic to layout verification. - Work in collaboration with design team for addressing design challenges. - Help team members in debugging tool/design related issues. - Constantly look for improvement in RTL2GDS flow to improve PPA. - Troubleshoots a wide variety up to and including difficult design issues and applied proactive intervention. - Responsible for all aspects of physical design and implementation of GPU and other ASICs targeted at the desktop, laptop, workstation, and mobile markets. Minimum Qualifications : - Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. - Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. - PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. What We Need To See : - Strong experience in Physical Design. - Strong understanding in the RTL2GDSII flow or design implementation in leading process technologies. Good understanding of the RTL2GDSII concepts related to synthesis, place & route, CTS, timing convergence, layout closure. - Expertise on high frequency design methodologies. Good knowledge and experience in Block-level and Full-chip Floor-planning and Physical verification. Working experience with tools like ICC2/Innovus, Primetime/Tempus etc used in the RTL2GDSII implementation. - Strong knowledge and experience in standard place and route flows ICC2/Synopsys and Innovus/Cadence flows preferred. - Well versed with timing constraints, STA and timing closure. - Good automation skills in PERL, TCL, tool specific scripting on one of the industry leading Place & Route tools. - Ability to multi-task and flexibility to work in global environment. - Good communication skills and strong motivation, Strong analytical & Problem solving skills. - Proficiency using Perl, Tcl, Make scripting is preferred. - Widely considered to be one of the technology worlds most desirable employers, offers highly competitive salaries and a comprehensive benefits package.
Job Summary : We are seeking a highly experienced and skilled Machine Learning Software Engineer with 8-10 years of experience to join our team. The ideal candidate will be a deep learning expert with a strong background in optimizing and deploying machine learning models on specialized hardware, particularly ML accelerators. This role is critical for bridging the gap between theoretical model development and practical, high-performance inference on target platforms. A key focus of this position will be on model quantization and other optimization techniques to maximize efficiency and performance. Key Responsibilities : - Model Porting & Deployment : Port and deploy complex deep learning models from various frameworks (e.g., PyTorch, TensorFlow) to proprietary or commercial ML accelerator hardware platforms (e.g., TPUs, NPUs, GPUs). - Performance Optimization : Analyze and optimize the performance of ML models for target hardware, focusing on latency, throughput, and power consumption. - Quantization : Lead the efforts in model quantization (e.g., INT8, FP16) to reduce model size and accelerate inference while preserving model accuracy. - Profiling & Debugging : Utilize profiling tools to identify performance bottleneck and debug issues in the ML inference pipeline on the accelerator. - Collaboration : Work closely with the ML research, hardware, and software teams to understand model requirements and hardware capabilities, providing feedback to improve both. - Tooling & Automation : Develop and maintain tools and scripts to automate the model porting, quantization, and performance testing workflows. - Research & Innovation : Stay current with the latest trends and research in ML hardware, model compression, and optimization techniques. Required Qualifications : - Experience : 8-10 years of professional experience in machine learning engineering, with a focus on model deployment and optimization. Technical Skills : - Deep expertise in deep learning frameworks such as PyTorch and TensorFlow. - Proven experience in optimizing models for inference on GPUs, NPUs, TPUs, or other specialized accelerators. - Extensive hands-on experience with model quantization (e.g., Post-Training Quantization, Quantization-Aware Training). - Strong proficiency in C++ and Python, with experience writing high performance, low-level code. - Experience with GPU programming models like CUDA/cuDNN. - Familiarity with ML inference engines and runtimes (e.g., TensorRT, OpenVINO, TensorFlow Lite). - Strong understanding of computer architecture principles, including memory hierarchies, SIMD/vectorization, and cache optimization. - Version Control : Proficient with Git and collaborative development workflows. - Education : Bachelor's or Master's degree in Computer Science, Electrical Engineering, or a related field Preferred Qualifications : - Experience with hardware-aware model design and co-design. - Knowledge of compiler technologies for deep learning. - Contributions to open-source ML optimization projects. - Experience with real-time or embedded systems. - Knowledge of cloud platforms (AWS, GCP, Azure) and MLOps best practices. - Familiarity with CI/CD pipelines and automated testing for ML models. - Domain knowledge in areas like computer vision, natural language processing, or speech recognition.
Job Summary : We are seeking an experienced developers for our kernel development team focused on building and optimizing AI/ML operators using our specialised Instruction Set Architecture (ISA). In this role, you will be responsible for design, development, and performance tuning of core kernel components that directly influence the efficiency and reliability of AI/ML workloads on our custom hardware. You will work closely with compiler teams, hardware architects, and application developers to deliver an operator that maximizes performance while meeting stringent accuracy and latency requirements. Key Responsibilities : Kernel Design & Development : - Design and development of core kernel modules, optimized for both performance and energy efficiency under AI/ML workloads. - Design and development of advanced performance profiling/optimization and debugging tools to ensure low latency. - Analyse kernel performance, identify bottlenecks, and implement optimizations at the software and feedback to the hardware for next generation improvements. - Ensure to follow and propose industry best practices for code quality, performance testing, and validation of kernels. - Collaborate with hardware architects, compiler teams to align the kernel design with the underlying ISA capabilities and seamless integration of AIML models. - Stay current on emerging trends in ISA design, low-level programming, and AI/ML hardware acceleration. Ensure that documentation of the kernel components is made. Necessary Qualifications : - Bachelors or Masters degree in Computer Science, Electrical/Computer Engineering, or a related field. - Work experience in C/C++ is required and python is plus. - 3+ years of industry experience in kernel or low-level system software development, with a strong background in optimizing performance for specialized hardware. - Appropriate understanding of assembly language, computer architecture, ISA design/Development, and related performance optimization techniques. - Demonstrated experience in using debugging and performance profiling tools (e.g., kernel debuggers, profilers, trace analyzers). - Experience with developing AI/ML operators or accelerators in hardware-software co-design environments, is a plus. - Experience of relevant industry standards and emerging trends in AI hardware acceleration is a plus. What We Offer : An opportunity to lead innovative kernel development projects at the cutting-edge intersection of AI/ML and custom ISA design. A collaborative, dynamic work environment with access to state-of-the-art technology and methodologies. Competitive compensation, comprehensive benefits, and significant opportunities for professional growth and impact.
As a Embedded SW Lead, you will be responsible for low level drivers, toolchain, boot code, BSPs, and functionality of the Embedded Micro-Controller and its Wireless and Sensor peripherals. Key Qualifications : - Design and develop embedded software using - bare metal- and real time operating systems on multiple boards and MCUs. - Design and develop board bring up code, device driver code, boot loaders, firmware update software (OTA), Secure boot, software for interfacing with sensors and peripherals, and application software. - Design and develop firmware including toolchain, BSPs to support IIoT modules. - Design, develop, and enhance middle layer framework to support reliable and maintainable application development, including higher layer communication stacks such as MQTT, LwM2M etc. - Design, document, code, test, and debug embedded device controllers for IoT. - Create unit and integrated test plans, test cases, and perform unit and integration testing and code reviews. Test tool development for both system verification and production test. - Support project planning efforts, including task definition and work effort. - Perform analysis, resolution, and tracking of defects and improvement to closure. - Develop and improve software development processes and procedures. - Provide engineering support for other departments as necessary. - Complete other engineering duties as assigned Minimum requirements : - 9 + years of experience in embedded systems development with strong C++ skills, multi-threading, multi-processor interfacing, and hardware-software integration. - Excellent software design skills and C/C++ programming skills; preferably in safety critical software development. - 3+ years of programming experience targeting embedded Microcontrollers (Experience with ARM Cortex M3/M4,/MSP430 or similar microcontroller preferred). - Experience working with microcontrollers running both RTOS (Example: RTX, ThreadX, FreeRTOS, Micrium OS, etc.) and bare metal software. - Experience in developing device drivers, timers, interrupt handlers, message-based software, etc., - Experience in developing device drivers for bus interfaces and peripherals: SPI, I2C, UART, ADC, DAC, I2S, USB, LCD - Experience in C/C++ coding standard, OOD, static analysis, and code coverage. - Proficient with software development process. - Demonstrable experience developing efficient (memory, CPU, and bandwidth) software. - Familiarity setting up various embedded toolchains, build, and debugging environments. - Experience with software engineering processes and tools such as configuration management and issue tracking systems. - Ability to read circuit designs/electrical schematics and datasheets. - Experience in using oscilloscopes, logic analyzers, and other test equipment to troubleshoot hardware/software issues. - Excellent problem-solving, design, development, and debugging skills. - Strong communication and interpersonal
Job Summary : As a Principal Engineer Validation & DevOps, you will be responsible for establishing and managing the processes, tools, and frameworks necessary for rigorous validation of our software and systems, as well as building and maintaining a robust DevOps infrastructure. You will serve as a technical leader, guiding cross-functional teams to ensure that our products meet the highest standards of quality, reliability, and performance. This role combines deep technical expertise with strategic planning and process optimization, driving improvements in product validation, automation, and continuous delivery. Key Responsibilities : Validation Leadership : - Design, implement, and manage comprehensive validation strategies and testing methodologies to ensure the reliability, accuracy, and performance of our products. - Develop and maintain automated testing frameworks and continuous validation pipelines that integrate with our development lifecycle. - Oversee the validation of both hardware and software systems in partnership with quality assurance and product teams. DevOps Strategy & Execution : - Architect and implement a scalable DevOps infrastructure that supports rapid development, deployment, and continuous integration/continuous deployment (CI/CD) pipelines. - Develop and integrate automation scripts, configuration management, and monitoring solutions to optimize the release process and ensure system stability. - Collaborate with engineering, operations, and security teams to implement best practices for infrastructure as code (IaC), containerization, and cloud-based deployments. Cross-Functional Collaboration & Mentorship : - Partner with engineering, product, customer support teams to define technical requirements and ensure alignment between development and operational objectives. - Mentor and lead a team of validation engineers and DevOps specialists, fostering a culture of excellence, innovation, and continuous improvement. - Serve as a subject matter expert in validation methodologies and DevOps practices, regularly sharing insights, conducting technical reviews, and facilitating knowledge transfer within the organization. Process Optimization & Innovation : - Evaluate, select, and integrate state-of-the-art tools and technologies to enhance both validation and DevOps processes. - Establish key performance indicators (KPIs) and reporting metrics to measure the efficacy of the validation and deployment pipelines. - Drive initiatives to identify and resolve bottlenecks in the build, test, and deployment processes, ensuring end-to-end quality and performance. Technical Leadership & Architecture : - Provide technical direction for the design and maintenance of systems that support automated validatio n, testing, and continuous integration/deployment. - Contribute to the overall product roadmap by identifying opportunities to improve operational efficiency and system resilience. - Lead cross-disciplinary projects, ensuring that validation and operational aspects are integral to the overall system architecture. Required Qualifications : Educational Background : - Bachelors or Masters degree in Computer Science, Electrical/Computer Engineering, or a related field. Advanced degrees or relevant certifications are a plus. Professional Experience : - 10+ years of experience in software engineering, with significant exposure to validation, DevOps, and infrastructure automation. - Demonstrable experience in architecting and implementing CI/CD pipelines, automated testing frameworks, and large-scale deployment solutions. - In-depth knowledge of scripting languages (e.g., Python, Shell), configuration management tools (e.g., Ansible, Chef, Puppet), containerization technologies (Docker, Kubernetes), and cloud platforms (AWS, Azure, GCP). Technical Skills : - Strong understanding of software validation methodologies, test automation, and quality assurance best practices. - Hands-on expertise with version control systems, build automation tools, and monitoring solutions. - Proven ability to design and implement infrastructure as code (IaC) and leverage container orchestration systems. Leadership & Communication : - Excellent leadership and mentoring skills, with a track record of building and guiding high-performing teams. - Outstanding problem-solving, analytical, and communication skills, with the ability to articulate complex technical concepts clearly to both technical and non-technical stakeholders. - Strong project management skills and experience driving cross-functional initiatives to successful completion.
We are seeking a skilled and motivated Driver Developer with expertise in embedded systems and Real-Time Operating Systems (RTOS). As a key member of our team, you will be responsible for designing, implementing, and maintaining Windows/Linux drivers and DSP firmware, ensuring seamless integration with embedded systems and RTOS environments. The ideal candidate will have a strong background in low-level programming, kernel-mode development, and a deep understanding of hardware interactions. Join us if you are passionate about pushing the boundaries of technology and thrive in a dynamic, collaborative environment. Requirements : - Bachelor's or higher degree in Computer Science or Electronics & Communication with 4 + years of relevant experience - In-depth knowledge of kernel-mode programming in both Windows internals. - Strong C/C++ programming skills and familiarity with assembly language. - Proven experience in Windows driver development and embedded systems. - Strong knowledge on the embedded system. - Proficiency in Windows driver frameworks (WDM/WDF) and understanding of Windows-specific DMA protocols. - experience in Windows PCIe and USB kernel and/or userspace drivers. - Expertise in kernel space debugging using tools like WinDbg, dbgview, Visual Studio, or similar. - Familiarity with MCDM is a plus. Responsibilities : - Develop and maintain Windows/Linux drivers and RTOS for various requirement. - Collaborate with cross-functional teams to integrate drivers into embedded systems. - Design and develop PCIe and USB drivers for AI chipsets, ensuring performance and reliability - Optimize driver performance and ensure compatibility with evolving Windows environments. - Optimize data path efficiency and minimize latency Minimum Qualifications : - Bachelor's degree in Engineering, Information Systems, Computer Science, or related field and 2+ years of Software Engineering or related work experience.