Krutrim

As a Developer/Senior Developer at Krutrim, you will be responsible for developing embedded software for different processors. You should have good knowledge in developing drivers for various hardware blocks such as PCIe, I2C, USB, UART, Ethernet, and Crypto security. Understanding Linux kernel internals and working with open-source software is essential for this role. You will be involved in developing high and low-level designs, drivers, and firmware for different hardware blocks. Additionally, you will work on adopting operating systems and embedded software for various processor architectures. Your responsibilities will include developing software based on pre-silicon development vehicles, bringing up software using pre-silicon vehicles and silicon-based platforms, upstreaming open-source code, developing software component-level tests, and enabling them in a CI/CD system. You will also be debugging issues using standard hardware/software-based debuggers and diagnostic equipment. To excel in this role, you should possess excellent knowledge of Linux internals, different drivers, and standards like PCIe, Ethernet, and CXL. Expertise in the Software Development Life Cycle (SDLC), firmware BSP, device drivers, and strong technical problem-solving skills in areas like system boot, UEFI, and OS functionality are crucial. You should have software development skills in C, C++, and Python, along with strong low-level debugging capabilities. A successful candidate for this position should hold a BTech/MTech in Computers, Electronics, or Electrical Engineering and have around 5-12 years of experience in embedded software development across different architectures. Having a good understanding of different CPU architectures like IA, ARM, and RISC V, as well as the Pre-Silicon Development environment, will be advantageous in fulfilling the requirements of this role.,

You are an experienced Lead Generative AI Engineer responsible for training, optimizing, scaling, and deploying various generative AI models including large language models, voice/speech foundation models, vision, and multi-modal foundation models using cutting-edge techniques and frameworks. Your role involves architecting and implementing state-of-the-art neural architecture, robust training, and inference infrastructure to efficiently take complex models with billions of parameters to production while optimizing for low latency, high throughput, and cost efficiency. Your key responsibilities include: - Architecting and refining foundation model infrastructure to support optimized AI models deployment focusing on C/C++, CUDA, and kernel-level programming enhancements. - Implementing optimization techniques like quantization, distillation, sparsity, streaming, and caching for model performance enhancements. - Spearheading the development of Vision pipelines to ensure scalable training and inference workflows of billions of parameter foundation models. - Innovating for state-of-the-art architectures involving Panoptic Segmentation, Image Classification, and Image Generation. - Designing, developing, and innovating state-of-the-art large multimodal models. - Executing training and inference processes to minimize latency and maximize throughput utilizing GPU clusters and custom hardware. - Integrating and tailoring frameworks like PyTorch, TensorFlow, DeepSpeed, Lightening, FSDP, and Habana for fast model training and inference. - Enhancing post-deployment mechanisms with exhaustive testing, real-time monitoring, and robustness checks. - Driving continuous improvement initiatives for deployed models with automated pipelines for drift detection and performance degradation. - Leading the charge in model management including version control, reproducibility, and lineage tracking. - Cultivating a culture of high-performance computing and optimization within the AI/ML domain. Qualifications: - Ph.D. with 5+ years or MS with 8+ years of experience in ML Engineering, Data Science, or related fields. - Demonstrated expertise in high-performance computing with proficiency in Python, C/C++, CUDA, and kernel-level programming for AI applications. - Extensive experience in optimizing training and inference for large-scale AI models. - Understanding of Diffusion Models, Variational Autoencoders, Bayesian Modelling, and Reinforcement Learning is beneficial. - Experience in building billions of parameters generative AI foundation models. - Proven success in deploying optimized ML systems on a large scale using cloud infrastructures and GPU resources. - In-depth understanding and hands-on experience with advanced model optimization frameworks and MLOps tools. - Familiarity with contemporary MLOps frameworks and their application in production environments. - Strong grasp of state-of-the-art ML infrastructures, deployment strategies, and optimization methodologies. - Innovative problem-solving skills and collaborative mindset. - Exceptional communication and team collaboration skills.,

You will be responsible for leading the verification efforts for complex System on Chips (SoCs) and multi-chiplet System on Packages at Krutrim. This includes developing verification plans, testbench environments, and reusable verification IP. You will work on module, sub-systems, chiplets, and complex multi-chiplet testbench environments. Additionally, you will be involved in developing UVM and C/Python based testbench environments for functional, netlist, and power simulations. You will also contribute to developing reference models using System Verilog/SystemC/Python and improving verification flow and methodology. Debugging design units using simulation and formal tools and methodologies will be part of your responsibilities. Collaboration with Architects, Systems, and Software engineering teams on post-silicon debug in the lab is also expected. To qualify for this role, you should have a Bachelor's/Masters degree in Electronics Engineering and a minimum of 10 years of experience in verification of complex SoC designs. Proficiency in System Verilog, SVA, and UVM for code development is essential. Deep knowledge and experience of metric-driven verification methodology and flow are required. You should have extensive experience with various state-of-the-art simulation and formal tools, as well as expertise in verification of CPU/DPU/GPU based sub-systems. Experience with industry standard protocols such as CXL, PCIe, UCIe, and Ethernet protocols will be beneficial. Join Krutrim to be part of the team that is shaping the future of AI computing through cutting-edge silicon design.,

As a Linguist-AI Training & Evaluation at Krutrim (Ola), you will be responsible for curating high-quality datasets, evaluating language models, and fine-tuning performance using Reinforcement Learning from Human Feedback (RLHF). Your role will involve working on evaluating model outputs, DPO Data Set creation, performing comparative analysis, and benchmarking Krutrim's AI models against industry standards. The ideal candidate should possess native-level fluency in Kannada language with excellent command over English. Proficiency in multilingual linguistics is considered a plus. Additionally, a basic understanding of Natural Language Processing (NLP), machine learning models, and large language models (LLMs) is required. You should have proven experience in evaluating AI models, including benchmarking, fine-tuning, and model assessment. An attention to detail is crucial in identifying linguistic nuances, model errors, and biases in AI model outputs. An analytical mindset is also essential for performing quantitative and qualitative assessments of AI model performance, including the development of evaluation metrics. Being web savvy and tech-savvy is advantageous, as you will need good computer skills for managing large-scale data, Kannada typing, and using Microsoft Office suite, among other tasks. The qualifications required for this role include a minimum of a Bachelor's or Master's degree in Journalism, Literature, Linguistics, or a related field from a reputed Indian university. Additionally, 1 to 3 years of experience in translation, localization, content writing, NLP, or AI model evaluation is preferred. This is a full-time role based in Bangalore, with work from the office. Immediate joiners are preferred for this position at Krutrim (Ola).,

As a Principal Research Scientist focusing on AI Alignment at Ola Krutrim in Bangalore, India, you will lead the efforts in Trust and Safety, Interpretability, and Red Teaming within the AI division. Your role will be crucial in ensuring that the AI systems developed are safe, ethical, interpretable, and reliable, with a significant impact on millions of lives. You will be at the forefront of cutting-edge AI research, guiding the implementation of technologies that adhere to the highest standards of safety and transparency. Your responsibilities will include providing strategic leadership for the AI Alignment division, overseeing teams dedicated to Trust and Safety, Interpretability, and Red Teaming. You will work closely with the Lead AI Trust and Safety Research Scientist and Lead AI Interpretability Research Scientist to align goals and methodologies. Developing comprehensive strategies for AI alignment, integrating advanced safety and interpretability techniques, and establishing best practices for red teaming exercises to identify vulnerabilities will be key aspects of your role. Moreover, you will collaborate with product and research teams to implement safety and interpretability aspects throughout the AI development lifecycle. Staying updated on AI ethics, safety, and interpretability research, representing the company in industry events, and managing resource allocation and strategic planning for the AI Alignment division are also part of your responsibilities. Mentoring and developing team members, fostering innovation, and communicating progress and recommendations to executive leadership will be essential in this role. To qualify for this position, you should hold a Ph.D. in Computer Science, Machine Learning, or a related field with a focus on AI safety, ethics, and interpretability. With at least 7 years of experience in AI research and development, including 3 years in a leadership role, you should have expertise in AI safety, interpretability, and red teaming methodologies. Strong knowledge of advanced techniques such as Reinforcement Learning, Proximal Policy Optimization, and attention-based methods, along with experience in overseeing red teaming exercises for AI systems, are required. Your visionary mindset, along with excellent communication skills, project management abilities, and a proven track record in AI safety, ethics, and interpretability research, will be instrumental in shaping the future of responsible AI development at Ola Krutrim. By leading cross-functional initiatives and fostering a culture of continuous learning and innovation, you will contribute to building public trust in AI technologies and positioning the company as a leader in ethical and responsible AI development.,

As a Senior Distributed Training Research Engineer at Krutrim, you will play a crucial role in training frontier and foundation multimodal large language models. Your primary responsibility will be to develop various generative AI models, including large language models, voice/speech foundation models, and vision and multi-modal foundation models using cutting-edge techniques and frameworks. You will be hands-on in optimizing and implementing state-of-the-art neural architecture, robust training, and inference infrastructure to efficiently bring complex models with hundreds of billions and trillions of parameters to production, focusing on low latency, high throughput, and cost efficiency. Your key responsibilities will include designing and implementing highly scalable distributed training pipelines for LLMs and frontier models, utilizing model parallelism and data parallelism techniques. You will leverage your deep knowledge of CUDA, C++, and low-level optimizations to enhance model training speed and efficiency across diverse hardware configurations. Additionally, you will research and apply cutting-edge parallelism techniques to accelerate model training and reduce computational costs. Your expertise in deep learning frameworks such as PyTorch, TensorFlow, and JAX will be essential for tailoring them for distributed training scenarios and working with massive models to ensure stable and efficient training across distributed resources. You will design and conduct experiments to analyze the impact of model size, data, and computational resources on model performance and collaborate closely with research scientists and engineers to integrate research findings into production-ready training systems. To qualify for this role, you should hold a Ph.D. or Master's degree in Computer Science, Machine Learning, or a related field and have at least 5 years of experience in distributed training of large-scale deep learning models, preferably LLMs or similar models. You are expected to possess a strong theoretical and practical understanding of deep learning algorithms, architectures, and optimization techniques, along with extensive experience in various model and data parallelism techniques. Your expert-level knowledge of PyTorch, TensorFlow, or JAX, coupled with a proven track record of optimizing deep learning models for speed and efficiency using CUDA, C++, and other performance-enhancing tools, will be crucial. Familiarity with current research trends in large model training and the ability to apply new techniques to real-world problems will also be beneficial. Join Krutrim as we shape the future of AI and make a significant impact on hundreds of millions of lives across India and the world. If you are passionate about pushing the boundaries of AI and eager to work with a team at the forefront of innovation, we look forward to hearing from you!,

Job Title: Embedded Boot Firmware Architect Experience Level: 1215 years in Embedded Systems Development Role Overview We are seeking an accomplished Embedded Boot Firmware Architect with extensive experience in ARM-based bootloader development, secure boot architectures, and hardware bring-up. The candidate will define and drive the boot firmware strategy, ensuring secure, reliable, and optimized startup flows for complex SoCs and automotive-grade ECUs. This role requires strong collaboration across hardware, silicon, and software teams, with responsibility for setting requirements, defining architecture, and guiding implementation in line with functional safety, security, and performance standards. Key Responsibilities Architect, design, and optimize bootloader and BootROM firmware for ARM Cortex-M/R/A based platforms. Define requirements and specifications in collaboration with hardware, silicon, and cross-functional engineering teams. Lead development and maintenance of secure and measured boot mechanisms, ensuring compliance with ISO 26262, AUTOSAR, FIPS, and NIST standards. Implement Secure Boot, TrustZone configurations, fusing, and secure key management for hardware root-of-trust. Design and validate low-level hardware initialization (clocks, DDR, Flash, eMMC, NAND/NOR, PCIe) and bring-up flows. Debug and analyze hardware/firmware boot issues using JTAG, Lauterbach, oscilloscopes, and logic analyzers. Collaborate with silicon and board design teams to align hardware specs with firmware boot requirements. Define and integrate firmware update mechanisms (FOTA, A/B partitioning, rollback strategies, and recovery modes). Ensure robustness via code reviews, static analysis, unit/integration testing, and adherence to secure coding practices. Document bootloader architecture, hardware interaction flows, and provide integration support to stakeholders. Mentor engineers and guide architecture reviews. Required Skills & Qualifications 1215 years of experience in embedded firmware/bootloader development with deep expertise in ARMv8 architectures. Strong proficiency in C/C++ for embedded systems, with low-level debugging expertise. Hands-on experience with BootROM, Secure Boot, Measured Boot, PSA Attestation APIs, and Trusted Firmware-A/M (TF-A/TF-M). Strong understanding of hardware specs, silicon bring-up, MMU/MPU configuration, and secure execution environments. Familiarity with automotive protocols (CAN, LIN, FlexRay) and RTOS or bare-metal development. Exposure to PCIe, MCTP, PLDM, SPDM protocols is a strong plus. Proven ability to work across cross-functional teams (hardware, silicon, software, security). Knowledge of functional safety (ISO 26262) and platform security principles Excellent problem-solving skills in hardware/software co-debugging environments. Education Bachelors or Masters degree in Computer Engineering, Electrical/Electronics Engineering, or related field. Show more Show less

Job Title: System Software Architect Edge & ECU Systems Role Overview We are seeking a seasoned System Software Architect with 20+ years of experience in architecting and delivering edge computing platforms and Electronic Control Unit (ECU) software systems. This role is highly hands-on and spans the complete software stackfrom Firmware, BSP, OS, Virtualization, Middleware, to Applications. As a thought leader, you will bridge embedded/automotive ECU platforms with next-generation edge systems, ensuring scalable, reliable, and high-performance software for AI-driven edge, automotive, industrial automation, and real-time computing. You will influence silicon and hardware design, shape pre-silicon methodologies, and drive full-stack enablement with a strong focus on I/O subsystems, interconnects, memory, and power efficiency. Key Responsibilities Define and own end-to-end system software architecture across Edge and ECU platforms, aligned with product vision and roadmap. Architect scalable, modular, and reusable software frameworks spanning Firmware ? BSP ? OS ? Middleware ? Virtualization ? Applications. Drive hardware-software co-design, collaborating closely with silicon, hardware, and system engineering teams. Hands-on experience with ARM CPU Architecture for edge computing platforms, covering low-level software, multicore bring-up, and system performance optimization Lead the definition and development of pre-silicon/emulation-based enablement environments for complete software stack validation. Anticipate and solve system-level challenges involving I/O performance, latency, memory hierarchy, and power optimization. Architect and integrate automotive-grade ECU software frameworks, including AUTOSAR (Classic & Adaptive), functional safety, and in-vehicle communication stacks. Define debug methodologies and system-level KPIs for silicon bring-up, ECU validation, and I/O subsystem tuning. Provide architectural leadership on PCIe, Ethernet (including TSN), CAN, and high-speed interconnects. Partner with cross-functional teamsnetworking, storage, I/O subsystems, memory, and power validationto deliver robust solutions. Serve as a technical mentor and leader, guiding teams across multiple domains. Required Skills & Expertise System Software & OS: Deep expertise in Linux internals, kernel, drivers, real-time OS (RTOS), containers, and virtualization. ECU / Automotive Software: Strong knowledge of ECU architecture, AUTOSAR (Classic & Adaptive), I/O Subsystems: Proven experience in architecting and validating PCIe, Ethernet, CAN, USB, I2C, SPI, SMBus, and storage interfaces. Memory & Power Analysis: Strong background in memory subsystems (DDR, LPDDR, persistent memory), bandwidth/latency tuning, and power-performance tradeoff analysis. Hardware/Firmware Co-Design: Hands-on experience with silicon bring-up, BSP, low-level debugging, and cross-domain HW/SW validation. Performance & Reliability: Expertise in system tuning, power optimization, latency reduction, and ensuring high-reliability real-time performance. Programming Skills: Expert in C, C++, Python, with ability to set coding standards and perform system-level reviews. Leadership & Mentorship: Demonstrated ability to lead cross-functional technical teams and resolve complex I/O and system-level issues. Education & Experience B.Tech/M.Tech in Computer Engineering, Electronics, or related field. 20+ years of experience in system software architecture spanning ECU, embedded, and Edge platforms. Proven track record of delivering production-grade, safety-critical, and high-performance platforms in automotive and Edge ecosystems Show more Show less

Job Title: I/O Devices, IPC Software Architect We are seeking a Principal Engineer in I/O Device Drivers and System Software with 1215 years of hands-on experience in developing, debugging, and optimizing low-level drivers, high-performance inter-processor communication (IPC) frameworks, and storage/networking subsystems. This role requires deep knowledge of Linux kernel internals, IPC mechanisms, PCIe, Ethernet, CAN, SR-IOV virtualization, and storage interfaces, with strong expertise in automotive-grade and edge system software. The ideal candidate will provide technical leadership, work closely with cross-functional teams including silicon and hardware architects, and mentor junior engineers while driving end-to-end system solutions. Key Responsibilities Architect, design, and implement Linux kernel drivers and BSP components for I/O subsystems including PCIe, Ethernet, CAN, USB, and storage (NVMe, SAS/SATA, eMMC, UFS). Design, implement, and optimize high-throughput, low-latency IPC mechanisms (shared memory, mailbox, RPMsg, virtio, sockets) across heterogeneous compute subsystems (CPU, DSP, accelerators). Enable SR-IOV, virtualization, and multi-function device drivers for scalable and secure I/O virtualization. Architect cross-processor communication frameworks for real-time and safety-critical automotive/edge applications. Design and optimize I/O and storage drivers for deterministic performance, QoS, and real-time guarantees. Perform Linux kernel debugging (crash dumps, ftrace, perf, kgdb, stack traces) to resolve complex issues spanning firmware, kernel, and hardware. Drive silicon bring-up, IPC framework validation, and driverfirmware integration for I/O and compute subsystems. Work across silicon design, hardware, architecture, and system software teams to define IPC/I/O requirements, architect solutions, and ensure timely deliverables. Collaborate with automotive system architects, hardware, and silicon teams to ensure compliance with functional safety and reliability requirements. Mentor and guide junior engineers, conduct design/code reviews, and lead critical debug and system integration task forces. Contribute to Linux kernel community discussions and open-source integration in IPC, networking, storage, or PCIe domains. Required Skills & Experience 1215 years of embedded/Linux system software development with a focus on device drivers, IPC frameworks, and kernel subsystems. Expertise in: IPC frameworks: shared memory drivers, mailboxes, RPMsg, virtio, sockets, inter-VM communication. PCIe subsystem (enumeration, error handling, hot-plug, peer-to-peer, SR-IOV, ATS/PRI). Networking drivers: Ethernet, TSN (Time-Sensitive Networking) Automotive networking: CAN/CAN-FD, LIN, diagnostics (UDS/DoIP), AUTOSAR integration. Storage drivers: NVMe, eMMC. Strong knowledge of Linux kernel internals: interrupts, DMA engines, memory management, caching, synchronization primitives, and virtualization. Proficiency in C/C++ and scripting languages (Python, Shell) for automation and validation. Excellent Linux kernel debugging skills Familiar to functional safety and reliability standards (ISO 26262, ASIL levels). Proven ability to lead cross-functional teams (silicon, hardware, software, validation) and drive cross-layer debug strategies for IPC/I/O subsystems. Preferred Qualifications Hands-on experience with virtualization technologies (KVM, Xen, QEMU, SR-IOV device assignment). Experience with real-time operating systems (RTOS) and deterministic Linux (PREEMPT-RT). Familiarity with heterogeneous computing platforms (CPU + accelerators + VPU/DSP + storage offload). Education Bachelors or Masters degree in Computer Engineering, Electrical/Electronics Engineering, or related field. Show more Show less

Job Title: CPU Firmware Architect Role Overview We are seeking a highly skilled Core CPU Architect with 1215 years of experience in ARM-based CPU architecture, embedded firmware, and low-level system software. This role requires a hands-on technical leader with deep expertise in CPU microarchitecture, cache/memory subsystems, power-performance optimization, and Linux kernel integration. The ideal candidate will work at the intersection of CPU design and system software, driving innovations in core CPU, firmware/OS enablement, and performance tuning for next-generation SoCs used in automotive and edge computing platforms. Key Responsibilities Define and architect core CPU software interfaces (firmware, BSP, drivers) aligned with ARM CPU microarchitecture features. Design and implement low-level firmware and kernel components for CPU initialization, exception handling, MMU setup, coherency, and memory management. Collaborate with CPU design and silicon teams on pipeline features, caches, coherency protocols, branch prediction, and power states. Lead Linux kernel and RTOS integration for CPU subsystems, focusing on scheduling, memory, and power-aware optimizations. Drive CPU power management strategies: clock gating, DVFS, retention states, idle states, and adaptive scaling. Perform CPU and memory subsystem performance profiling using simulators, emulators, JTAG, and hardware trace/debug tools. Define system-level performance/power KPIs and lead tuning across CPU, firmware, kernel, and device drivers. Mentor engineers and guide architecture reviews, patents, and long-term CPU strategy. Partner with cross-functional teams to deliver high-performance CPU platforms. Required Skills & Experience CPU Architecture: Deep expertise in ARMv8/v9 architecture, exception levels, MMU, caches, coherency protocols, ISA extensions, and PMU. Firmware & Kernel: Strong hands-on experience in firmware, Linux kernel internals, RTOS, and device drivers. Performance & Power: Proven ability in CPU pipeline analysis, memory subsystem tuning, DVFS, cpuidle/cpufreq frameworks, and power-performance tradeoff analysis. Debug & Bring-up: Experience in CPU bring-up, silicon validation, trace analyzers, emulators, JTAG, and kernel tracing tools. Programming: Proficiency in C/C++ and assembly (ARM), with Python/Shell for automation. I/O & Interconnects: Familiarity with PCIe, Ethernet, IC, SPI, CAN, USB, and memory buses (DDR, LPDDR). Problem Solving: Strong ability to root-cause complex issues across CPU architecture, firmware, and OS layers. Preferred Qualifications Contributions to open-source CPU enablement (Linux kernel, toolchains, firmware frameworks). Background in automotive, mobile SoCs, or Edge computing platforms with strict latency and performance KPIs. Technical leadership in CPU/SoC co-design projects involving hardware, firmware, and OS integration. Education Bachelors or Masters degree in Computer Engineering, Electrical/Electronics Engineering, or related field. Show more Show less

Job Title: Trace and Debug Architect Experience Level: 1215 years in Embedded Systems / Silicon Firmware Role Overview We are seeking a highly skilled Trace and Debug Architect with deep hands-on expertise in silicon bring-up, low-level debugging, and advanced trace methodologies. The candidate will own the strategy and execution of trace, debug, and post-silicon validation flows for complex SoCs and automotive-grade ECUs. This role demands proficiency with JTAG, ETM, CoreSight, and industry-standard debug tools, as well as the ability to collaborate closely with silicon, hardware, and firmware teams to diagnose and resolve intricate system-level issues. Key Responsibilities Define and implement trace/debug strategies across SoC subsystems (CPU, GPU, ISP, PCIe, DDR, CAN, Ethernet, etc.). Lead silicon bring-up and low-level hardware/software co-debug activities using JTAG, SWD, and trace tools. Configure and utilize ARM CoreSight, ETM, STM, and trace infrastructure for runtime visibility and performance analysis. Drive debug methodology using Lauterbach, Segger, or equivalent emulators; oscilloscopes and logic analyzers for board-level analysis. Analyze crash dumps, core traces, and performance logs to root-cause issues spanning silicon, firmware, and board domains. Partner with silicon architects, verification, and board design teams to define trace/debug requirements early in the design cycle. Collaborate with firmware and driver teams to integrate trace hooks, debug registers, and diagnostics frameworks. Support post-silicon validation, performance tuning, and issue triaging across automotive and high-performance Compute platforms. Establish best practices, debug flows, and documentation for cross-functional teams and customer support. Provide mentorship to engineers on advanced debug methodologies and tool usage. Required Skills & Qualifications 1215 years of experience in embedded systems or silicon validation, with strong focus on trace and debug. Deep expertise in JTAG, SWD, CoreSight, ETM, STM, Trace32, Lauterbach, and related tools. Strong proficiency in C/C++ and scripting (Python/Perl) for debug automation and log analysis. Proven track record in silicon bring-up, post-silicon validation, and hardware-assisted debugging. Solid understanding of ARMv8 architectures, memory systems (DDR, Flash, PCIe), and SoC subsystems. Exposure to automotive standards (ISO 26262, AUTOSAR) and field debug flows. Familiarity with interconnect protocols (PCIe, MIPI, CAN, Ethernet) and performance monitoring units. Excellent problem-solving skills in cross-domain (hardware/software/system) debug environments. Ability to collaborate across silicon, hardware, software, and validation teams in a global setting. Education Bachelors or Masters degree in Computer Engineering, Electrical/Electronics Engineering, or related field. Show more Show less

As a Verification Lead at Krutrim, you will lead the verification efforts for complex System on Chips (SoCs) and multi-chiplet System on Packages. Your responsibilities will include developing verification plans, testbench environments, and reusable verification IP. You will work on module, sub-systems, chiplets, and complex multi-chiplet testbench environments. Additionally, you will contribute to developing UVM and C/Python based testbench environments for functional, netlist, and power simulations. Your role will also involve developing reference models using System Verilog/SystemC/Python and enhancing verification flow and methodology. Debugging design units using simulation and formal tools and methodologies will be a key part of your responsibilities. You will collaborate with Architects, Systems, and Software engineering teams on post-silicon debug in the lab. - Develop verification plans, testbench environments, and reusable verification IP for complex SoCs and multi-chiplet System on Packages. - Work on module, sub-systems, chiplets, and complex multi-chiplet testbench environments. - Develop UVM and C/Python based testbench environments for functional, netlist, and power simulations. - Contribute to developing reference models using System Verilog/SystemC/Python and improving verification flow and methodology. - Debug design units using simulation and formal tools and methodologies. - Collaborate with Architects, Systems, and Software engineering teams on post-silicon debug in the lab. Qualifications Required: - Bachelor's/Masters degree in Electronics Engineering. - Minimum of 10 years of experience in verification of complex SoC designs. - Proficiency in System Verilog, SVA, and UVM for code development. - Deep knowledge and experience of metric-driven verification methodology and flow. - Extensive experience with various state-of-the-art simulation and formal tools. - Expertise in verification of CPU/DPU/GPU based sub-systems. - Experience with industry standard protocols such as CXL, PCIe, UCIe, and Ethernet protocols.,

As a highly skilled and experienced Senior Research Lead for Speech, Audio, and Conversational AI at Krutrim, your role involves spearheading research and development in cutting-edge technologies related to speech processing, text-to-speech (TTS), audio analysis, and real-time conversational AI. Collaborating with a team of talented engineers and researchers, you will design, implement, and optimize state-of-the-art systems to enhance the quality of speech and audio solutions for various applications. Key Responsibilities: - Bring advanced Audio Language Models and Speech Language Models by leveraging the state of the art in Audio/Speech and Large Language Models. - Research, architect, and deploy new generative AI methods like autoregressive models, causal models, and diffusion models. - Develop low-latency end-to-end models using multilingual speech/audio as input and output. - Evaluate and enhance model performance focusing on accuracy, naturalness, efficiency, and real-time capabilities across multiple languages through experiments. - Remain updated with the latest advancements in speech processing, audio analysis, and large language models to incorporate new techniques into foundation models. - Collaborate with cross-functional teams to integrate these models into Krutrim's AI stack and products. - Publish research findings in esteemed conferences and journals such as INTERSPEECH, ICASSP, ICLR, ICML, NeurIPS, and IEEE/ACM Transactions on Audio, Speech, and Language Processing. - Mentor junior researchers and engineers to foster a collaborative and innovative team environment. - Drive the adoption of best practices in model development, including testing, documentation, and ethical considerations in multilingual AI. Qualifications: - Ph.D. with 5+ years or MS with 8+ years experience in Computer Science, Electrical Engineering, or related field focusing on speech processing, audio analysis, and machine learning. - Proficiency in training or finetuning speech/audio models for representation, generation, and multilingual multitask models. - Expertise with Audio Language Models like AudioPALM, Moshi, and Seamless M4T. - Demonstrated track record in developing novel neural network architectures such as Transformers, Mixture of Experts, Diffusion Models, and State Space Machines. - Extensive experience in optimizing models for low-latency, real-time applications. - Strong background in multilingual speech recognition and synthesis with an understanding of language-specific challenges. - Proficiency in deep learning frameworks like TensorFlow, PyTorch, and deploying large-scale speech and audio models. - Expertise in high-performance computing with proficiency in Python, C/C++, CUDA, and kernel-level programming for AI applications. - Experience with audio signal processing techniques and their application in end-to-end neural models. - Strong publication record in top AI conferences and journals, particularly focusing on speech, audio, and language models. - Excellent communication skills to convey complex technical concepts to technical and non-technical audiences.,