Trace and Debug Architect

Job Title: Trace and Debug Architect

Experience Level:

Role Overview

Trace and Debug Architect

Key Responsibilities

• Define and implement trace/debug strategies across SoC subsystems (CPU, GPU, ISP, PCIe, DDR, CAN, Ethernet, etc.).
• Lead silicon bring-up and low-level hardware/software co-debug activities using JTAG, SWD, and trace tools.
• Configure and utilize ARM CoreSight, ETM, STM, and trace infrastructure for runtime visibility and performance analysis.
• Drive debug methodology using Lauterbach, Segger, or equivalent emulators; oscilloscopes and logic analyzers for board-level analysis.
• Analyze crash dumps, core traces, and performance logs to root-cause issues spanning silicon, firmware, and board domains.
• Partner with silicon architects, verification, and board design teams to define trace/debug requirements early in the design cycle.
• Collaborate with firmware and driver teams to integrate trace hooks, debug registers, and diagnostics frameworks.
• Support post-silicon validation, performance tuning, and issue triaging across automotive and high-performance Compute platforms.
• Establish best practices, debug flows, and documentation for cross-functional teams and customer support.
• Provide mentorship to engineers on advanced debug methodologies and tool usage.

Required Skills & Qualifications

• 1215 years of experience in embedded systems or silicon validation, with strong focus on trace and debug.
• Deep expertise in JTAG, SWD, CoreSight, ETM, STM, Trace32, Lauterbach, and related tools.
• Strong proficiency in C/C++ and scripting (Python/Perl) for debug automation and log analysis.
• Proven track record in silicon bring-up, post-silicon validation, and hardware-assisted debugging.
• Solid understanding of ARMv8 architectures, memory systems (DDR, Flash, PCIe), and SoC subsystems.
• Exposure to automotive standards (ISO 26262, AUTOSAR) and field debug flows.
• Familiarity with interconnect protocols (PCIe, MIPI, CAN, Ethernet) and performance monitoring units.
• Excellent problem-solving skills in cross-domain (hardware/software/system) debug environments.
• Ability to collaborate across silicon, hardware, software, and validation teams in a global setting.

Education

• Bachelors or Masters degree in Computer Engineering, Electrical/Electronics Engineering, or related field.