Lead/Senior Engineer-Verification

You will be responsible for leading the verification efforts for complex System on Chips (SoCs) and multi-chiplet System on Packages at Krutrim. This includes developing verification plans, testbench environments, and reusable verification IP. You will work on module, sub-systems, chiplets, and complex multi-chiplet testbench environments. Additionally, you will be involved in developing UVM and C/Python based testbench environments for functional, netlist, and power simulations. You will also contribute to developing reference models using System Verilog/SystemC/Python and improving verification flow and methodology. Debugging design units using simulation and formal tools and methodologies will be part of your responsibilities. Collaboration with Architects, Systems, and Software engineering teams on post-silicon debug in the lab is also expected. To qualify for this role, you should have a Bachelor's/Masters degree in Electronics Engineering and a minimum of 10 years of experience in verification of complex SoC designs. Proficiency in System Verilog, SVA, and UVM for code development is essential. Deep knowledge and experience of metric-driven verification methodology and flow are required. You should have extensive experience with various state-of-the-art simulation and formal tools, as well as expertise in verification of CPU/DPU/GPU based sub-systems. Experience with industry standard protocols such as CXL, PCIe, UCIe, and Ethernet protocols will be beneficial. Join Krutrim to be part of the team that is shaping the future of AI computing through cutting-edge silicon design.,