20 Sva Jobs

Company Qualcomm India Private Limited Job Area Engineering Group, Engineering Group > Hardware Engineering General Summary As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to ...

As a Functional Verification Engineer, you will be responsible for verifying RTL designs using SystemVerilog and UVM. Your role involves developing testbenches, building reusable components, and ensuring complete functional coverage of IPs or SoC-level designs. Key Responsibilities: - Develop and maintain UVM-based testbenches for IP/subsystem/SoC verification - Create test plans from microarchitecture/design specifications - Write and debug directed and constrained-random tests - Implement functional coverage, assertions (SVA), and checkers - Run regressions using simulators like VCS, Xcelium, or Questa - Interface with RTL, DFT, and Firmware teams to track and resolve bugs - Analyze wavefo...

Job Details Job Description: Do Something Wonderful Intel put Silicon in Silicon Valley. No one else is obsessed with engineering and has a brighter future. Every day, we create world-changing technology that enriches the lives of every person on earth. So, if you have a big idea, let's do something wonderful together. Join us, because at Intel, we are building a better tomorrow. Who We Are The Data Center and AI (DCAI) delivers leadership Xeon products to cloud, data center and AI customers through development of industry leading IPs that enhances product performance and competitiveness in both Xeon and AI platforms. IP design group within DCAI designs Coherent Fabric IP, Memory controller,...

You will be part of a dynamic and motivated team, collaborating with Systems, Design, DFT, Mixed Signal, and other local/remote teams to address verification challenges related to IPs, SubSystems, and overall systems. Your role will involve utilizing advanced verification languages and methodologies to achieve first pass success of complex IPs. - Evaluate and implement evolving verification methodologies for handling complex IP/SubSystem designs within tight schedules - Ensure quality adherence throughout all project stages, analyzing existing processes and implementing improvements for Zero Defect IPs/SubSystems - Contribute to technological innovations for self and team development - Work ...

Minimum qualifications: Bachelor's degree in Electrical Engineering or equivalent practical experience. 1 year of experience with verification methodology such as Universal verification methodology (UVM). 1 year of experience in the verification of IP designs such as IP, SoC, vector CPUs, etc. Experience with SystemVerilog, SVA, and functional coverage. Preferred qualifications: Master's degree in Electrical Engineering or a related technical field. Experience with industry-standard simulators, revision control systems, and regression systems. Experience with the full verification life-cycle. Experience in Artificial Intelligence/Machine Learning (AI/ML) Accelerators or vector processing uni...

Over 10 years of digital IP verification, advanced knowledge of ASIC/SOC Design flow and state of the art verification flow Proficient with Verilog, System Verilog and UVM. Good in UVM concepts and SystemVerilog language. (SVA, UVM scoreboard) Good in defining and developing UVM based verification frameworks, testbenches, processes and flows. Good in working in Linux and Windows environments. Familiarity with power aware simulation and firmware/hardware co-verification is a plus. Familiarity with industry standard high-speed protocols such as USB, PCIE, UFS, SATA, Ethernet is a plus. Familiarity with industry standard interconnects such as AMBA (AXI, APB, AHB) is a plus.

As a Verification Lead at Krutrim, you will lead the verification efforts for complex System on Chips (SoCs) and multi-chiplet System on Packages. Your responsibilities will include developing verification plans, testbench environments, and reusable verification IP. You will work on module, sub-systems, chiplets, and complex multi-chiplet testbench environments. Additionally, you will contribute to developing UVM and C/Python based testbench environments for functional, netlist, and power simulations. Your role will also involve developing reference models using System Verilog/SystemC/Python and enhancing verification flow and methodology. Debugging design units using simulation and formal t...

Senior Formal Verification Engineer (CPU) Experience : 8+ years Location : Bangalore Role Overview: Owns property-based formal verification of the CPU core, pipeline stages, and subcomponents with exhaustive proof goals. Key Responsibilities: Lead formal planning and methodology for control logic, pipelines, and memory subsystems Define safety and liveness properties, model check for corner case behavior Guide designers in writing formal-friendly RTL and assertions Analyze convergence issues, coverage gaps, and create abstraction models Integrate formal sign-off into project milestones Required Skills: 8+ years of formal verification experience with CPUs or processors Strong with JasperGold,...

About Iravan Iravan Technologies, headquartered in Pune, is a semiconductor design services company specializing in Mixed-Signal, Digital, and Formal Verification. We partner with leading companies across Storage, Networking, Aerospace, Automotive, Defense, and other critical industries to deliver advanced semiconductor solutions. Designation : Formal Verification Engineer Experience: 4+ Relevant in FV Location: BLR/Pune Vacancies :02 JD Experience with Formal Verification (e.g., sequential equivalence checking, Security Path verification, connectivity, low power and Formal property verification). Experience with programming languages (e.g., Python/Perl and TCL). Experience with at least one...

Are you looking for a unique opportunity to be a part of something great Want to join a 20,000-member team that works on the technology that powers the world around us Looking for an atmosphere of trust, empowerment, respect, diversity, and communication How about an opportunity to own a piece of a multi-billion dollar (with a B!) global organization We offer all that and more at Microchip Technology, Inc. People come to work at Microchip because we help design the technology that runs the world. They stay because our culture supports their growth and stability. They are challenged and driven by an incredible array of products and solutions with unlimited career potential. Microchip's nation...

Job Overview: We are seeking a highly skilled and motivated Design Verification Lead to join our advanced VLSI design team. The ideal candidate will have strong expertise in SystemVerilog, UVM (Universal Verification Methodology), and verification of industry-standard protocols (e.g., PCIe, USB, Ethernet, DDR, etc.). As the Design Verification Lead, you will lead the verification of complex SoC and IP designs, mentor verification engineers, and collaborate closely with design, architecture, and validation teams to deliver high-quality, robust products. Key Responsibilities: Lead the design verification efforts for complex SoC/IP projects following best practices. Develop and maintain verific...

As a DFT Verification Engineer, your role involves developing and executing pre-silicon verification test plans for DFT features of the chip. This includes verifying DFT design blocks and subsystems using complex SV or C++ verification environments. You will also be responsible for building test bench components, composing tests, assertions, checkers, and validation vectors to ensure verification completeness. Additionally, debugging regression test failures and addressing areas of concern to meet design quality objectives are key responsibilities. Key Responsibilities: - Develop and execute pre-silicon verification test plans for DFT features of the chip - Verify DFT design blocks and subsy...

Wipro Limited is a leading technology services and consulting company dedicated to developing innovative solutions that cater to the most intricate digital transformation needs of clients. With a vast portfolio of capabilities in consulting, design, engineering, and operations, Wipro assists clients in achieving their most ambitious goals and establishing future-ready, sustainable businesses. The company, with over 230,000 employees and business partners operating in 65 countries, is committed to aiding customers, colleagues, and communities in thriving amidst a constantly changing world. For more information, visit www.wipro.com. As a Lead Design Verification Engineer with at least 7 years ...

The position is with one of our IDM client. As a Functional Verification Engineer, you will be responsible for verifying RTL designs using SystemVerilog and UVM. You will develop testbenches, build reusable components, and ensure complete functional coverage of IPs or SoC-level designs. Key Responsibilities: - Develop and maintain UVM-based testbenches for IP/subsystem/SoC verification - Create test plans from microarchitecture/design specifications - Write and debug directed and constrained-random tests - Implement functional coverage, assertions (SVA), and checkers - Run regressions using simulators like VCS, Xcelium, or Questa - Interface with RTL, DFT, and Firmware teams to track and res...

Lead Design Verification Engineer Bangalore We are looking for an experienced Lead Design Verification Engineer (412 yrs) to join our semiconductor team. Youll lead SoC/ASIC/IP verification using SystemVerilog, UVM, SVA, and drive test planning, coverage, regressions, and debug. ???? Must-have: Strong expertise in protocols (PCIe, DDR, USB, AMBA, MIPI, CXL), EDA tools (VCS, Xcelium, Questa), scripting (Python/Perl/Tcl), and low-power/CDC/formal verification. ???? Bonus: Experience with emulation/GLS, lint, DFT awareness, and leadership/mentoring. ???? Location: Bangalore, India ? Experience: 412 years ???? Apply now or share your profile at [HIDDEN TEXT] Show more Show less

About the Role: We are seeking a highly experienced Verification Engineer to join our dynamic team, driving innovation in advanced verification methodologies for complex semiconductor designs. You will play a key role in architecting, developing, and deploying verification methodologies for industry-leading IPs and sub-systems. Key Responsibilities: Lead the deployment of verification tools, platforms, and strategies for complex IPs Drive simulation-based and hardware-assisted verification efforts, including debugging and root cause analysis Apply expertise in a broad range of verification technologies, including simulation, static, and formal verification Develop and enhance verification me...

You will be responsible for leading the verification efforts for complex System on Chips (SoCs) and multi-chiplet System on Packages at Krutrim. This includes developing verification plans, testbench environments, and reusable verification IP. You will work on module, sub-systems, chiplets, and complex multi-chiplet testbench environments. Additionally, you will be involved in developing UVM and C/Python based testbench environments for functional, netlist, and power simulations. You will also contribute to developing reference models using System Verilog/SystemC/Python and improving verification flow and methodology. Debugging design units using simulation and formal tools and methodologies...

Own and develop UVM-based testbench environments for IP/SoC verification Design verification architecture, testplans, and SVA based on protocol specifications (PCIe, CXL, UCIe, AXI, etc.) Drive all aspects of the verification lifecycle including testbench creation, coverage closure, and debugging Collaborate with RTL design teams to resolve issues and close functional coverage Conduct peer reviews to maintain high testbench code quality Contribute technical papers and patent ideas on testbench innovations and verification methodologies Work closely with global teams and ensure timely project execution The Impact You Will Have: Deliver reliable and robust verification solutions that ensure hi...

BS or MS degree in Computer Science, Electrical or Electronics Engineering, or Related Field with 8+ years of experience in the following areas: Own UVM based testbench environment and developed UVM testbench architecture, Testplan and SVA for an IP Knowledge of one or more of protocols/standards: PCIe, CXL, UCIe, AMBA (AXI, APB, AHB) etc Good knowledge of System Verilog Hands-on experience with coverage closure and writing SVA for IP/SOC Good simulation debugging skills Experience with Perforce or similar revision control environment Experience with Python/TCL or any scripting knowledge is an added advantage Job Responsibilities include - Understand Standard Specifications, create testplan ...

We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content Join us to transform the future through continuous technological innovation, You Are: You are an experienced and motivated professional with a passion for solving challenging technical problems in the verification domain You are open to continuous learning and thrive on working with cutting-edge technologies You possess excellent communication skills and enjoy collaborating with domain experts across global locations You have a strong foundation in digital design, HDLs, and System Verilog, and you are proficient in using verification technologies Your atten...