409 Power Management Jobs - Page 2

General Summary: Job Summary: We are seeking a highly motivated and skilled Performance and Power Analysis Engineer to join our Display Systems team in Bengaluru. In this critical role, you will be responsible for the analysis, modeling, and optimization of performance and power consumption across various stages of our cutting-edge chip development process. You will take the lead and collaborate closely with architecture, design, Software and verification teams to ensure our products meet stringent performance targets and power efficiency requirements. As an independent collaborator, contribute with cross functional teams, SoC performance and SW/HW teams to enhance or optimize the process. This is an exciting opportunity to contribute to the development of next-generation semiconductor technology. Responsibilities: Develop and maintain architectural-level and/or cycle-accurate models for performance and power estimation. Analyze trade-offs between performance, power, and area (PPA) at the architecture and microarchitecture levels. Drive performance and power analysis early in the design cycle to influence architecture and design decisions. Collaborate with architecture and design teams to explore and evaluate different design options and trade-offs to optimize performance and power. Conduct detailed analysis to identify performance bottlenecks and power inefficiencies in chip architectures and microarchitectures. Perform power profiling and characterization of designs under various operating conditions and workloads. Develop and implement power reduction techniques at different design stages (e.g., clock gating, power gating, voltage scaling). Analyze and debug performance and power-related issues during simulation, emulation, and silicon bring-up. Generate comprehensive reports and presentations summarizing analysis results and providing actionable recommendations to the design teams, cross-functional teams and senior leadership. Stay abreast of the latest industry trends, tools, and methodologies in performance and power analysis. Contribute to the development and improvement of internal tools and flows for performance and power analysis. Collaborate with verification teams to define and execute performance and power validation plans. Validate model accuracy through correlation with RTL simulations, emulation, and silicon measurements. Minimum Qualifications: Bachelor's degree in Engineering, Information Systems, Computer Science, or related field and 3+ years of Systems Engineering or related work experience. ORMaster's degree in Engineering, Information Systems, Computer Science, or related field and 2+ years of Systems Engineering or related work experience. ORPhD in Engineering, Information Systems, Computer Science, or related field and 1+ year of Systems Engineering or related work experience. Qualifications: Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field. 5 to 8+ years of experience in performance and power analysis for ASIC or SoC designs. Strong understanding of computer architecture, microarchitecture, and digital design principles. Strong experience in developing and utilizing performance and power models using languages such as SystemC, Python, C++, or custom in-house frameworks. Proficiency in using industry-standard performance and power analysis tools (e.g., Synopsys PrimeTime PX) Solid understanding of power management techniques and low-power design methodologies. Experience with simulation and emulation environments. Strong analytical and problem-solving skills with the ability to interpret complex data and draw meaningful conclusions. Excellent communication and interpersonal skills with the ability to collaborate effectively with cross-functional teams. Familiarity with silicon bring-up and post-silicon power/performance characterization is a plus. Experience with machine learning techniques for power/performance prediction is a plus. Experience with IOS and Xcode profiling/development is a plus

General Summary: As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. ORMaster's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. ORPhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. 2+ years hands-on experience of different PnR steps including Floorplanning, Power planning, Placement & Optimization, CTS, Routing, Static timing analysis, Post route optimization, ECO implementation and DRC closure Well versed with high frequency design & advanced tech node implementations In depth understanding of PG-Grid optimization, including identification of high vs low current density paths & layer/via optimization, Adaptive PDN experience In depth knowledge of custom clock tree including H-tree, SPINE, Multi-point CTS, Clock metrics optimization through tuning of CTS implementation. Well versed with tackling high placement density/congestion bottlenecks In depth knowledge of PnR tool knobs/recipes for PPA optimization Experience in automation using Perl/Python and tcl Good communication skills and ability & desire to work in a cross-site cross-functional team environment.

Qualcomm India Private Limited is seeking a Hardware Engineer to join their Engineering Group, specifically focusing on Hardware Engineering. As a Hardware Engineer at Qualcomm, you will be at the forefront of technology innovation, contributing to the development of cutting-edge products that drive digital transformation and create a smarter, connected future. Your responsibilities will include planning, designing, optimizing, verifying, and testing electronic systems, circuits, mechanical systems, and various other hardware components to ensure the successful launch of world-class products. To qualify for this role, you must have a Bachelor's degree, Master's degree, or PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or a related field, along with several years of experience in Hardware Engineering. You should possess a strong background in RTL Design and Hardware Engineering, with expertise in RTL design tools such as Verilog, VHDL, and System Verilog. Additionally, familiarity with synthesis, formal verification, scripting languages (Pearl/Python/TCL), and debugging capabilities at simulation and Silicon environments is required. As a Hardware Engineer at Qualcomm, you will work collaboratively with cross-functional teams to research, design, and implement performance and power management strategies for product development. Your responsibilities will also involve designing low power/power management controller IP blocks, collaborating with technology/circuit design and verification/physical design teams, and integrating low power solutions into wireless SoC chips. Qualcomm is an equal opportunity employer and is committed to providing accommodations for individuals with disabilities throughout the application and hiring process. If you require accommodations, you can reach out to Qualcomm via email at disability-accommodations@qualcomm.com or by phone. Additionally, Qualcomm expects its employees to adhere to all applicable policies and procedures, including the protection of confidential information. Please note that Qualcomm does not accept unsolicited resumes or applications from staffing and recruiting agencies. If you have any inquiries about this Hardware Engineer role, you can contact Qualcomm Careers for more information.,

In this position you will be integrated in our Foundry IP Development team in Bangalore. In close collaboration with other disciplines across our worldwide engineering teams you will be developing layout for Std cell IP which enable our customers to perform product designs at highest quality standards based on Globalfoundries advanced process nodes. Job Responsibilities The development of product grade Standard Cell IP covering the following phases: Layout Design of Standard Cell IPs Layout checks like LVS, DRC, DFM, EMIR Review of Layouts and extend help for other Layout teams Design Kit prep from layout side, verification and validation Layout automation and script support Being a good team player, taking key initiatives for productivity improvements and innovation Sign off and release into dedicated IP validation test chips Specification and documentation Support of silicon bring up and characterization Required Qualifications: Bachelor s degree with 10+ years or master s degree with 8+ years experience in semiconductors / Microelectronics / VLSI engineering. Practical experiences in Standard Cell layout design in one or several of the following areas: Layout design and optimization of Combinational and Sequential Cells for various drive strengths and topology options. Layout design of Power Management Kit cells like Level Shifter, Power Gating, Isolation and Always-on Cells. Layout Architecture design for Ultra High Density and High-Performance Libraries. Layout design of custom cells to meet specific low power or high-speed design requirements. Proficient in handling EDA tools from Synopsis, Mentor and Cadence used for layout design like schematic/layout editor, parasitic extraction tools, DRC, LVS, DFM, EMIR, etc. Basic understanding of fabrication steps and flow. Experience in Testchip integration and analysis will be an added advantage. Preferred Qualifications: Good knowledge of CMOS technology Hands-on knowledge of state-of-the-art standard cell layout flows Programming experience applicable to design flow automation tasks The ability to work within a very dynamic interdisciplinary environment as well as dedicated knowledge of 45/32/28nm and below technology nodes are an advantage. You are flexible, highly motivated and have a team-oriented working style. You have shown the ability to communicate as well as work efficiently in an international multi-disciplinary environment. Strong written and verbal communication skills in English are a must.

The development of product grade Standard Cell IP covering the following phases: Layout Design of Standard Cell IPs Layout checks like LVS, DRC, DFM, EMIR Review of Layouts and extend help for other Layout teams Design Kit prep from layout side, verification and validation Layout automation and script support Being a good team player, taking key initiatives for productivity improvements and innovation Sign off and release into dedicated IP validation test chips Specification and documentation Support of silicon bring up and characterization Required Qualifications: Bachelor s degree with 10+ years or master s degree with 8+ years experience in semiconductors / Microelectronics / VLSI engineering. Practical experiences in Standard Cell layout design in one or several of the following areas: Layout design and optimization of Combinational and Sequential Cells for various drive strengths and topology options. Layout design of Power Management Kit cells like Level Shifter, Power Gating, Isolation and Always-on Cells. Layout Architecture design for Ultra High Density and High-Performance Libraries. Layout design of custom cells to meet specific low power or high-speed design requirements. Proficient in handling EDA tools from Synopsis, Mentor and Cadence used for layout design like schematic/layout editor, parasitic extraction tools, DRC, LVS, DFM, EMIR, etc. Basic understanding of fabrication steps and flow. Experience in Testchip integration and analysis will be an added advantage.

General Summary: As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. ORMaster's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. ORPhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. 5+ years hands-on experience of different PnR steps including Floorplanning, Power planning, Placement & Optimization, CTS, Routing, Static timing analysis, Post route optimization, ECO implementation and DRC closure Well versed with high frequency design & advanced tech node implementations In depth understanding of PG-Grid optimization, including identification of high vs low current density paths & layer/via optimization, Adaptive PDN experience In depth knowledge of custom clock tree including H-tree, SPINE, Multi-point CTS, Clock metrics optimization through tuning of CTS implementation. Well versed with tackling high placement density/congestion bottlenecks In depth knowledge of PnR tool knobs/recipes for PPA optimization Experience in automation using Perl/Python and tcl Good communication skills and ability & desire to work in a cross-site cross-functional team environment.

General Summary: As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. ORMaster's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. ORPhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. 8+ years RTL Design/Hardware Engineering experience or related work experience. Strong Domain Knowledge on RTL design(Verilog/VHDL/System Verilog) , implementation, and integration, micro-architecture & designing cores and ASICs Familiar with the Synthesis, Formal Verification, Linting, CDC, Low Power, UPFs, etc Exposure in scripting (Pearl/Python/TCL) Strong debugging capabilities at simulation, emulation, and Silicon environments Collaborate closely with cross-functional teams to research, design and implement performance and power management strategy for product roadmap Knowledge on Designing low power/power management controller IP blocks including AVS (adaptive voltage scaling), ACD (adaptive clock distribution), on-chip sensor controller Work closely with technology/circuit design team to close IP block specification/requirement. Work closely with verification/physical design team to complete the IP design implementation Support SoC team to integrate low power / power management IP solution into wireless SoC chips and front-end design flows Work closely with system/software/test team to enable the low power feature in SoC products

General Summary: As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. ORMaster's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. ORPhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. 8+ years RTL Design/Hardware Engineering experience or related work experience. Strong Domain Knowledge on RTL design(Verilog/VHDL/System Verilog) , implementation, and integration, micro-architecture & designing cores and ASICs Familiar with the Synthesis, Formal Verification, Linting, CDC, Low Power, UPFs, etc Exposure in scripting (Pearl/Python/TCL) Strong debugging capabilities at simulation, emulation, and Silicon environments Collaborate closely with cross-functional teams to research, design and implement performance and power management strategy for product roadmap Knowledge on Designing low power/power management controller IP blocks including AVS (adaptive voltage scaling), ACD (adaptive clock distribution), on-chip sensor controller Work closely with technology/circuit design team to close IP block specification/requirement. Work closely with verification/physical design team to complete the IP design implementation Support SoC team to integrate low power / power management IP solution into wireless SoC chips and front-end design flows Work closely with system/software/test team to enable the low power feature in SoC products

General Summary: The ideal candidate needs to have: Strong Embedded system knowledge, Experience on Windows Internals and good driver development. Solid understanding of Operating System concepts, RTOS, FW management. Solid understanding of System level features, Processor and Power management, architecting system level features. Hands on experience in complex and multi domain large features. Windows kernel driver developmen t experience. Understanding and experience in Designing and Implementing Windows Kernel mode drivers, Board support package, ACPI & UEFI. Strong communication and interpersonal skills. Strong problem solving and debugging skills. Ability to co-ordinate across stakeholders and Task management Handling small to large medium size technology teams. Experience on Enterprise and IHV/IBVs is a plus Minimum Qualifications: Bachelor's degree in Engineering, Information Systems, Computer Science, or related field and 15+ years of Software Engineering or related work experience. OR Master's degree in Engineering, Information Systems, Computer Science, or related field and 13+ years of Software Engineering or related work experience. OR PhD in Engineering, Information Systems, Computer Science, or related field and 13+ years of Software Engineering or related work experience. 10-15 years of work experience with Design and development of Windows drivers, programing languages such as C, C++, hands on experience in debugging system issues and Preferred Qualifications: 10- 15 years of Software Engineering or related work experience. Architecting System level features. Design and development of complex large features Hands on experience in low level design, code review and delivery management. Strong knowledge on Windows OS internals and Windows Driver knowledge (KMDF) Windows Device driver programming and debugging with WinDbg, JTAG/other tools. ARM Processor architecture and Assembly Language. Experience with PC software - System BIOS, UEFI, ACPI, Drivers, Applications Embedded OS (Kernel architecture, OS services heap, memory, multi-core, multi-threading, and crash debugging). Knowledge of OS/system performance profiling and optimization techniques. Communication, written & interpersonal skills, motivation, the ability to learn quickly. Minimum Qualifications: Bachelor's degree in Engineering, Information Systems, Computer Science, or related field and 4+ years of Software Engineering or related work experience. ORMaster's degree in Engineering, Information Systems, Computer Science, or related field and 3+ years of Software Engineering or related work experience. ORPhD in Engineering, Information Systems, Computer Science, or related field and 2+ years of Software Engineering or related work experience. 2+ years of work experience with Programming Language such as C, C++, Java, Python, etc.

Systems engineering is a cross-functional engineering discipline centered on an approach, mindset, and process. All activities that consider both the business and the technical needs of the customers with the goal of providing a quality product that meets the user's needs. Lead system engineer is responsible for Design engineering and coordination/key technical interface to customer and vendors in execution of EMS/Sub-station automation/Marine/O&G/Power Projects in time, quality and budget. Lead System engineer will also closely work with service organization to ensure that new developments are aligned with business strategy and are compliant with latest regulation and standards. Essential Responsibilities : Basic and Detailed engineering for EMS/SAS based projects and solutions. Experience on Microgrid/BESS based projects and solution will be an added advantage. Knowledge and experience on complex network topologies, switch configuration, Routers, etc. Knowledge on configuration of Network protocols such as RSTP, PRP, MRP and SNMP Knowledge on Integration, configuration, simulation, and analysis of substation communication protocols such as IEC 61850(MMS/GOOSE), IEC 60870-5-101,104, DNP3.0, Profinet, OPCUA, OPCDA and Modbus. Knowledge on Time synchronization (NTP, PTP) Knowledge and experience on simulation tools like DTM, IED scout, Test suite pro, Modsim. Knowledge and experience in network analyzing/Network storm testing tools PLC Programming with Function blocks, Structure Text and Sequential flow chart for Power Management Applications Proficient in preparing SLD, Schematics, Network Architecture, BOM and reports. Knowledge in PLM is preferable. Knowledge on programming (Python , Embedded C , Any C# ) is preferred. Knowledge and experience on Electrical Power Management System (EPMS), Generator Management system (GMS), Load Sharing and Load shedding priorities is preferred. Knowledge on cybersecurity is preferred. Support the Business Verticals in creating and reviewing (in conjunction with the leadership team) systems solutions as part of the OTR process, ensuring that solutions are technically fit for purpose and that technical risk is understood and managed with contingencies identified. Lead project execution - Analyze customer's contract, prepare specifications to vendors and internal stake holders Prepare technical documentation as per contractual requirements, vendor documentation review Identify technical risks and put in place the mitigation plan Review solutions developed and identify opportunities for improvement of process, system, or equipment Ensure strict compliance with all company and customers EHS policies and procedures Identify and propose improvements in processes, tools, system solutions and technologies, rolling out improvements when agreed with leadership team. Foster relationship with other GE business entities to maximize the benefits of synergies. Liaise with Platform Engineering, Technology and Value Engineering, and Supply Chain as appropriate to support the project and the business. Liaise with other GE businesses, platform verticals, supply chain, sub-contractors and suppliers as appropriate to support the project and the business Drive lean mind set to provide optimum technical solutions for the projects. Comply with all company and customer health and safety regulations. Qualifications/Requirements : Degree level in Electrical engineering from reputed College/University. 10+ years of experience in Communication protocols, Networks, Protection relays, Controls in EMS / SAS Experience in capturing requirements and writing technical specifications Understanding of communication protocols (TCP socket and Serial communications, Knowledge of DNP3, IEC 61850 and IEC 60870-5-101 (IEC 101) protocols would be beneficial Knowledge of design principles and have the capability to write clear documentation Flexible, adaptable and enthusiastic approach, good great team mate and an effective communicator Previous experience in a similar or related role. Desired Characteristics : Strong oral and written communication skills, interpersonal skills Able to interface effectively with all levels of organization and external customers. Displays good interpersonal skills is accessible and approachable. Anticipates customer needs and ensures they are met Willingness to learn with passion Self-motivated, creative and a team player, with ability to come up with unique solutions to complex problems Capable of working with multi-disciplined international team with good personal organization skills. Ability to multi-task on a variety of projects to strict time scales Quickly identify best practices and apply them within the team Strong prioritizing and time management skills Willing to travel on short notice within base country and overseas for short/long term assignments Willing to work extended hours during the week, at weekends/holidays at critical times. Additional Information Relocation Assistance Provided: No

Qualcomm India Private Limited is seeking a highly experienced individual in the field of Engineering Group > Software Engineering to join their team. As a candidate, you should possess a Bachelor's or Master's degree in Engineering with a minimum of 14 to 18 years of experience in the following areas: - Hands-on experience in BSP and driver development on any RTOS. - Proficiency in Autosar software architecture and development. - Detailed understanding of SoC hardware blocks including Clocks Controllers, DCC, GPIO, Interrupt Controllers (GIC), Peripherals (SPI/I2C/PCIE/CAN/Ethernet/USB/UFS), and power management. - Expertise in safety architecture, device drivers, and memory management. - Working knowledge of ISO26262/functional safety standards. - Exposure to additional technologies like Multiprocessor Architecture, ARM processors, caching, interrupts, and virtualization technologies across CPU and MM hardware accelerators will be considered a plus. The ideal candidate should hold a Bachelor's degree in Engineering, Information Systems, Computer Science, or related field with a minimum of 6+ years of Software Engineering experience. Alternatively, a Master's degree with 5+ years of experience or a PhD with 4+ years of experience in the same field will also be considered. Additionally, a minimum of 3+ years of work experience with Programming Languages such as C, C++, Java, Python, etc., is required. Qualcomm is an equal opportunity employer and is committed to providing accessible accommodations for individuals with disabilities throughout the application and hiring process. If you require accommodations, please contact disability-accommodations@qualcomm.com or Qualcomm's toll-free number for assistance. Employees at Qualcomm are expected to comply with all applicable policies and procedures, including security protocols, to safeguard the company's confidential and proprietary information within the permissible limits of the law. Please note that Qualcomm's Careers Site is exclusively for individual job seekers, and submissions from staffing or recruiting agencies will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. For further information about this role, please reach out to Qualcomm Careers. 3072480,

Qualcomm India Private Limited is seeking a CPU Silicon Bring up and Validation Engineer to join the CPU Silicon Bringup Team within the CPU team. As part of this team, you will play a key role in preparing for and supporting the bring up of every SoC using Custom CPUs - from the initial Silicon stage through to productization. Your responsibilities will include collaborating with CPU design and verification teams to develop CPU bring up and validation test plans, preparing for CPU bring up through pre-work on emulation and FPGA platforms, working closely with SOC bring up teams and software teams to plan CPU bring up, and triaging and debugging failures on Silicon. Additionally, you will be responsible for developing test contents and testing strategies to assist in the validation of CPU on silicon, reproducing silicon fails on emulators and FPGAs, suggesting and architecting new debug features with the design team to improve future CPU bringups. The minimum requirements for this role include a BA/BS degree in CS/EE with at least 5 years of experience, 3+ years of experience in Silicon Validation and bring up, implementation of assembly, C/C++ language embedded firmware, and experience with software tool chain including assemblers, C compilers, Makefiles, and source code control tools. Preferred qualifications include a strong understanding of micro-processor architecture, power management, physical design concepts, experience in Silicon bring up and validation of CPU features, debug of functional, power, performance, and/or physical design issues in silicon, CPU design and verification experience, test development for validation of CPU features on Silicon, and development of test vectors for tester bring up. Candidates must have a Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field with 3+ years of Hardware Engineering or related work experience, or a Master's degree with 2+ years of experience, or a PhD with 1+ year of experience. Qualcomm is an equal opportunity employer committed to providing an accessible process for individuals with disabilities. For more information about the role, please contact Qualcomm Careers.,

You are an experienced Sr. Project Manager (Electronics) with a strong technical background in hardware and software development. You should be proficient in onsite deployment, troubleshooting, and maintenance of embedded systems for real-world applications. Your key responsibilities will include overseeing the installation, commissioning, and maintenance of embedded systems at client sites. You will be responsible for hardware debugging, circuit testing, and firmware updates for embedded products. Your work will involve microcontrollers (ARM, PIC, STM32, ESP, etc.), sensors, actuators, and IoT devices. You will develop and modify firmware in C, C++, Python, and RTOS for embedded applications. Additionally, you will troubleshoot hardware and software issues related to PCBs, power systems, and communication protocols like UART, SPI, I2C, CAN, MODBUS, MQTT, etc. Ensuring proper integration and testing of embedded systems with cloud platforms and mobile applications will also be part of your role. Collaboration with R&D and software teams to enhance system performance and optimize designs is essential. You will also maintain technical documentation, reports, and compliance standards for project installations and provide technical training and support to clients and junior engineers. You should have a minimum of 3 years of experience in embedded systems development and onsite engineering. A strong understanding of PCB design, circuit analysis, and power management is required. Hands-on experience with embedded Linux, IoT protocols, and cloud integration is necessary. Proficiency in debugging tools such as oscilloscopes, logic analyzers, and multimeters is essential. Knowledge of networking protocols like TCP/IP, Wi-Fi, Bluetooth, LoRa, Zigbee is advantageous. Excellent problem-solving skills and the ability to work in dynamic field environments are crucial. Strong communication and project management skills are also necessary. Willingness to travel and work at client locations as required is expected. A Bachelor's or Master's degree in Electronics, Electrical, Embedded Systems, or a related field is preferred. Experience with AI/ML applications in embedded systems is a plus. If you are passionate about embedded technology and thrive in a hands-on environment, we welcome you to join our team! This is a full-time position with benefits including health insurance and provident fund. Education: Bachelor's degree preferred Experience: Minimum of 3 years of total work experience required Work Location: In person,

Responsibilities As a creative design engineer with a knowledge of subsystems and SoCs you will be part team developing Subsystems & SoCs. You will work with Architects to capture the requirements and develop Micro-architecture specifications for one or more SOC areas such as Power Management, Boot, Debug, Clocks, Resets, DDR, RAS, Security, Access Control, Die to Die etc. Key responsibilities will include writing micro-architecture and work with Design team to deliver high quality RTL. Collaborate with verification and Validation team to review test plans, and help debug design issues. Closely work with the Power and Performance analysis team to evaluate and improve Subsystem/SOC PPA. Contribute to developing and improving the design methodologies. Guide and support other members of the team for overall Program success. Balance other opportunities such as working with Project Management on activities, plans, and schedules Required Skills and Experience: Bachelors or Master s degree or equivalent experience in Electronics/Electrical Engineering. Experience of 8+ years working in design of complex compute subsystems or SoCs Expertise in developing Micro-architecture and Design specifications for the SoC Infrastructure areas such as Power Management, Boot, Debug, Clocks, Resets, DDR, RAS, Security, Access Control, Die to Die etc. Solid understanding of digital hardware design and Verilog HDL. Experience in development and Tapeout of Complex SoC and RTL Development. Experience leading and developing RTL for Subsystems or SoCs. Conversant with Lint, CDC and RDC flows. Good communication (written, verbal, presentations) skills. Experience with Perl, Python or other scripting language Desired Skills and Experience: Experience with ARM-based designs and/or ARM System Architectures Experience developing subsystems for PCIe, LPDDR, HBM, UCIe, Ethernet Experience with SystemVerilog and verification methodologies UVM/OVM Experience leading small teams or projects Experience or knowledge in the following areas Synthesis and timing analysis Static design checks, including CDC, RDC, X-Propagation, Linting Power management techniques DFT and physical implementation Accommodations at Arm At Arm, we want to build extraordinary teams. . To note, by sending us the requested information, you consent to its use by Arm to arrange for appropriate accommodations. All accommodation or adjustment requests will be treated with confidentiality, and information concerning these requests will only be disclosed as necessary to provide the accommodation. Although this is not an exhaustive list, examples of support include breaks between interviews, having documents read aloud, or office accessibility. Please email us about anything we can do to accommodate you during the recruitment process. Hybrid Working at Arm Arm s approach to hybrid working is designed to create a working environment that supports both high performance and personal wellbeing. We believe in bringing people together face to face to enable us to work at pace, whilst recognizing the value of flexibility. Within that framework, we empower groups/teams to determine their own hybrid working patterns, depending on the work and the team s needs. Details of what this means for each role will be shared upon application. In some cases, the flexibility we can offer is limited by local legal, regulatory, tax, or other considerations, and where this is the case, we will collaborate with you to find the best solution. Please talk to us to find out more about what this could look like for you. Equal Opportunities at Arm Apply Save Job View location Our Hiring Process

Project description The client is a leader in the space of firmware/embedded development. Market leader with cutting edge technology. Responsibilities Drive the hands-on development of firmware solutions, ensuring innovation and efficiency Employ strong C language programming skills to create high-quality and reliable firmware Optimize and enhance functionalities related to BIOS, power management, and PCIe technologies Apply in-depth knowledge of UEFI BIOS, ACPI, and AGESA to contribute to advanced firmware development Lead and actively contribute to the development of platform BIOS, ensuring compatibility and optimal system performance Navigate the entire firmware development lifecycle, from conceptualization to release, ensuring efficiency and quality Skills Must have Very strong in C language programming and debugging Working knowledge of git/Gerrit 5-12 years of experience in hands-on firmware development Good understanding and experience with BIOS, power management and PCIe Good knowledge SoC power management CPU/Device power states, hot-plug etc Strong knowledge of UEFI BIOS, ACPI. AGESA knowledge is a big plus Nice to have Bachelor's degree in computer science engineering from a reputed college Master's degree from a reputed university is a big plus

Qualcomm India Private Limited is a leading technology innovator that pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world-class products. You will collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: - Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 6+ years of Hardware Engineering or related work experience. - OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 5+ years of Hardware Engineering or related work experience. - OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. We are seeking a talented Automation Software Lead to join our team and contribute to the development of Tools. As a Design Automation Lead, you will be responsible for developing, enhancing, and maintaining tools that support the design and validation using Qualcomm chipsets. You will collaborate with cross-functional teams to ensure our tools meet the highest standards of quality and performance. Preferred Qualifications: - Tool Development, Platform level Automated Debug solutions, Telemetry Analytics, Windows Debug, Analyzers, Thermal and Power Management, Platform Validation and Debug Tools, System Automation. - Windows framework based tools running at UEFI, OS. - Windows based Tools supporting Diagnostics such as memory tests, peripheral tests, workloads. - Programming - C / C++ / Python. - Test cases covering functional, diagnostics and platform bring up. - OS Windows, Linux. - Subject matter expertise architecting with platform requirements, development and test. - Subject matter expertise in data structures and SW architecture, socket programming, multithreading, etc. Educational Requirements: - Required: Bachelor's, Electronics / Computer science Engineering. - Preferred: Master's, Electronics / Computer science. - Minimum: 10+ years of experience. Qualcomm is an equal opportunity employer committed to providing accessible processes for individuals with disabilities. If you require accommodations during the application/hiring process, you may contact disability-accommodations@qualcomm.com. Qualcomm expects its employees to abide by all applicable policies and procedures, including security and confidentiality requirements. Please note that Qualcomm does not accept unsolicited resumes or applications from agencies. Staffing and recruiting agencies are not authorized to use the Careers Site for submissions. For more information about this role, please contact Qualcomm Careers.,

Role & responsibilities Open Position-5 JD Testing Requirement: Experience with any one of the driver validation/ testing domain Graphics driver DRM/KMS, OpenGL, Vulkan, OpenCL, Mesa. Multi Media-Video driver Vaapi, vdpau, gstreamer, v4l2. Power management System to RAM, S0ix3. Display Driver development X, Wayland, Weston, Display driver Experience with Audio sub-system, Audio driverss, frameworks and ALSA SOC(ASOC), Audio protocols like I2S/TDM. Virtualization Virtio, Xen, KVM, QNX hypervisor knowledge. Experience with any RTOS, RTLinux Ethernet Driver – Network driver testing. Good working experience with IPC, DMA driver testing/ validation Strong background in embedded systems validation System knowledge, System Debugging Preferred candidate profile

As a software engineer at Google, you will have the opportunity to work on cutting-edge technologies that impact billions of users worldwide. Google is seeking individuals with a Bachelor's degree in Electrical/Electronics Engineering, Computer Engineering, or Computer Science, with a focus on computer architecture and performance/power analysis. Additionally, 2 years of software development experience in C/C++ within the Silicon power or performance domain is required. You will collaborate with cross-functional teams, including product management, chip architecture, hardware implementation, and embedded software teams. Proficiency in Linux kernel and device driver development, as well as experience in software power management and system, is essential for this role. Preferred qualifications include a Master's degree or PhD in Electrical/Electronics/Communication Engineering, Computer Engineering, or Computer Science, with a specialization in computer architecture. A minimum of 4 years of experience in power and performance software development and optimization in mobile/compute SoC is preferred. Candidates with experience in Android OS and equivalent operating systems, along with knowledge of the impact of software and architectural design decisions on power and thermal behavior, will be given preference. Familiarity with system software components such as Linux, device drivers, and runtime is also beneficial. In this role, you will be responsible for developing software and firmware for ARM Architecture, with a focus on shared system resource management, subsystem control, power management, clock management, system state management, and thermal control. You will be required to produce detailed documents for proposed implementations and oversee pre-silicon and post-silicon software development/validation. If you are passionate about low-level software development, optimizing complex systems, and working with cutting-edge hardware, this is an excellent opportunity to contribute to the future of mobile innovation at Google. Join our team and be part of creating technology that makes people's lives better and more efficient.,

What You ll Be Doing: Design, implement, unit test and debug changes in the NVIDIA SW stack to take next-gen HW from design / development stage to production, with focus on Microsoft Windows kernel-mode software. Be heavily involved in emulation, bringup, and product hardening required to build our groundbreaking products You will follow the devices all the way through the development process to datacenter systems, customer desktops, notebooks, workstations, and gaming console products that are used throughout the world. Optimize audio processing pipeline performance to achieve optimal latency, audio quality, power management and resource utilization. Tackle a variety of problems that directly impact NVIDIA s end users and partner OEMs. What We Need to See: BS or MS degree in Computer Engineering, Computer Science, or related degree, or equivalent experience. Excellent programming skills and proficiency in C/C++ language, libraries, and toolchains. 7+ years of hands-on experience in writing and debugging kernel mode drivers on Windows. Familiarity with computer system architecture, microprocessor and fundamentals (caches, buses, memory controllers, DMA, etc.) Good written and verbal communication skills, along with strong collaborative and networking abilities. Proven ability to thrive in high-pressure, fast-paced development environments, especially during critical project phases. Ways to stand out from the crowd: Expertise in Windows kernel-mode driver development for ARM SoC environments. Worked with one or more Audio interfaces (SoundWire, BT Classic/LE, USB Audio). Experience with algorithms development/optimization on DSPs. Contributed on Firmware development and optimization.

About Company ReNew is a leading decarbonisation solutions provider and the first Indian clean energy company to list on Nasdaq (Nasdaq: RNW). With ~15.6 GW of commissioned and pipeline utility-scale projects, we are a global company with strong Indian roots. Founded in 2011, ReNew is at the forefront of fighting climate change by offering decarbonisation solutions through utility-scale wind and solar offerings, green hydrogen, carbon markets, and energy storage. ReNew has been a pioneer in leveraging digital technologies to accelerate the transition to green energy and address the unique requirements of the B2B segment in India, where we are the market leader. Our mission is to play a pivotal role in meeting India’s growing energy needs in an efficient, sustainable, and socially responsible manner. ReNew is the world’s first clean energy company to be recognised as a Lighthouse by the World Economic Forum. In 2023, we were recognised among ‘Top 15 Climate Tech Companies to Watch’ by the MIT Technology Review. We are a recipient of the Sustainable Market Initiative’s Terra Carta Seal. The COP28 UAE Presidency presented ReNew the ‘Energy Transition Changemaker’ award for developing and deploying the country’s first round-the-clock power project. ReNew’s solar and wind energy projects currently contribute to 1.9% of India’s power capacity and are spread across 150+ sites and 18 Indian states. We have helped prevent 0.5% of India’s total carbon emissions and 1.1% of India’s total power sector emissions, in addition to generating around 130,000 jobs over the past decade. Job Description Key Responsibilities: • Regulatory Compliance: Ensure all solar projects comply with relevant laws, regulations, and industry standards. • Risk Management: Identify potential risks and develop mitigation strategies to minimize project delays and cost overruns. • Documentation: Prepare and submit necessary documentation for regulatory approvals. • Stakeholder Management: Serve as the primary point of contact for clients, suppliers, and regulatory agencies. • Policy Development: Develop and implement company policies and procedures to ensure compliance with regulatory requirements. Required Skills: • Analytical Skills: Strong understanding of regulatory laws and rules applicable to the solar industry. • Communication Skills: Excellent verbal and written communication skills. • Organizational Skills: Highly organized with the ability to handle multiple tasks and work under pressure.

Analyze post-silicon power and performance data to identify areas of improvement. Optimize system-level performance for key workloads and applications. Fine-tune hardware and software configurations (eg, DVFS, firmware, drivers). Competitive Analysis: Benchmark SoC platforms against competitive products using industry-standard tools and workloads. Provide data-driven insights and recommendations for product positioning. Performance Bottleneck Analysis: Identify and address system-level performance bottlenecks. Conduct root-cause analysis involving hardware, firmware, and software layers. Collaborate with cross-functional teams to resolve issues. Documentation and Reporting: Maintain detailed documentation of performance analysis, optimization strategies, and results. Communicate findings effectively to internal teams and stakeholders. Post-Silicon Validation: Validate power and performance against pre-silicon predictions. Characterize system behavior across different PVT (Power, Voltage, Temperature) conditions. Cross-Functional Collaboration: Work closely with design, firmware, and software teams to ensure seamless integration of optimizations. Provide feedback to architecture and pre-silicon teams for future SoC improvements. Android System Knowledge

We are seeking a highly motivated and skilledPost-Silicon System Power and Performance Engineerto join our team. In this role, you will focus onperformance optimizationandcompetitive analysisof cutting-edge SoC platforms. You will play a key role in analyzing and resolving performance bottlenecks, optimizing system power and performance, and documenting findings to guide future designs. This position offers an exciting opportunity to work on next-generation devices, whereknowledge of Androidsystems will be a valuable asset. Key Responsibilities Performance Optimization: Analyze post-silicon power and performance data to identify areas of improvement. Optimize system-level performance for key workloads and applications. Fine-tune hardware and software configurations (eg, DVFS, firmware, drivers). Competitive Analysis: Benchmark SoC platforms against competitive products using industry-standard tools and workloads. Provide data-driven insights and recommendations for product positioning. Performance Bottleneck Analysis: Identify and address system-level performance bottlenecks. Conduct root-cause analysis involving hardware, firmware, and software layers. Collaborate with cross-functional teams to resolve issues. Documentation and Reporting: Maintain detailed documentation of performance analysis, optimization strategies, and results. Communicate findings effectively to internal teams and stakeholders. Post-Silicon Validation: Validate power and performance against pre-silicon predictions. Characterize system behavior across different PVT (Power, Voltage, Temperature) conditions. Cross-Functional Collaboration: Work closely with design, firmware, and software teams to ensure seamless integration of optimizations. Provide feedback to architecture and pre-silicon teams for future SoC improvements. Android System Knowledge (Preferred) Analyze and optimize SoC performance for Android-based devices. Leverage Android debugging tools to identify and resolve performance issues. Required Qualifications Bachelor s or master s degree in electrical engineering, Computer Engineering, or a related field. 6+ years of experience in post-silicon validation, performance optimization, or a related area. Strong understanding of SoC architecture, power management, and performance analysis. Proficiency in using industry-standard tools for power and performance benchmarking (eg, SPEC, Geekbench, Dhrystone). Experience in debugging system-level performance issues. Familiarity with performance tuning techniques such as DVFS, power gating, and workload optimization Preferred Qualifications Experience working with Android-based platforms. Proficiency in Android debugging tools (eg, Systrace, Perfetto). Knowledge of scripting languages (eg, Python) for data analysis and automation. Strong communication and documentation skills.

You have excellent communication and presentation skills, demonstrated through technical publications, presentations, trainings, executive briefings, etc. You are highly adept at collaboration among top-thinkers and engineers alike, ready to mentor and guide, and help to elevate the knowledge and skills of the team around you. KEY RESPONSIBILITIES: Define product features and capabilities, close architecture, and micro-architecture requirements, drive technical specifications for SoC and IP blocks to meet those requirements, and provide technical direction to execution teams Comprehend the SOC as a complete system which includes HW (Silicon), FW, BIOS SW and ensure that FW, BIOS SW are aligned to enable all features, optimizing for performance and power Work cross functionally with IP/Domain architects to identify and assess complex technical issues/risks and develop architectural solutions to achieve product requirements Knowledge sharing and other contributions to Platform System Architecture As an overall product owner, responsible for architecture analysis and technical solutions for marketing/feature change requests Work closely with Design teams for Area and Floorplan refinement, Verification Test plan reviews, Timing targets, Emulation plans, Pre-Si bug resolution and Performance/Power Verification sign offs Support Post-Si teams for Product Performance, Power and functional issues debug/resolution PREFERRED EXPERIENCE: Outstanding foundation in Systems SoC architecture, with expertise in one or more of the following: CPU or GPU, Memory sub-system, Fabrics, CPU/GPU coherency, Multimedia, I/O subsystems, Clocks, Resets, Virtualization and Security Experience analyzing CPU, GPU or System-level Micro-Architectural features to identify performance bottlenecks within different workloads Demonstrated expertise in power management microarchitecture, low power design and power optimization, along with power impact at architecture, logic design, and circuit levels Excellent communication, management, and presentation skills. Adept at collaboration among top-thinkers and senior architects with strong interpersonal skills to work across teams in different geographies

Develop and deliver state-of-art and software infrastructure for world-class ease-of-use FPGA software tool for small, mid-range and large FPGA products. Develop software capabilities for next generation of FPGA products. Support and maintain existing FPGA design tools. Contribute to Spec and Plan process - review marketing requirement documents, generate functional specifications and developer unit test plans to ensure quality software. Improve development methodologies and processes. Qualifications: BS/MS/PhD Electrical Engineering or Computer Science 6+ years of experience in large-scale software development for engineering application domains preferably in FPGA/ASIC EDA domains. Must be proficient with C++. Modern C++ proficiency is a plus. Strong background in object-oriented programming, data structures and algorithms, and graph theory Experience of working on multiple platforms at least Linux and Windows is required. Knowledge of shell, TCL or Python scripting is a plus. Familiarity with commercial FPGA software tools and design flow is a plus. Knowledge in FPGA logic design is a plus. Must be detail oriented and possess independent problem-solving skills. Must be able to drive projects and lead a discussion. Strong written and verbal communication skills, and collaboration skill with the ability to work with multiple groups.

Education : BTech in ECE/EEE or MTech VLSI No. of positions : 5 Desired Skills: Minimum 3+ year of experience Should have block/SOC level netlist-gds2 experience. Expertise in Floor planning, Power planning, CTS. Should be capable of handling block-level timing closure. Good scripting skills (TCL/Perl/Shell). Experience on low power implementation techniques is preferred. Synopsys/Cadence tool experience is preferred. Should be a team player and perform lead role where ever required. Good communication analytical skills.