122 Power Management Jobs - Page 3

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Qualcomm is hiring strong DV engineers to verify high performance and low power CPUs in Bangalore. Please forward your profiles if you meet the requirement. Roles and Responsibilities o Responsible for power management verification includes Boot, Reset, clock gating, power gating, Voltage/frequency management, limit management and throttling. o Work closely with design/verification teams within CPU to develop comprehensive test plan. o Use simulation and formal verification methodologies to execute test plans. Write checkers, assertions and develop stimulus. o Verify power intent through use of methodologies like UPF. o Work closely with system architects, software teams and Soc team to validate system use cases. o Work closely with emulation team to enable verification on emulators and FPGA platforms. o Debug and triage failures in simulation, emulation and/or Silicon. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. o BE/BTech degree in CS/EE with 3+ years experience. o Experience in power management verification. o Implementation of assembly and C language embedded firmware. o Experience in C/C++, scripting languages, Verilog/system Verilog. o Strong understanding of power management features in CPUs and CPU based Socs. o Experience in verification of power management features such as clock gating, power gating, UPF, DVFS/DCVS, reliability, throttling etc. Preferred : o Good Understanding of CPU architectures and CPU micro-architectures. o In-depth knowledge of digital logic design, micro-processor, debug feature, and DFT architecture and microarchitecture o Experience with advanced verification techniques such as formal and assertions is a plus o Knowledge and verification experience in DFT and structural debug concepts and methodologiesJTAG, IEEE1500, MBIST, scan dump, memory dump is a plus

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field. Qualcomm PMIC team is a global organization responsible for delivering power and cost efficient solutions to mobile, compute, AR/VR, Auto and IOT products. Selected candidate will be part a new PMIC analog design team in Qualcomm Bangalore and be part of Qualcomms global PMIC design community. Job function includes but not limited to Oversees definition, design, verification, and documentation of mixed signal circuits and/or products in the field of Power Management. Executes the design and verification strategies of PMICs, for own specific assigned part of a block with supervision from technical lead. Runs functionality checks on a single block to ensure it meets specifications provided by team lead with minimal guidance. Seeks essential knowledge of industry trends, competitor products, and advances in the Power Management field from publicly available information Is actively involved in all aspects of the design from system definition/specification to circuit design and simulation, post silicon debug. Communicate information that may be somewhat complex to others through written documents and orally in meetings. Will require basic skills of negotiation, influence, diplomacy, and tact. Heavy involvement in overseeing layout and silicon evaluation is also expected. Requires expertise in one or more of the following engineering disciplinespower electronics (switch mode and linear), control theory, high accuracy data converters and analog front ends, high bandwidth linear amplifiers, very low power references, electro-migration and transistor reliability, behavioral modeling and UVI techniques. Uses design tools such as Cadence ADE, MathWorks MATLAB, Verilog/VerilogAMS, System Verilog and others. Actively participates in next generation initiatives and innovation.

Job Area: Engineering Group, Engineering Group > Hardware Applications Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. Job Function Qualcomm is looking for candidates to support its customers in designing solutions using Qualcomm Hardware and Software. The Individual will contribute to the dynamic HW Applications engineering team for end product designs. The Individual will also be responsible for supporting Qualcomm's growing portfolio of platforms/applications and the job involves working closely with internal partners in Product definition as appropriate. The PMIC- H/W application Engineer will be responsible for supporting Qualcomms growing portfolio mobile phone platforms. The job involves working closely with partners and customers of Qualcomm to define the specifications of the mobile phone handset products, part selection, system design, design reviews, support while doing system debug, partner deliverables etc. As a member of Qualcomm customer engineering team, the individual will be responsible for successful integration of Qualcomm solution into customer end products in mobile, PC, and consumer electronics markets. Individual will be responsible to work closely with cross function teams in Qualcomm, including design engineering, systems engineering, characterization team, ATE test team, SW team, product marketing, program management and peers in customer engineering organization across multiple regions. Individual will be responsible to create chipset documentation, reference schematics, training material, application notes for worldwide customer support. Individual will be responsible to engage with customer designs, assist customers in feature definition and design reviews, provide in-depth technical responses to customer queries, do troubleshooting of customer designs and provide necessary training to customers. Past expertise in interacting with multiple teams in HW, SW domains, skills in Digital/Baseband and sound technical knowledge of Qualcomm PMICs are desirable. . Preferred Qualifications Sound understanding of LDO/SMPS - Must to have Experience on power management for portable devices will be a plus Strong understanding PCB Signal/power integrity- Should be comfortable reviewing schematic/suggest changes for improvement - Experience with Schematic entry will be a plus . Should be fluent with CAD tools like Allegro/PADs to review customer layout . Knowledge on crystals/Clocks - Must to have Knowledge on display backlighting schemes - Must to have Knowledge on LabVIEW/python- Will be a plus Experience on Analog and mixed signal bench validation- Will be a plus Knowledge on battery charging and Fuel gauge will be a plus Good communication skills Keywords Power Management, Applications, Analog, PMIC, SMPS, DC/DC Converter, Buck, Boost, LDO, charger, fuel gauge/gas gauge, LED driver, ADC, oscillator, amplifier, Educational Bachelor's or Masters in Electronics and/or Electrical Engineering with 3 -5 years of relevant industrial experience

Title : CPU Power Management Firmware Developer - Performance Management/Staff/Sr Staff Job Area: Engineering Group, Engineering Group > Software Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Software Engineer, you will design, develop, create, modify, and validate embedded and cloud edge software, applications, and/or specialized utility programs that launch cutting-edge, world class products that meet and exceed customer needs. Qualcomm Software Engineers collaborate with systems, hardware, architecture, test engineers, and other teams to design system-level software solutions and obtain information on performance requirements and interfaces. Minimum Qualifications: Bachelor's degree in Engineering, Information Systems, Computer Science, or related field and 6+ years of Software Engineering or related work experience. OR Master's degree in Engineering, Information Systems, Computer Science, or related field and 5+ years of Software Engineering or related work experience. OR PhD in Engineering, Information Systems, Computer Science, or related field and 4+ years of Software Engineering or related work experience. 3+ years of work experience with Programming Language such as C, C++, Java, Python, etc. Job Overview Qualcomm is a company of inventors that unlocked 5G ushering in an age of rapid acceleration in connectivity and new possibilities that will transform industries, create jobs, and enrich lives. But this is just the beginning. It takes inventive minds with diverse skills, backgrounds, and cultures to transform 5Gs potential into world-changing technologies and products. This is the Invention Age - and this is where you come in. GENERAL SUMMARY As a CPU Performance Management FW Developer, you are responsible for working with a team on the enablement of the power management solution for Qualcomm's custom CPUs. You will collaborate internally to help define a standard driven solution, and implement embedded firmware, to manage performance of the CPU subsystem. You will also be responsible for helping characterize and tune this solution for all Qualcomm SoCs utilizing Qualcomm custom CPUs. In CPU Power Management FW developer role, with focus on CPU performance management, you will be working closely both with the hardware power management and firmware development teams. You will have an opportunity to engage with third parties on enablement of new platforms, as well as providing input to our SoC and platform architects on future designs. Role and Responsibilities Drive the firmware design, implementation and verification, in pre-silicon and post-silicon environments. Assist in the definition CPU Performance Management solutions for future generation of Qualcomm CPUs. Actively engage with open source communities to contribute support for processor architectures, device drivers, and firmware features Assist in identifying skills requirements and in hiring engineers, collaborating with other teams on platform bring-up/debug/diags, firmware lifecycle, etc. Preferred Qualifications BS/BEng in Electrical, Computer Engineering, or Computer Science (or equivalent professional experience) with 5 years experience in embedded firmware development Self-starter who takes initiative and brings technical leadership Proficient writing and debugging C and assembly Driver development experience in RTOS or OS Kernel environments Demonstrated development experience with embedded OSes such as Zephyr, eCos, uC/OS or FreeRTOS Experience developing for pre-silicon environments including simulators and FPGA emulation Experience developing, characterizing and tuning performance management solutions an SoC subsystem will be a considerable plus. Familiarity with ARM v8 architecture. Development experience for a ARMV8 platform is a plus. Physical Frequently transports between offices, buildings, and campuses up to mile. Frequently transports and installs equipment up to 5 lbs. Performs required tasks at various heights (e.g., standing or sitting). Monitors and utilizes computers and test equipment for more than 6 hours a day. Continuous communication which includes the comprehension of information with colleagues, customers, and vendors both in person and remotely. Minimum Qualifications Education Bachelors - Computer Science, Bachelors - Engineering, Bachelors - Information Systems Work Experiences 4+ years experience with Programming Language such as C, C++, Java, Python, etc. ,8+ years of Software Engineering or related work experience

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 8+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 7+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 6+ years of Hardware Engineering or related work experience. Silicon Validation Lead - Graphics Silicon Team, Bangalore The Qualcomm Graphics Silicon Team in Bangalore is seeking a Silicon Validation Lead. Our power-efficient GPU solutions are fundamental to enabling exciting new markets such as Virtual Reality (VR), Internet of Things (IoT), Artificial Intelligence (AI), drones, and autonomous driving. We are looking for a talented Silicon Lead to deliver power-optimized, high-quality, high-performance graphics and computing solutions. The Graphics Silicon team in Bangalore is part of a global team responsible for developing and delivering GPU solutions that set industry benchmarks. Qualcomm boasts a strong portfolio of GPU cores, providing engineers with the opportunity to work with a world-class engineering team that leads the industry through innovation and disciplined execution. Roles and Responsibilities As a GPU Silicon Validation Engineer, you will be part of the GPU Silicon Team and drive: The new feature, use case enablement, and their validation. Collaboration with GPU design and verification teams to develop GPU bring-up and validation test plans. Preparation for GPU bring-up through pre-work on emulation and FPGA platforms. Coordination with SoC bring-up teams and software teams to plan GPU bring-up. Triage and debugging of failures on silicon. Development of test contents and testing strategies to assist in the validation of GPU on silicon. Working with GPU verification teams to reproduce silicon failures on emulators and FPGAs. Collaboration with the design team to suggest and architect new debug features to improve future GPU bring-ups. Power and performance characterization of GPU. Planning and implementation of new efficiency improvement methodologies in GPU. Qualifications The ideal candidate should possess deep knowledge of scripting and software languages, including PERL/TCL, Linux/Unix shell, and C. Minimum Qualifications Bachelor's or Masters degree in Electrical or Electronic Engineering from a reputed institution. Over 14 years of experience in silicon validation and bring-up. Minimum Strong understanding of microprocessor architecture. Strong understanding of power management. Experience in silicon bring-up and validation of GPU features. Experience in debugging functional, power, performance, and/or physical design issues in silicon. Experience in GPU silicon validation and debug basics. Experience in test development for validation of GPU features on silicon. Experience in developing test vectors for tester bring-up. Implementation of assembly, C, and Python language programming. Experience with HW tools like JTAG, Kratos, LA, Emulation platforms, DMM, etc.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. General Summary: Responsibilities Front-End/Digital design implementation of Sensor/Mixed signal digital blocks RTL development and its validation for linting, clock-domain crossing, conformal low power and DFT rules. Work with SoC power management team for power sequencing requirements and system level considerations Work with functional verification team on test-plan development and debug. Develop timing constraints, deliver synthesized netlist to physical design team, and provide constraints support for PD STA. UPF writing, power aware equivalence checks and low power checks. DFT insertion and ATPG analysis for optimal SAF, TDF coverage. Provide support to SoC integration and chip level pre/post-silicon debug. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 8+ years of Hardware Engineering or related work experience.ORMaster's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 8+ years of Hardware Engineering or related work experience. Skills & Experience MTech/BTech in EE/CS with hardware engineering experience of 8+ years. Experience in micro-architecture development, RTL design, front-end flows (Lint, CDC, low-power checks, etc.), synthesis/DFT/FV/STA. Experience with post-silicon bring-up and debug is a plus. Able to work with teams across the globe and possess good communication skills.

Job Area: Engineering Group, Engineering Group > Software Engineering General Summary: The ideal candidate needs to have "ƒ"ƒStrong Embedded system knowledge, Experience on Windows Internals and good driver development. "ƒ"ƒSolid understanding of Operating System concepts, RTOS, FW management. Solid understanding of System level features, Processor and Power management, architecting system level features. Hands on experience in complex and multi domain large features. "ƒ"ƒ Windows kernel driver developmen t experience. "ƒ"ƒUnderstanding and experience in Designing and Implementing Windows Kernel mode drivers, Board support package, ACPI & UEFI. "ƒ"ƒStrong communication and interpersonal skills. "ƒ"ƒStrong problem solving and debugging skills. "ƒ"ƒAbility to co-ordinate across stakeholders and Task management Handling small to large medium size technology teams. Experience on Enterprise and IHV/IBVs is a plus Minimum Qualifications: Bachelor's degree in Engineering, Information Systems, Computer Science, or related field and 15+ years of Software Engineering or related work experience. OR Master's degree in Engineering, Information Systems, Computer Science, or related field and 13+ years of Software Engineering or related work experience. OR PhD in Engineering, Information Systems, Computer Science, or related field and 13+ years of Software Engineering or related work experience. 10-15 years of work experience with Design and development of Windows drivers, programing languages such as C, C++, hands on experience in debugging system issues and Preferred Qualifications 10- 15 years of Software Engineering or related work experience. "ƒ"ƒArchitecting System level features. Design and development of complex large features Hands on experience in low level design, code review and delivery management. "ƒ"ƒStrong knowledge on Windows OS internals and Windows Driver knowledge (KMDF) "ƒ"ƒWindows Device driver programming and debugging with WinDbg, JTAG/other tools. "ƒ"ƒARM Processor architecture and Assembly Language. "ƒ"ƒExperience with PC software - System BIOS, UEFI, ACPI, Drivers, Applications "ƒ"ƒEmbedded OS (Kernel architecture, OS services heap, memory, multi-core, multi-threading, and crash debugging). "ƒ"ƒKnowledge of OS/system performance profiling and optimization techniques. "ƒ"ƒCommunication, written & interpersonal skills, motivation, the ability to learn quickly. Minimum Qualifications: Bachelor's degree in Engineering, Information Systems, Computer Science, or related field and 4+ years of Software Engineering or related work experience. OR Master's degree in Engineering, Information Systems, Computer Science, or related field and 3+ years of Software Engineering or related work experience. OR PhD in Engineering, Information Systems, Computer Science, or related field and 2+ years of Software Engineering or related work experience. 2+ years of work experience with Programming Language such as C, C++, Java, Python, etc.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Qualcomm is hiring strong DV engineers to verify high performance and low power CPUs in Bangalore. Please forward your profiles if you meet the requirement. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. Roles and Responsibilities o Responsible for power management verification includes Boot, Reset, clock gating, power gating, Voltage/frequency management, limit management and throttling. o Work closely with design/verification teams within CPU to develop comprehensive test plan. o Use simulation and formal verification methodologies to execute test plans. Write checkers, assertions and develop stimulus. o Verify power intent through use of methodologies like UPF. o Work closely with system architects, software teams and Soc team to validate system use cases. o Work closely with emulation team to enable verification on emulators and FPGA platforms. o Debug and triage failures in simulation, emulation and/or Silicon. BE/BTech degree in CS/EE with 3+ years experience.o Experience in power management verification. o Implementation of assembly and C language embedded firmware. o Experience in C/C++, scripting languages, Verilog/system Verilog. o Strong understanding of power management features in CPUs and CPU based Socs. o Experience in verification of power management features such as clock gating, power gating, UPF, DVFS/DCVS, reliability, throttling etc. Preferred : o Good Understanding of CPU architectures and CPU micro-architectures. o In-depth knowledge of digital logic design, micro-processor, debug feature, and DFT architecture and microarchitecture o Experience with advanced verification techniques such as formal and assertions is a plus o Knowledge and verification experience in DFT and structural debug concepts and methodologiesJTAG, IEEE1500, MBIST, scan dump, memory dump is a plus

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a "CPU Silicon Bring up and Validation Engineer" you would be part of the CPU Silicon Bringup Team, within the CPU team. The charter for CPU Silicon Bringup team would be to prepare for and support bring up of every SoC using the Custom CPUs - from first Silicon through to productization. Roles and Responsibilities Work with CPU design and verification teams to develop CPU bring up and validation test plans. Prepare for CPU bring up through pre-work on emulation and FPGA platforms. Work with SOC bring up teams, software teams to plan CPU bring up. Triage and debug failures on Silicon. Develop test contents and testing strategies to assist validation of CPU on silicon. Work with CPU verification teams to reproduce silicon fails on emulators and FPGAs. Work with design team to suggest, architect new debug features to improve future CPU bringups. Minimum : BA/BS degree in CS/EE with 5+ years experience. 3+ Experience in Silicon Validation and bring up. Implementation of assembly, C/C++ language embedded firmware Experience with software tool chain including assemblers, C compilers, Makefiles, and source code control tools. Preferred : Strong understanding of micro-processor architecture. Strong understanding of power management, physical design concepts. Experience in Silicon bring up and validation of CPU features. Experience in debug of functional, power, performance and/or physical design issues in silicon. Experience in CPU design and verification. Experience in Test development for validation of CPU features on Silicon. Experience in development of test vectors for tester bring up. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 6+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 5+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience.

Job Area: Engineering Group, Engineering Group > Systems Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Systems Engineer, you will research, design, develop, simulate, and/or validate systems-level software, hardware, architecture, algorithms, and solutions that enables the development of cutting-edge technology. Qualcomm Systems Engineers collaborate across functional teams to meet and exceed system-level requirements and standards. Minimum Qualifications: Bachelor's degree in Engineering, Information Systems, Computer Science, or related field and 8+ years of Systems Engineering or related work experience. OR Master's degree in Engineering, Information Systems, Computer Science, or related field and 7+ years of Systems Engineering or related work experience. OR PhD in Engineering, Information Systems, Computer Science, or related field and 6+ years of Systems Engineering or related work experience. Job Title Infra Systems Architect Job description Infra Systems Architect for the next generation System-on-chip (SoC) for smartphones, tablets and other product categories. This position will be responsible for Technical leadership role working with SOC architects, DMs and PDMs from early stages of the project to understand new usecases and feature requirements IP baseline selection, area projections and feature negotiations Convert the requirements to solutions and work with Infra IP development teams to flawlessly implement them Point of contact in Product core and architecture meetings in identifying and solving system level issues. Work with performance projection team to define experiments, analyze data, draw conclusions, identify potential problems and drive solutions Work with SoC, Verification, Physical Design, SoC Floorplan and core teams in identifying optimizations and drive them into products. Point of contact for debugging Post Si issues at system level. Preferred Qualifications 15+ years of experience in SOC/IP architecture, micro-architecture and design. Good understanding of SOC. Possesses expertise in 1 or more of the following technical areasDDR, Security, access control, Interconnects, SMMU, SOC power management, boot, clock/reset, UBWC, Encryption, ECC Understanding of ARM architecture (Coherency, bus interconnects, Security, arch evolution) Good communication and leadership skills; work with minimal supervision Collaborate with internal (Perf, Design and System team) and external (SoC arch, Client Ips) stakeholders in developing solutions Understanding of traffic patterns and BW of different clients a plusExperience with high-performance and low power micro-architecture concepts Experience with Verilog, logic design principles with timing, area and power implications. Experience with scripting languages like Perl/Python/Java for developing proof of concept of the new ideas. Performanceexplore high performance strategies and validate that the micro architecture meets targeted performance. Understanding of interconnect protocols like AHB/AXI/ACE/ACE-Lite/CHI. Good understanding of the design convergence cycle in terms of architecture, micro-architecture, synthesis, timing closure and verification Good Understanding of concurrency, bandwidth, latency and system level aspects Provides direction, mentoring, and leadership from small to medium sized groups. Education Bachelor's degree in Electrical Engineering required, Master's or Doctorate preferred

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. PMIC Systems & Validation Engineer Team & Product Overview: Qualcomm's Power Management Systems, Validation & Integration team (PMIC-SVI) leads the industry in the system architecture and post-silicon validation of high-performance feature-rich Power Management Integrated Circuits (PMICs), that are embedded in our Chipsets - for smartphones, tablets, laptops, wearables and a variety of cutting-edge consumer electronics. This team gets to work on state-of-art technology to enable products with worlds leading brands. A typical Qualcomm PMIC is a highly advanced IC that has a multitude of IPs viz. switching DC-DC converters, linear regulators, clock oscillators, battery charger, fuel gauge, LED drivers, and ADCs. Additionally, there is an embedded mini-processor running critical firmware (FW) to support power sequencing, interrupt servicing, crash handling and various device reset scenarios. It is also responsible for maintaining various stability & performance related configurations that are part of SoC software driver initializations. Furthermore, it provides an intelligent-framework for sequencing of time-critical-operations, which otherwise can't be guaranteed by any OS / higher-level software. Often, Qualcomm chipset solutions contain multiple PMICs working together in sync- which together constitute a PMIC-System. Job Responsibilities This job involves a mix of Architecture, HW Systems, Functional Validation, Chipset integration & customer issue debug support. We are looking for Systems & Validation engineers with preferably 1 -5 years of experience in analog/power electronics. Depending on your experience level and area of technical expertise you will own and participate in systems definition, HW/SW debugging and validation of PMIC solutions by partnering with various engineering teams like Analog/Digital Design, Software and Customer Engineering in a fast-paced environment. Systems involves coming up with a Top-Level specification (involving HW/FW/SW level partitioning of feature-design, HW Register interfaces, memory sizing, protocol selection, multi-PMIC connectivity grid, debug framework support, etc) to satisfy all chipset level requirements. Validation involves coming up with a comprehensive functional validation plan (that covers both manual and scripted automated test cases), executing them within stipulated time-period, analyzing results at HW-level (via signal measurements), debugging issues & creating reports. Engineers will be responsible to perform risk assessment of development and validation plans; and interact with PMIC Product Management, Design & Characterization teams; other SoC HW/SW Architecture, Development & Validation teams; and finally Customer-Engagement teams across worldwide sites. Education A Bachelor's degree in Electronics related Engineering is a must. Masters degree is preferred esp. with specialization in VLSI / Microelectronics, Power Management, etc. Minimum Qualifications We are looking for

Job Area: Engineering Group, Engineering Group > Software Engineering General Summary: Windows Security Senior Engineer Company: - Job Area: Engineering Group, Engineering Group > Software Engineering General Summary: We are looking for Security Engineer to contribute in the area of the Windows on Snapdragon products. The person will have the responsibility to perform security assessment, design & code review, develop fuzzing harness and fuzz the Windows software stack on Snapdragon products. Ideal candidate must posses security mindset and has good exposure on Security Development Life Cycle "SDLC". The ideal candidate also needs to have Strong Embedded software knowledge, Experience on Windows Internals and good driver development. Solid understanding of Operating System concepts, RTOS, FW management. Solid understanding of System level features, Processor and Power management, architecting system level features. Hands on experience in complex and multi domain large features. Windows kernel driver development experience. Understanding and experience in Designing and Implementing Windows Kernel mode drivers, Board support package, ACPI & UEFI. Strong communication and interpersonal skills. Strong problem solving and debugging skills. Ability to co-ordinate across stakeholders and Task management Handling small to large medium size technology teams. Experience on Enterprise and IHV/IBVs is a plus Minimum . Minimum Qualifications: Bachelor's degree in Engineering, Information Systems, Computer Science, or related field and 2+ years of Software Engineering or related work experience. OR Master's degree in Engineering, Information Systems, Computer Science, or related field and 1+ year of Software Engineering or related work experience. OR PhD in Engineering, Information Systems, Computer Science, or related field. 2+ years of academic or work experience with Programming Language such as C, C++, Java, Python, etc. Preferred Qualifications 2+ years of Security Engineering or related work experience. Design and development of Fuzzing harness Ability to perform design and code review for vulnerability detection Strong knowledge on Windows OS internals and Windows Driver knowledge (KMDF) Windows Device driver programming and debugging with WinDbg, JTAG/other tools. ARM Processor architecture and Assembly Language. Experience with PC software - System BIOS, UEFI, ACPI, Drivers, Applications Embedded OS (Kernel architecture, OS services heap, memory, multi-core, multi-threading, and crash debugging). Knowledge of OS/system performance profiling and optimization techniques. Communication, written & interpersonal skills, motivation, the ability to learn quickly

Job Area: Engineering Group, Engineering Group > Systems Engineering General Summary: Job Summary: We are seeking a highly motivated and skilled Performance and Power Analysis Engineer to join our Display Systems team in Bengaluru. In this critical role, you will be responsible for the analysis, modeling, and optimization of performance and power consumption across various stages of our cutting-edge chip development process. You will take the lead and collaborate closely with architecture, design, Software and verification teams to ensure our products meet stringent performance targets and power efficiency requirements. As an independent collaborator, contribute with cross functional teams, SoC performance and SW/HW teams to enhance or optimize the process. This is an exciting opportunity to contribute to the development of next-generation semiconductor technology. Responsibilities: Develop and maintain architectural-level and/or cycle-accurate models for performance and power estimation. Analyze trade-offs between performance, power, and area (PPA) at the architecture and microarchitecture levels. Drive performance and power analysis early in the design cycle to influence architecture and design decisions. Collaborate with architecture and design teams to explore and evaluate different design options and trade-offs to optimize performance and power. Conduct detailed analysis to identify performance bottlenecks and power inefficiencies in chip architectures and microarchitectures. Perform power profiling and characterization of designs under various operating conditions and workloads. Develop and implement power reduction techniques at different design stages (e.g., clock gating, power gating, voltage scaling). Analyze and debug performance and power-related issues during simulation, emulation, and silicon bring-up. Generate comprehensive reports and presentations summarizing analysis results and providing actionable recommendations to the design teams, cross-functional teams and senior leadership. Stay abreast of the latest industry trends, tools, and methodologies in performance and power analysis. Contribute to the development and improvement of internal tools and flows for performance and power analysis. Collaborate with verification teams to define and execute performance and power validation plans. Validate model accuracy through correlation with RTL simulations, emulation, and silicon measurements. Minimum Qualifications: Bachelor's degree in Engineering, Information Systems, Computer Science, or related field and 3+ years of Systems Engineering or related work experience. OR Master's degree in Engineering, Information Systems, Computer Science, or related field and 2+ years of Systems Engineering or related work experience. OR PhD in Engineering, Information Systems, Computer Science, or related field and 1+ year of Systems Engineering or related work experience. Qualifications: Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field. 5 to 8+ years of experience in performance and power analysis for ASIC or SoC designs. Strong understanding of computer architecture, microarchitecture, and digital design principles. Strong experience in developing and utilizing performance and power models using languages such as SystemC, Python, C++, or custom in-house frameworks. Proficiency in using industry-standard performance and power analysis tools (e.g., Synopsys PrimeTime PX) Solid understanding of power management techniques and low-power design methodologies. Experience with simulation and emulation environments. Strong analytical and problem-solving skills with the ability to interpret complex data and draw meaningful conclusions. Excellent communication and interpersonal skills with the ability to collaborate effectively with cross-functional teams. Familiarity with silicon bring-up and post-silicon power/performance characterization is a plus. Experience with machine learning techniques for power/performance prediction is a plus. Experience with IOS and Xcode profiling/development is a plus

1. Responsible to execute activities in assembly function to ensure on time delivery of Defect free products, Spares and services 2. Work towards continual improvement on Quality, Delivery and Cost 3. Improve responsiveness to customer needs 4. Maintain quality standards and requirements in activities and output produced from assembly 5. Ensure efficient man power management and skill development Responsibilities Accountabilities Responsible to execute activities in assembly function to ensure on time delivery of Defect free products, Spares and services Execution of assembly activities and looking for ways for improvement /driving continual improvement initiatives ideated by senior leaders on Quality, Delivery and Cost Follow/ suggest updation in assembly processes to enable continuous reduction in cost of production and work with a culture of cost consciousness in the organisation Work towards for maintaining COPQ(Cost of Poor Quality) from assembly processes within the acceptable target limits Ensure responsiveness to customer needs Support the resolution of customer concerns, Identify and eliminate root cause using various methods Work with SIC and team for Customer complaint Analysis and resolution and Solving of key critical complaints using QC story methodology Work with the SIC to ensure amendments that arise due to internal and external customer requirements are met accurately Responsible for Job Allocation to Workmen (Assly,Sub Assly,Packing, Spares) Prepare Machines Specification Chart (Monthly Schedule) Prepare Assembly Move Orders and Move Orders for Consumable Items Manpower work allocation as per the DRO plan Check the material availability as per draw list before the start of assembly Check for the assembly of machine as per scope and assembly WI Verify the in line observed values at each stage of assembly Collect data and do elemental analysis to identify the bottle neck operations for cycle time reduction Prove and implement the proposed actions for cycle time reduction Closing of DEMS with 5 days and adhere to CA / PA . Implement TQM initiatives and facilitate QC story for identified projects Proving of electrical assembly Identify assembly related QP points for NPD Ensure WIP pad Pending Checking Controlling System transaction for Spares, Machinery and FR Despatches Ensure Entry in System for Machine Crane Breakdowns Conduct Design Alteration Meeting ECR Updation Ensure efficient Facilities Arrangement for Material Handling /Tools/Fixture and Storage Conduct Customer complaint analysis using QC story, DMAIC approach Execute Team Activities KHO / QCC ) Documentation / Maintenance And Updation Drive the process for QMS,EMS,OHSAS Documentation / Maintenance And Updation Execute Packing list generation and inspection of DD, FR items Lead and coordinate for Assembly process stage wise Quality audit Coordinate with QA for Final Inspection for All Machines, along with training on QA processes/standards for all operators Maintain Calibration record and ensure instruments complying with calibration requirements Execute Training For New Operators And Monitoring Effectiveness Ensure Operator Kaizen for Entry and monitoring Lead Daily shift meeting to Discuss on QCD Ensure Multi Skill Training for Operators Ensure adherence to Business Excellence processes in all activities related to the assembly department, through training, practicing, audits and corrective actions Oversee the workflow and work assignments of the team to ensure effective collaboration among teams, team members and consistent, quality work Execute Process improvement initiatives and Error proofing identification through FMEA Work with the Assembly IE team to identify use cases and drive automation / process improvement initiatives within the assembly function Update oneself on the latest technologies and tools within assembly and suggest / use these within the function Drive continuous learning and skilling of operators on soft and hard skills essential for the assembly department Track performance measures of the operators and individuals to consistently provide feedback and improve performance

Job Summary: We are seeking an experienced and innovative Senior Embedded Hardware Engineer to lead the design, development, and validation of complex embedded hardware systems. You will play a key role in architecting and implementing hardware solutions for products ranging from embedded IoT devices to high-performance embedded systems. This role requires deep technical expertise, leadership, and cross-functional collaboration. Key Responsibilities: Design & Development: Design and develop embedded hardware systems, including microcontroller/microprocessor-based boards, sensors, power supplies, and communication interfaces. Create schematics and perform PCB layout design using tools like Altium Designer, OrCAD, or KiCad. Select components and design circuits that meet performance, cost, and manufacturability requirements. Prototyping & Testing: Build and test hardware prototypes to verify performance and compliance with specifications. Conduct validation and verification (V&V), including signal integrity, EMI/EMC, thermal, and power analysis. Firmware Interaction: Work closely with embedded software/firmware engineers to ensure seamless integration of hardware and software. Provide bring-up support and troubleshooting for embedded firmware development. Project Leadership: Lead or contribute to project planning, risk assessment, and technical documentation. Mentor junior engineers and review their designs to ensure quality and adherence to standards Cross-Functional Collaboration: Collaborate with mechanical engineers, industrial designers, product managers, and manufacturing teams. Support transition from prototype to mass production, including DFM/DFT considerations and interaction with contract manufacturers. Qualifications: Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or related field. 5+ years of experience in embedded hardware design and development. Proficiency in analog and digital circuit design, power management, and signal integrity. Experience with microcontrollers, SoCs, memory, and interface protocols (SPI, I2C, UART, USB, Ethernet, etc.). Strong experience with PCB design tools (e.g., Altium, Eagle, KiCad). Familiarity with lab equipment. Knowledge of EMI/EMC standards and compliance testing. Preferred: Experience with wireless technologies (Bluetooth, Wi-Fi, Zigbee, LTE, etc.). Familiarity with embedded Linux and hardware bring-up processes. Experience with low-power and battery-operated devices. Experience working in regulated environments (e.g., Defence and aerospace) is a plus. Soft Skills: Strong analytical and problem-solving skills. Excellent written and verbal communication. Ability to manage multiple projects and priorities. Proven ability to work independently and as part of a team.

The Opportunity Were looking for the Wavemakers of tomorrow. Design Engineer - SoC Boot, Power Management and Security Were looking for the Wavemakers of tomorrow. Alphawave Semi enables tomorrow s future by accelerating the critical data communication at the heart of our digital world - from seamless video streaming to AI to the metaverse and much more. Our technology powers product innovation in the most data-demanding industries today, including data centers, networking, storage, artificial intelligence, 5G wireless infrastructure, and autonomous vehicles. Customers partner with us for mission-critical data communication, our innovative technologies, and our proven track record. Together, we enable the next generation of digital technology. Why Join Us? Opportunity to work on cutting-edge ARM-based SoC designs. Work with a team in a high-impact, fast-paced environment. Competitive compensation and career growth opportunities. Work alongside some of the best minds in the semiconductor industry. What Youll Do Leading design for SoC Subsystem targeted for Boot, Security, power management, and low speed peripherals using Arm CPU Core in an inclusive team environment Architecting, Planning Design activities at subsystem level Demonstrate expertise in boot, security and low power multi core Arm CPU based SoC. Collaborate with the design verification team to debug. Demonstrate expertise knowledge in design of SoC Boot, Security that includes RoT, security components at SoC level. Integration and support for slow speed peripherals such as I2C, xSPI, eMMC, UART, JTAG, GPIOs, Debugger, etc. Support Emulation and FPGA teams Low power methodology that includes multi power domain, multi-voltage domain, DVFS Define implementation strategy for Power-Performance metric for SoC with Architects What Youll Need Bachelors or Masters degree in Computer Science, Electrical Engineering, or a related field. This role requires a minimum of 15+ years of ASIC Micro-architecture and RTL design experience. Proficiency in System Verilog, VHDL, Verilog, C. Proficiency with ARM-specific System Management design Strong background in digital design, RTL coding (Verilog/VHDL), and ASIC/FPGA debug methodologies Proven experience in SOC design Deep understanding of hardware design, verification, and post-silicon validation It Would Be Amazing If You Had Experience in multi-core, multi-voltage, multi-power domain debug design micro-architecture and RTL design Experience in designing SoC with slow speed peripherals such as I2C, SPI, eMMC, UART, GPIOs, JTAG/SW. Experience with boot flow and SoC security implementation using Arm components Supporting and bringing up FPGA, Emulation based systems targeting PCIe Experience working across multiple chiplets in large-scale SOCs Hands-on SoC bring up experience in a lab environment We have a flexible work environment to support and help employees thrive in personal and professional capacities As part of our commitment to the well-being and satisfaction of our employees, we have designed a comprehensive benefits package that includes: Competitive Compensation Package Restricted Stock Units (RSUs) Provisions to pursue advanced education from Premium Institute, eLearning content providers Medical Insurance and a cohort of Wellness Benefits Educational Assistance Advance Loan Assistance Office lunch & Snacks Facility Equal Employment Opportunity Statement Alphawave Semi is an equal opportunity employer, welcoming all applicants regardless of age, gender, race, disability, or other protected characteristics. We value diversity and provide accommodations during the recruitment process.

We are seeking a PCIe device architect with expertise in PCIe driver and Linux kernel development. The ideal candidate will work on our DPU and AINIC firmware - low-level system software, enabling hardware functionality, optimizing performance, and ensuring seamless integration between hardware and software layers. Key Responsibilities: - Architect PCIe driver/features for our AINIC and DPU product line - Optimize PCIe driver performance, including power management and low-latency data transfers - Work with kernel-level programming in Linux including experience with sysfs, procfs, and PCIe Subsystem - Debug and troubleshoot PCIe bus communication, DMA, interrupts, and memory mapping issues - Provide support for hot-plug and interrupt mechanisms - Collaborate with hardware team to understand PCIe components like serdes and bringup in software - Represent AMD in industry forums presenting and standardising our architecture across different standard bodies for PCIe/CXL/XGMI - Work closely with customers understanding their requirements and providing direction to our product roadmap with features in PCIe domain - Innovate and mentor talent with in the team to build expertise in the area of PCIe implementing solutions with latency and bandwidth optimisations Required Skills & Experience: 15 years of experience in managing PCIe devices, Linux kernel programming, device driver development, and system software engineering. Proficiency in C programming for system-level software. Good understanding of PCIe enumeration, link training, device initialization sequence, configuration space handling, SR-IOV, bare-metal and hypervisor VM architectures Strong debugging and troubleshooting skills using kernel logs, GDB and other debugging tools. Experience in hardware bringup, bootloaders, and ARM architecture. Familiarity with Buildroot, or other embedded Linux systems. Knowledge of memory management, interrupts, and scheduling in Linux. Benefits offered are described: AMD benefits at a glance .

As Logic deisgn engineer for Power Management, you will be responsible for design and development of power management and sustainability features for high performance Processors chips. 1. Lead the Development of features - propose enhancements to existing features, new features, architecture in High level design discussions 2. Develop micro-architecture, Design RTL, Collaborate with the Verification, DFT, Physical design, FW, SW, Research teams to develop the feature 3. Guide junior engineers. Represent as Power engineer in various forums. 4. Signoff the Pre-silicon Design that meets all the functional, area and timing goals 5. Participate in silicon bring-up and validation of the hardwar 6. Estimate the overall effort to develop the feature and close design Required education Bachelor's Degree Preferred education Master's Degree Required technical and professional expertise 3-8 years of work experience of one or more areas Power management Architecture/ microarchitecture/ Logic design – Deep technical understanding of dynamic power saving, power capping, droop mitigation techniques. 1. Experience of working on Power Management designs handling Power/Performance States, Stop states of Core and Cache, Chip and System thermal management and power supply current over-limit management 2. Experience in working with research, architecture/ FW/ OS teams 3. Experience in low power logic design 4. Experience in working with verification, validation for design closure including test plan reviews, verification coverage 5. Good understanding of Physical Design, and able to collaborate with physical design team for floor-planning, placement of blocks for achieving high- performance design and timing closure of high frequency designs 6. Experience in silicon bring-up

As a Hardware at , you ll get to work on the systems that are driving the quantum revolution and the AI era. Join an elite team of engineering professionals who enable customers to make better decisions quicker on the most trusted hardware platform in today s market. Your role and responsibilities As Logic deisgn engineer for Power Management, you will be responsible for design and development of power management and sustainability features for high performance Processors chips. 1. Lead the Development of features - propose enhancements to existing features, new features, architecture in High level design discussions 2. Develop micro-architecture, Design RTL, Collaborate with the Verification, DFT, Physical design, FW, SW, Research teams to develop the feature 3. Guide junior engineers. Represent as Power engineer in various forums. 4. Signoff the Pre-silicon Design that meets all the functional, area and timing goals 5. Participate in silicon bring-up and validation of the hardwar 6. Estimate the overall effort to develop the feature and close design Required education Bachelor's Degree Preferred education Master's Degree Required technical and professional expertise 3-8 years of work experience of one or more areas Power management Architecture/ microarchitecture/ Logic design - Deep technical understanding of dynamic power saving, power capping, droop mitigation techniques. 1. Experience of working on Power Management designs handling Power/Performance States, Stop states of Core and Cache, Chip and System thermal management and power supply current over-limit management 2. Experience in working with research, architecture/ FW/ OS teams 3. Experience in low power logic design 4. Experience in working with verification, validation for design closure including test plan reviews, verification coverage 5. Good understanding of Physical Design, and able to collaborate with physical design team for floor-planning, placement of blocks for achieving high- performance design and timing closure of high frequency designs 6. Experience in silicon bring-up ABOUT BUSINESS UNIT

Full PE product lifecycle ownership from concept to end of life with a focus on ensuring the delivery of the highest quality products to our end customers Definition of ATE test, qualification and manufacturing plans Product release into manufacturing with adherence to stringent tier 1-customer requirements Datasheet and automotive compliance reports Real time customer support for design, product and quality related issues Temperature/Voltage/Process characterization and production limit setting Product new product introduction and yield ownership Product BOM release and maintenance Excursion management for both suppliers and customers Use commercially available yield tools for yield improvement and monitoring, generate weekly reports and review with PE teams KPI achievement in product related deliverables including NPI execution and velocity, product cost (Gross margin improvements), product quality performance and failure analysis cycle times PAT, SYL, SBL, SPC limit and disposition optimizations to protect quality without excessive waste REQUIREMENTS: 7+ years experience in product engineering. A strong analog circuit background is a must. Familiarity with power management IC testing would be a plus Familiarity with ATE tester platforms (eg. Teradyne J750, Advantest 93K) Knowledge of analog and mix-signal circuitry and the common building blocks, device physics, test methodology and DFT knowledge Experience with common lab test equipment (DC power supply, oscilloscope, multi-meters etc). Bench characterization experience is a plus Familiarity with JEDEC/AEC qualification standards and stress test conditions. Experience with qual hardware/software development would be preferred Experience in yield management tools such as PDF Exensio, JMP. Apply statistical analysis to isolate the issue and make data-driven decisions Ability to managing supplier excursions and customer escalations through problem solving Knowledge of Semiconductor Failure Analysis is preferable Strong verbal and written communication skills A good team player. Effective in fast paced, dynamic work environment Qualifications BS in Electrical/Electronic Engineering MS in Electrical/Electronic Engineering is preferred Company Description Renesas is a global semiconductor company providing hardware and software solutions for a range of cutting-edge technologies including self-driving cars, robots, automated factory equipment, and smart home applications. We are a key supplier to the world s leading manufacturers of electronics you rely on every day; you may not see our products, but they are all around you. Renesas is a global, multi-billion dollar, publicly traded company headquartered in Japan, and has subsidiaries in 20 countries worldwide. Renesas is a dynamic, multi-cultural technology company where employees learn, mentor, innovate and thrive. Renesas is extending our share in fast-growing data economy-related markets such as infrastructure and data center and strengthening our presence in the industrial/IOT and automotive segments. Our solutions drive products developed by major innovators around the world. Join us and build your future by being part of what s next in electronics.

Technical Manager role requiring 15+ years of experience of Digital design in Analog Mixed signal ICs for developing Power Management ICs as part of 2. 6B$ Power Business Unit at Renesas. Primary responsibilities include leading team which will fully own defining the microarchitecture to developing all Digital components of power management ICs, starting from System requirements. Due to the complex nature of Chips and significant Analog as well as Digital contents, collaboration with cross-functional teams to ensure successful integration of Digital and Analog components in ICs, is a must. The candidate will work on a wide range of exciting and cutting edge PMICs, including Linear and Switching DC-DC converters powering the next generation of most sought-after phones and handheld devices. This is an early-stage growth opportunity where in the candidate will get to learn, build and over time contribute and influence the charter for Renesas s massive Power product portfolio. Essential Functions: Manage the Digital Design team in terms of costs, methods and staffing to support device/silicon design requirements and to meet design deadlines as set by the program schedule. Mentor direct reports, giving appropriate guidance and support, and reviewing technical and behavioural performance regularly Must have experience of defining Dig-Ana boundary and Digital design scope for Power Management ICs/Analog intensive ICs Must have experience of defining the micro-architectures and sub-blocks for the ICs to ensure optimized Digital design, RTL design and Gate level netlist etc. Must be aware of Power Sensitive digital design and doing Power estimation for the Digital I/Ps Must be able to handle Clock Domain Crossing across multiple clock domains seamlessly and in a glitch free manner. Should be able to lead/collaborate for Logic Synthesis, Formal verification, Power estimation and STA. Should have experience of OTP, MTP, Efuse read/writes, controller design and data bus handling, Register read/write, Trimming of Analog parts/functions, DFT architecture and integration. Should be able to create Sequences (including Power UP/Down) and State Machines and Transitions to/from any state to another based on the IC requirements. Should be an expert of one or more Power Chip Communication I/Ps and protocols e. g. I2C, PMBUS, SVI3, SVID etc. Should be able to implement and analyse filters feedback loops in Digital, conversant with Z-domain analysis. Must have done multiple silicon debugs, root cause analysis of issues, design to silicon correlation etc. Should understand commonly used control loop architectures (Constant Freq, Constant ON/OFF Time, Current mode etc) and pros/limitations of each. Must be able to bring in innovative ideas to improve designs to meet challenging specifications and achieve better system performance. Should be able to setup Digital design flows and methodologies including checklists, reviews to ensure quality designs and take them all the way to Silicon success. Qualifications Bachelor s or master s degree in electrical engineering 15+ years in Digital Design and experience of working on Mixed Signal ICs, especially PMICs. Solid understanding and design experience of complex AMS designs. Chip design, Verification, Silicon validation, debugs, Qual support and taking ICs to production. Must be a technical leader, people manager team player, mentor and should strive towards fostering a highly creative and productive working environment Collaboration with Senior leadership to develop team objectives in accordance with wider company strategy. Ability to work with Senior Management to develop and work to budget. Cross cultural awareness and sensitivity. Results-oriented and able to deliver on-time under tight schedule pressure. Company Description Renesas is one of the top global semiconductor companies in the world. We strive to develop a safer, healthier, greener, and smarter world, and our goal is to make every endpoint intelligent by offering product solutions in the automotive, industrial, infrastructure and IoT markets. Our robust product portfolio includes world leading MCUs, SoCs, Analog and power products, plus Winning Combination solutions that curate these complementary products. We are a key supplier to the world s leading manufacturers of electronics you rely on every day; you may not see our products, but they are all around you. Renesas employs roughly 21, 000 people in more than 30 countries worldwide. As a global team, our employees actively embody the Renesas Culture, our guiding principles based on five key elements: Transparent, Agile, Global, Innovative, and Entrepreneurial. Renesas believes in, and has a commitment to, diversity and inclusion, with initiatives and a leadership team dedicated to its resources and values. At Renesas, we want to build a sustainable future where technology helps make our lives easier. Join us and build your future by being part of what s next in electronics and the world.

Join the Wireless Technologies and Ecosystems (WTE) team and be part of a best-in-class team of engineers, working with multi-functional teams to drive innovation and develop products used by millions worldwide. We are looking for a highly reciprocal individual who can excel in a high-paced environment. Be ready to make something extraordinary when you come here. Dynamic, encouraging people and innovative, industry-defining technologies are the norm at Apple. The people who work here have reinvented and defined entire industries with our products and services. The same real passion for innovation also applies to our business practices - strengthening our dedication to leave the world better than we found it. You should join Apple if you want to help deliver the next amazing Apple product. Description Apple s Cellular Software team is seeking talented, highly motivated and disciplined engineers to work across layers on groundbreaking cellular technologies. The position involves identifying and/or developing core cellular technologies that solves everyday problems for customers using iPhone, iPad, Watch and other wireless product lines. We are passionate about keeping our users connected 24/7 wherever they go. This team takes pride in not just coming up with proven software designs but also in disrupting traditional models of the cellular ecosystem. We do whatever it takes to bring user experience to the next level. Our members enjoy the flexibility to work on all aspects of Cellular Protocol software - SIM, NAS, AS and iOS interfaces, to come up with the best possible solution for any given problem. Cellular Power Team is responsible for developing platform power management SW across all the Apple Cellular Modem chips. Team is responsible to verify and enable all the platform as well as RAT power features with the end goal of delivering the best power KPIAre you equally passionate about cellular technologies and have the dream to work on groundbreaking cellular technologies? Then we are looking for you. As part of this team you will impact iPhone user experience worldwide. 3-10 years of experience in wireless product development Experienced in doing low level driver development for cellular modem products Expertise in the area of modem power management system & power flows Strong expertise in design and implementation of modem power management drivers Strong Software Engineering skills including design, programming (using C, C++), scripting (Python preferred, Perl) and debugging Preferred Qualifications Experience in trouble shooting complex race conditions between SW and HW power management flows Hands-on experience in debugging of modem products. Highly motivated and self-directed Excellent debugging skills. Hands-on experience in debugging of modem products. Thrive in a collaborative environment and can clearly communicate while confidently driving multiple projects across many teams. Obsessively passionate and inquisitive, and seek to solve everyday problems in innovative ways. Laser-focused on the smallest details that are meaningful to our customers.

Energy feeds on energy. If you flourish in a fast paced, results-oriented environment, if you want to achieve individual success within a team first organization, and if you believe you can contribute and succeed in a demanding yet collegial atmosphere, then Lattice may well be just what you re looking for. Responsibilities & Skills Lattice is seeking candidates for the position of Senior Staff Software Development Engineer. This is a full-time position located in Pune, India. Accountabilities: Develop and deliver state-of-art database and software infrastructure for world-class ease-of-use FPGA software tool for small, mid-range and large FPGA products. Develop software capabilities for next generation of FPGA products. Support and maintain existing FPGA design tools. Contribute to Spec and Plan process - review marketing requirement documents, generate functional specifications and developer unit test plans to ensure quality software. Improve development methodologies and processes. Qualifications: BS/MS/PhD Electrical Engineering or Computer Science 12+ years of experience in large-scale software development for engineering application domains preferably in FPGA/ASIC EDA domains. Must be proficient with C++. Modern C++ proficiency is a plus. Strong background in object-oriented programming, data structures and algorithms, and graph theory Experience of working on multiple platforms - at least Linux and Windows - is required. Knowledge of shell, TCL or Python scripting is a plus. Familiarity with commercial FPGA software tools and design flow is a plus. Knowledge in FPGA logic design is a plus. Must be detail oriented and possess independent problem-solving skills. Must be able to drive projects and lead a discussion. Strong written and verbal communication skills, and collaboration skill with the ability to work with multiple groups. Lattice recognizes that employees are its greatest asset and the driving force behind success in a highly competitive, global industry. Lattice continually strives to provide a comprehensive compensation and benefits program to attract, retain, motivate, reward and celebrate the highest caliber employees in the industry. Lattice is an international, service-driven developer of innovative low cost, low power programmable design solutions. Our global workforce, some 800 strong, shares a total commitment to customer success and an unbending will to win. For more information about how our FPGA , CPLD and programmable power management devices help our customers unlock their innovation, visit www.latticesemi.com . You can also follow us via Twitter , Facebook , or RSS . At Lattice, we value the diversity of individuals, ideas, perspectives, insights and values, and what they bring to the workplace. Applications are welcome from all qualified candidates. Lattice Feel the energy.

Not Applicable Specialism Managed Services & Summary . In climate and energy at PwC, you will focus on providing consulting services related to climate change mitigation and adaptation, as well as energy efficiency and renewable energy solutions. You will analyse client needs, develop strategies to reduce greenhouse gas emissions, and offer guidance and support to help clients transition to a lowcarbon economy. Why PWC At PwC, you will be part of a vibrant community of solvers that leads with trust and creates distinctive outcomes for our clients and communities. This purposeled and valuesdriven work, powered by technology in an environment that drives innovation, will enable you to make a tangible impact in the real world. We reward your contributions, support your wellbeing, and offer inclusive benefits, flexibility programmes and mentorship that will help you thrive in work and life. Together, we grow, learn, care, collaborate, and create a future of infinite experiences for each other. Learn more about us . A career within General Consulting services, will provide you with the opportunity to help clients seize essential advantages by working alongside business leaders to solve their toughest problems and capture their greatest opportunities. We work with some of the world s largest and most complex companies to understand their unique business issues and opportunities in an everchanging environment. We help create sustainable change by stimulating innovation, unlocking data possibilities, navigating risk and regulatory complexity, optimizing deals, and aligning costs with business strategy to create a competitive advantage. s As a Manager, youll work as part of a team of problem solvers, helping to solve complex business issues from strategy to execution. PwC Professional skills and responsibilities for this management level include but are not limited to You will be working across functional teams (internal and client), across the business and Renewable Energy sector value chain, supporting the team in developing and delivering operations strategies in the Renewable sector. Develop yourself personally, taking a keen interest in trends in energy and other sectors and the impact on our clients so you can help shape their thinking and our success in the market. Prepare quality reports, presentations and other client deliverables. Exposure to data gathering techniques and analysis, and reporting insights in a clear Mandatory skill sets Financial Modeling, Bid Management, Feasibility Analysis, Due diligence, Power, Power Market, Energy trading, Energy Portfolio Management. Preferred skill sets Use feedback and reflection to develop self awareness, personal strengths and address development areas. Demonstrate critical thinking and the ability to bring order to unstructured problems. Use a broad range of tools and techniques to extract insights from current industry or sector trends. Years of experience required 7 years Education qualification B.tech + MBA Education Degrees/Field of Study required Master of Business Administration, Bachelor of Engineering Degrees/Field of Study preferred Required Skills Power Management Optional Skills Accepting Feedback, Accepting Feedback, Active Listening, Analytical Thinking, Carbon Accounting, Carbon Footprint, Carbon Offsets, Carbon Pricing and Trading, Carbon Taxes and Incentives, Climate Change Adaptation Program Design, Climate Change Impacts and Risks, Climate Change Scenarios, Climate Finance, Climate Policy, Climate Reporting, Coaching and Feedback, Communication, Creativity, Embracing Change, Emission Trading, Emotional Regulation, Empathy, Energy Efficiency, Energy Policy and Regulation, Energy Transition {+ 15 more} Travel Requirements Government Clearance Required?

Our vision is to transform how the world uses information to enrich life. Join an inclusive team focused on one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solution we create help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can spark the very innovation we are pursuing. As a Memory Circuit Design Verification Engineer, you will work in a highly innovative, motivated, young and dynamic design team capable of verifying complete products using state of the art memory technologies. You will need to have the ability to evaluate full chip and/or block level functionality and provide solutions to help the timely delivery of a functionally correct design. Unique Opportunities Complete ownership of verification and end to end analysis of complex full chip gate level custom designs with advanced low power and power management technologies spread across multiple categories such as DDR4, LPDDR4,DDR5 and LPDDR5 that are capable of operating at high speeds of up to 6400MT/s. Collaborate closely with design and verification team members spread across the globe, many of whom have decades of experience in memory design. Work on cross functional tasks that can widen your skill set. About Team For nearly 40 years, Micron Technology, Inc. has redefined innovation with the world s most advanced memory and semiconductor technologies. we're an international team of visionaries and scientists, developing groundbreaking technologies that are transforming how the world uses information to enrich life. Our Global team is growing and we are looking for a passionate Memory Circuit Design & Verification Engineer in Micron Technology s DRAM and Emerging Memory Group (DEG) in India. Responsibilities Participate in simulating, analyzing and debugging pre-silicon full chip designs by applying leading edge verification technique Develop Test cases/Stimulus to increase the functional coverage for all DRAM and emerging memory architectures and features. Develop and maintain test benches and test vectors using simulation tools and run regressions for coverage analysis and improvements. Co-work with international colleagues on developing new verification flows to take on the challenges in DRAM and emerging memory design. Participate in developing verification methodology and verification environments for advanced DRAM and emerging memory products. Core Requirements Analytical capability for complex gate level circuit designs Basic understanding of CMOS circuit designs Familiar with both SPICE and Verilog simulations Good communication skills and ability to work we'll in a team Education Bachelors or Post Graduate Degree in Electronics Engineering or related engineering field required