Layout Designer

Position: Layout / Mask Designer

Experience: 4–6 Years

Location: Hyderabad (Work from Office)

Open Positions: 7

Interview Mode: Only Face-to-Face (Mon/Tue next week)

About the Role:

The client is hiring experienced Layout/Mask Designers skilled in advanced process nodes. The role involves custom layout design for critical analog, mixed-signal, and custom digital blocks, along with full-chip integration and high-quality, on-time delivery.

Technical Requirements:

Technology Experience

TSMC 16/12nm, 7nm, 5nm, 3nm & below

Experience with Intel, Samsung, GF also acceptable

Strong preference for TSMC 5nm / 3nm

Responsibilities:

Layout design & development for analog, mixed-signal, and custom digital blocks

Full-chip level layout integration support

Ensure timely delivery with high quality & compliance to design rules

Verification Expertise:

Strong understanding of:

LVS, DRC, DFM, Antenna Check, EM/IR

Tools:

Cadence VLE/VXL

Mentor Calibre DRC/LVS (Mandatory)

Qualifications:

BE / MTech in Electronics, VLSI, or related engineering fields

Additional Skills:

Good communication & cross-functional collaboration

Ability to work independently

Hands-on experience in advanced/lower nodes

Experience with HBM, regulators, charge pumps, power management — added advantage

Top Mandatory Skills:

Custom layout design for Analog / Mixed-Signal / Custom Digital

Advanced node experience: TSMC 7nm / 5nm / 3nm

Cadence VLE/VXL

Calibre DRC / LVS verification

Strong understanding of DRC, LVS, DFM, Antenna, EMIR

Secondary Skills:

Experience with HBM, regulators, charge pumps, PMIC

Full-chip integration