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Hardware Engineer - FPGA, RTL Design, Verilog

Hardware Engineer - FPGA, RTL Design, Verilog

Name: Jobpe
Address: T-Hub, Plot No 1/C, Sy No 83/1, Raidurgam panmaktha, Knowledge City Rd, Hyderabad, Telangana, 500081, IN
Telephone: +91-83339-09630
Price range: Free

Cisco

7 - 12 years

14 - 19 Lacs

bengaluru

Posted:2 days ago| Platform:

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Skills Required

design verification oops system verilog uvm verilog simulation vhdl microservices rtl design axi fpga vmm debugging assertions fpgas asic code coverage altera version control hardware engineering rtl asic design lint ethernet pcie logic design

Work Mode

Work from Office

Job Type

Full Time

Job Description

Meet the Team

We are part of the Hardware Platform Group, with our team specializing in FPGA verification. Our work spans both sophisticated data-path and challenging control-path FPGAs. The verification process includes crafting the DV architecture, test plan, and coverage plan, all the way through to final DV sign-off. We leverage industry-standard tools for simulation, linting, coverage, and assertions, incorporating various quality metrics to ensure a robust process. Our ultimate goal is to deliver bug-free RTL for first-pass success on the board. Additionally, we collaborate closely with our remote teams based in US and Italy.

Your Impact

Lead and mentor a team of verification engineers, driving the development of robust test benches, coverage plans, and constrained random tests.
Ensure high-quality and reliable FPGA/ASIC designs through sophisticated verification techniques and comprehensive debugging.
Contribute to the adoption and evolution of ground breaking verification methodologies like UVM/VMM, improving team efficiency and performance.
Partner with architects, logic designers, and software engineers to align on architecture, micro-architecture, and system-level requirements.
Play a pivotal role in delivering next-generation, high-performance FPGA and ASIC products for Ciscos networking solutions.
Ensure product reliability and performance, strengthening Ciscos reputation and customer trust in its hardware solutions.

Minimum Qualifications

Bachelor's Degree / Master's Degree in Electrical or Computer Engineering with 7+ years of experience in design verification.
Proficiency in OOPs, Verilog & System Verilog.
Confirmed verification skills : FPGA, planning, problem solving, debug, adversarial testing and random testing
Project based work experience with UVM/VMM methodologies.
You will have experience with architecting the testplan & test bench.

Preferred Qualifications

Hands on experience with Ethernet based protocols, PCIe, AXI, memory controllers, OTN etc. will be an added advantage.
Familiarity with VCS simulation flow, knowledge of coverage & assertions is desirable.

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Hardware Engineer - FPGA, RTL Design, Verilog