Analog Design Engineer

Role:

Experience:

Location:

• Industry experience in Mixed-Signal layout design, holding bachelor's degree in electrical/Electronic Engineering.
• To work independently on block levels analog layout design from schematic, estimating the Area, Optimizing Floorplan, Routing and Verifications.
• Firsthand experience in Critical Analog Layout design of blocks such as Temperature sensor, Serdes, PLL, ADC, DAC, LDO, Bandgap, Ref Generators, Charge Pump, Current Mirrors, Comparator, Differential Amplifier etc.,
• Good at LVS/DRC debugging skills and other verifications for lower technology nodes like 14nm FinFet and below.
• Good understanding of Matching, EM, ESD, Latch-Up, Shielding, Parasitic and short channel concepts.
• Familiar with EDA tools like Cadence VLE/VXL, PVS, Assura and Calibre DRC/ LVS is a must.
• Understanding layout effects on the circuit such as speed, capacitance, power and area etc.,
• Ability to understand design constraints and implement high-quality layouts.
• Good people skills and critical thinking abilities to resolve the issue technically, and professionally.

Minimum Educational Qualification:

Requirements

Preferred Qualifications:

• Experience in analog/custom layout design in advanced CMOS process(2+ years FinFet experience must)
• Expertise in Cadence VLE/VXL,PVS, Assura and Calibre DRC/ LVS is a must.
• Should have hands on experience of Critical Analog Layout design of blocks such as Temperature sensor, Serdes, PLL, ADC, DAC, LDO, Bandgap, Ref Generators, Charge Pump, Current Mirrors, Comparator, Differential Amplifier etc.,
• Good understanding of Analog Layout fundamentals (e.g. Matching, Electro-migration, Latch-up, coupling, crosstalk, IR-drop, active and passive parasitic devices etc.)
• Ability to understand design constraints and implement high-quality layouts.
• Multiple Tape out support experience will be an added advantage.

Role And Responsibilities

• Responsible for Design and development of critical analog, mixed-signal, custom digital block and full chip level integration support.
• Perform layout verification like LVS/DRC/Antenna, EM, quality check and documentation.
• Responsible for on-time delivery of block-level/top-level layouts with acceptable quality.
• Skill in planning, area/time estimation, scheduling, delegation and execution to meet project schedule/milestones in multiple project environment.
• Should have good experience in working with cross-functional team.
• Manage and resolve technical roadblocks/ escalations to timely deliverable with high quality.
• Offer alternative solutions to clients (where appropriate) with the objective of retaining customers and clients business.
• Build people capability to ensure operational excellence and maintain superior customer service levels of the existing account/client.
• Effectively communicating with engineering teams in different Geographical locations to assure the success of the layout project.