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3.0 - 7.0 years
0 Lacs
hyderabad, telangana
On-site
The position of Engineer, DEG Layout at Micron Technology involves working with an international team of visionaries and scientists to develop groundbreaking technologies that enrich life through the transformation of information. As a Senior Layout Engineer, you will collaborate with peer teams globally to meet project milestones and deliver high-quality layouts in a multiple projects-based environment. Responsibilities include designing and developing critical analog, mixed-signal, custom digital blocks, and providing full chip level integration support. You will be responsible for layout verification, quality check, documentation, and ensuring on-time delivery of block-level layouts. Additionally, you will demonstrate leadership skills in planning, scheduling, delegation, and execution to meet project milestones. Guiding junior team members, contributing to effective project management, and communicating with engineering teams globally are also key aspects of the role. The ideal candidate should have at least 3 years of experience in analog/custom layout design in advanced CMOS process. Expertise in Cadence VLE/VXL and Calibre DRC/LVS is essential. Hands-on experience in designing critical analog blocks such as Temperature sensor, PLL, ADC, DAC, LDO, and others is required. A good understanding of Analog Layout fundamentals, layout effects on the circuit, design constraints, and high-quality layouts implementation is necessary. Experience with physical layout verification, multiple tape outs, scripting, and automation is advantageous. Excellent communication skills and a degree in Electronic/VLSI Engineering are also required. Micron Technology, Inc. is a leader in memory and storage solutions, driving innovation to enrich life for all. With a focus on technology leadership, Micron delivers high-performance DRAM, NAND, and NOR memory and storage products through its Micron and Crucial brands. The company's innovations fuel the data economy, enabling advances in artificial intelligence and 5G applications. To know more about career opportunities at Micron, visit micron.com/careers. For assistance with the application process or reasonable accommodations, contact hrsupport_in@micron.com. Micron strictly prohibits the use of child labor and complies with all applicable laws and labor standards.,
Posted 14 hours ago
4.0 - 15.0 years
0 Lacs
andhra pradesh
On-site
You will be joining Eximietas Design as a Senior Analog Circuit Design Engineer/Lead with 4-15 years of experience. You should have a strong background in CMOS Analog design fundamentals, including designing circuit blocks such as OTA, Charge Pump, Bandgap Reference, Ring Oscillator, LC-VCO, etc. Additionally, you will be working on designing SERDES blocks like TIA, DRV, P2S, Serializer, RCOMP, Calibration blocks, Receiver Front end, CTLE, DFE, CDR Loop, Phase Interpolators, Deserializer, S2P, FFEs, Pre drivers, level shifters, V2I circuits Slicers, Samplers, and other custom building blocks. Proficiency in using Cadence Virtuoso Schematic and Layout editors is required, along with a good understanding of MOS device operation. Your responsibilities will include designing various analog/mixed-signal circuits to meet target specifications, laying out the designed circuits while considering the impact of parasitics on circuit specifications, measuring designs on hardware and analyzing the results, analyzing the impact of device characteristics on circuit-level performance, understanding critical circuit specifications for achieving system-level performance, and assisting in automation and efficiency projects. If you are an Engineer with the required experience and skills, please share your updated resume with maruthiprasad.e@eximietas.design.,
Posted 1 day ago
8.0 - 15.0 years
0 Lacs
karnataka
On-site
Greetings from Eximietas Design! We are looking for a Senior Analog IC Circuit Lead/Architect with 8-15 years of experience to join our team in Bengaluru & Visakhapatnam. As a potential candidate, you should possess a strong background in CMOS Analog design fundamentals. Your expertise should cover designing various circuit blocks such as OTA, Charge Pump, Bandgap Reference, Ring Oscillator, LC-VCO, etc. Additionally, experience in designing SERDES blocks like TIA, DRV, P2S, Serializer, RCOMP, Calibration blocks, Receiver Front end, CTLE, DFE, CDR Loop, Phase Interpolators, Deserializer, S2P, FFEs, Pre drivers, level shifters, V2I circuits Slicers, Samplers, and other custom building blocks is essential. Proficiency in using Cadence Virtuoso Schematic and Layout editors is also required. A good understanding of MOS device operation is expected. Your responsibilities will include designing analog/mixed-signal circuits to meet target specifications, performing layout of the circuits and analyzing the impact of parasitics on circuit specifications, measuring the design on hardware and analyzing the results, understanding the impact of device characteristics on circuit-level performance, identifying critical circuit specifications for achieving system-level performance, and contributing to automation and efficiency projects. If you are an Engineer with the required experience and skills, we encourage you to share your updated resume with us at maruthiprasad.e@eximietas.design. We look forward to potentially having you join our team!,
Posted 1 day ago
8.0 - 15.0 years
0 Lacs
hyderabad, telangana
On-site
You will be joining Micron Technology's HBM Team in Hyderabad, India as a Layout Design Engineer. In this role, you will be responsible for designing and developing critical analog, mixed-signal, custom digital blocks, and providing full chip level integration support. Your expertise in Cadence VLE/VXL and Mentor Graphic Calibre DRC/LVS is essential for this position. You will work on intensive applications such as artificial intelligence and high-performance computing solutions, specifically focusing on High Bandwidth Memory. Your responsibilities will include layout verification such as LVS/DRC/Antenna, quality checks, and documentation ensuring on-time delivery of block-level layouts with acceptable quality. Additionally, you will lead junior team members, contribute to effective project management, and communicate effectively with global engineering teams. To be successful in this role, you should have 8 to 15 years of experience in analog/custom layout design in advanced CMOS processes across various technology nodes. Your hands-on experience with critical blocks like Temperature sensor, PLL, ADC, DAC, LDO, Bandgap, Ref Generators, Charge Pump, Current Mirrors, Comparator, Differential Amplifier, etc., will be valuable. Understanding analog layout fundamentals, design constraints, and layout effects on circuits is crucial for this position. You should possess excellent command and problem-solving skills in physical verification of custom layout, multiple tape-out support experience, and the ability to manage multiple layout projects while ensuring quality checks are performed at all stages of layout development. Strong verbal and written communication skills are necessary to collaborate effectively with global teams. As a Layout Design Engineer at Micron Technology, you will play a key role in developing groundbreaking technologies that enrich life by transforming how the world uses information. Micron is an industry leader in innovative memory and storage solutions, driving advancements in artificial intelligence and 5G applications. If you are highly motivated, detail-oriented, and passionate about IC layout design, this opportunity is for you. Education requirements for this position include a BE or MTech in Electronic/VLSI Engineering. If you are ready to be part of a visionary team that is shaping the future of information technology, visit micron.com/careers to learn more and apply. Micron Technology, Inc. strictly prohibits the use of child labor and complies with all applicable laws, rules, regulations, and international labor standards. For assistance with the application process or accommodations, please contact hrsupport_india@micron.com.,
Posted 2 weeks ago
8.0 - 15.0 years
0 Lacs
hyderabad, telangana
On-site
Our client, Micron Technology, a global leader in memory and storage solutions, is seeking a Layout Design Engineer to join their HBM Team in Hyderabad, India. As a Layout Design Engineer at Micron Technology, you will play a crucial role in developing innovative technologies for applications such as artificial intelligence and high-performance computing solutions, specifically High Bandwidth Memory. In this position, you will collaborate with cross-functional teams across Micron's global footprint on multiple projects. Responsibilities include designing and developing critical analog, mixed-signal, and custom digital blocks, as well as providing full chip level integration support. You will be responsible for layout verification, quality checks, documentation, and ensuring on-time delivery of block-level layouts. Additionally, you will demonstrate leadership skills in project planning, scheduling, and execution, while also guiding junior team members and contributing to effective project management. The ideal candidate will have 8 to 15 years of experience in analog/custom layout design in advanced CMOS processes, expertise in tools such as Cadence VLE/VXL and Mentor Graphic Calibre DRC/LVS, and hands-on experience in creating layouts for critical blocks. A strong understanding of analog layout fundamentals, design constraints, and layout effects on circuits is required. Excellent communication and problem-solving skills, as well as experience in managing multiple layout projects, are also desired qualifications. Candidates should hold a BE or MTech in Electronic/VLSI Engineering. Micron Technology is known for its relentless focus on customer satisfaction, technological leadership, and operational excellence. If you are passionate about innovation and want to be part of a dynamic team shaping the future of memory and storage solutions, we encourage you to apply. To learn more about Micron Technology, Inc. and explore career opportunities, visit micron.com/careers. For assistance with the application process or accommodations, please contact hrsupport_india@micron.com. Micron Technology is committed to ethical practices and complies with all applicable labor laws and standards, including prohibiting the use of child labor.,
Posted 4 weeks ago
6.0 - 10.0 years
0 Lacs
hyderabad, telangana
On-site
As a Senior Engineer in Micron Technology's HIG HBM team, you will play a crucial role in the design and development of critical analog, mixed-signal, custom digital blocks, and full chip level integration support. Your responsibilities will include layout verification such as LVS/DRC/Antenna, quality check, and support documentation. You will be expected to deliver block-level layouts on time with acceptable quality and demonstrate leadership qualities in planning, area/time estimation, scheduling, and execution to meet project milestones in a multiple project environment. Collaboration with peer teams across Micron's global footprint is essential, and you will be required to guide junior team members in executing sub block-level layouts and review critical items. Effective communication with global engineering teams to ensure the success of layout projects is also a key aspect of this role. Additionally, you will contribute to effective project management and problem-solving in the physical verification of custom layout designs. To qualify for this role, you should have 6 to 9 years of experience in analog/custom layout design in advanced CMOS processes across various technology nodes. Expertise in tools like Cadence VLE/VXL and Mentor Graphic Calibre DRC/LVS is a must. Hands-on experience in creating layouts of critical blocks such as Temperature sensor, PLL, ADC, DAC, LDO, Bandgap, Ref Generators, Charge Pump, Current Mirrors, Comparator, Differential Amplifier, etc., is required. A good understanding of Analog Layout fundamentals and layout effects on circuits is essential, along with the ability to implement high-quality layouts based on design constraints. A BE or MTech in Electronic/VLSI Engineering is the preferred educational background for this role, although exceptionally talented Diploma holders in electronic or VLSI engineering will also be considered. Micron Technology, Inc. is a global leader in innovative memory and storage solutions, driving the transformation of information into intelligence. Our relentless focus on technology leadership and operational excellence enables us to deliver high-performance DRAM, NAND, and NOR memory and storage products through our Micron and Crucial brands. Our innovations fuel the data economy, supporting advances in artificial intelligence and 5G applications across various platforms. If you are looking to be part of a dynamic team that is shaping the future of technology, visit micron.com/careers to learn more about opportunities at Micron Technology, Inc. For assistance with the application process or to request reasonable accommodations, please contact hrsupport_in@micron.com. Micron prohibits the use of child labor and complies with all applicable labor laws and standards.,
Posted 4 weeks ago
7.0 - 11.0 years
0 Lacs
karnataka
On-site
You will be responsible for executing customer projects independently with minimum supervision, guiding team members technically in various fields of VLSI Frontend Backend or Analog design. As an individual contributor, you will take ownership of tasks/modules such as RTL Design, Module Verification, PD, DFT, Circuit Design, Analog Layout, STA, Synthesis, Design Checks, Signoff, etc., leading the team to achieve results. Your responsibilities will include completing assigned tasks successfully and on-time within the defined domain(s), anticipating, diagnosing, and resolving problems, coordinating with cross-functional teams as necessary, delivering on-time quality work approved by the project manager and client, automating design tasks flows, writing scripts to generate reports, and coming up with innovative ideas to reduce design cycle time and cost accepted by UST Manager and Client. Additionally, you will be expected to write papers, file patents, and devise new design approaches. Your performance will be measured based on the quality of deliverables, timely delivery, reduction in cycle time and cost, number of papers published, number of patents filed, and number of trainings presented to the team. You will be expected to ensure zero bugs in the design/circuit design, deliver clean design/modules for ease of integration, meet functional specifications/design guidelines without deviation, and document tasks and work performed. Furthermore, you will be responsible for meeting project timelines, facilitating other team members" progress by delivering intermediate tasks on time, and seeking help and support in case of any delays. Your role will also involve active participation in team work, supporting team members as needed, anticipating when support may be required, and being able to explain project tasks and support delivery to junior team members. Your creativity and innovation will be showcased through tasks such as automating processes to save design cycle time, participating in technical discussions, training forums, white paper or patent filings, and contributing to technical discussions. Your skill set should include proficiency in languages and programming skills such as System Verilog, Verilog, VHDL, UVM, C, C++, Assembly, Perl, TCL/TK, Makefile, Spice, and familiarity with EDA Tools like Cadence, Synopsys, Mentor tool sets, and various simulators. You should have strong technical knowledge in IP Spec Architecture Design, Micro Architecture, Bus Protocols, Physical Design, Circuit Design, Analog Layout, Synthesis, DFT, Floorplan, Clocks, P&R, STA, Extraction, Physical Verification, Soft/Hard/Mixed Signal IP Design, and Processor Hardening. Additionally, you should possess communication skills, analytical reasoning, problem-solving skills, and the ability to interact effectively with team members and clients. Your knowledge and experience should reflect leadership and execution of projects in areas such as RTL Design, Verification, DFT, Physical Design, STA, PV, Circuit Design, Analog Layout, and understanding of design flow and methodologies. Independent ownership of circuit blocks, clear communication, diligent documentation, and being a good team player are essential attributes for this role. Overall, your role will involve circuit design and verification of Analog modules in TSMC FinFet technologies, developing circuit architecture, optimizing designs, verifying functionality, performance, and power, as well as guiding layout engineers. Strong problem-solving skills, results orientation, attention to detail, and effective communication will be key to your success in this position.,
Posted 1 month ago
8.0 - 12.0 years
0 Lacs
karnataka
On-site
As an experienced professional with 7-9 years of experience, you will be responsible for executing customer projects independently with minimal supervision in the field of VLSI Frontend Backend or Analog design. Your role will involve guiding team members technically and taking ownership of specific tasks/modules related to RTL Design, Module Verification, PD, DFT, Circuit Design, Analog Layout, STA, Synthesis, Design Checks, and Signoff. You will lead the team to achieve results, complete assigned tasks successfully and on-time, and anticipate, diagnose, and resolve problems as necessary. Your responsibilities will also include ensuring on-time quality delivery approved by the project manager and client, automating design tasks flows, writing scripts to generate reports, and coming up with innovative ideas to reduce design cycle time and cost. Additionally, you will be expected to write papers, file patents, and devise new design approaches. To measure the outcomes of your work, quality will be verified using relevant metrics by UST Manager/Client Manager, timely delivery will be assessed based on relevant metrics, and the reduction in cycle time and cost using innovative approaches will be monitored. The number of papers published, patents filed, and trainings presented to the team will also be considered. Your outputs are expected to demonstrate high quality deliverables with zero bugs in the design/circuit design, clean delivery of the design/module, meeting functional specs/design guidelines without deviation, and thorough documentation of tasks and work performed. Timely delivery, teamwork, innovation, and creativity will be key aspects of your role, along with participation in technical discussions and training forums. Your skills should include proficiency in languages and programming skills such as System Verilog, Verilog, VHDL, UVM, C, C++, Assembly, Perl, TCL/TK, and Makefile. You should have experience with EDA tools like Cadence, Synopsys, and Mentor tool sets, as well as technical knowledge in IP spec architecture design, bus protocols, physical design, circuit design, analog layout, synthesis, DFT, floorplan, clocks, P&R, STA, extraction, physical verification, and more. Strong communication skills, analytical reasoning, problem-solving abilities, attention to detail, and the ability to interact with team members and clients effectively are essential. You should also be well-versed in using available EDA tools, delivering tasks on time per quality guidelines, understanding standard specs and functional documents, and continuously learning new skills as needed. If you have led and executed projects in RTL Design, Verification, DFT, Physical Design, STA, PV, Circuit Design, Analog Layout, and possess a good understanding of design flow and methodologies, this role could be a great fit for you. Additionally, experience in analog circuit design and verifications, knowledge of TSMC FinFet technologies, and familiarity with Cadence Virtuoso circuit design suite would be beneficial. In this role, you will be responsible for circuit design and verification of analog modules like Voltage regulator, LDOs, developing circuit architecture, optimizing designs, guiding layout engineers, problem-solving, and effective communication skills. Desired skills include solid CMOS Analog design fundamentals, hands-on experience with Cadence Virtuoso, technical knowledge of power-performance trade-offs, understanding device parameter variation, and being a good team player in a multi-site work environment. Join us at UST, a global digital transformation solutions provider, where you will work alongside the world's best companies to make a real impact through transformation. With deep domain expertise, innovation, and agility, UST partners with clients to embed innovation and create boundless impact, touching billions of lives in the process.,
Posted 1 month ago
5.0 - 10.0 years
0 Lacs
karnataka
On-site
Youzentech Technologies is currently seeking an experienced Analog IC Layout Engineer to be a part of our team in Hyderabad. If you possess 5-10 years of expertise in Custom Mixed-Signal Layout Design, we are eager to hear from you. The position is based in Hyderabad/Bangalore and requires the following qualifications and responsibilities: - Proficiency in Full Custom & Semi-Custom Analog IP & IC Layout, starting from schematic to verification - Hands-on experience with various components including Temperature Sensor, SerDes, PLL, ADC, DAC, LDO, Bandgap, Charge Pump, Current Mirrors, Differential Amplifier, and more - Skilled in LVS/DRC debugging & verification for 16FF and below nodes (TSMC, Samsung, GF) - Strong understanding of EM, ESD, Shielding, Parasitic, and Layout-dependent effects - Familiarity with Cadence, Calibre, Assura, Redhawk, and Totem for verification purposes - Experience in supporting multiple Tape-outs and collaborating with cross-functional teams - Knowledge of Layout automation (SKILL/PERL) would be an added advantage - Mandatory experience with TSMC 7nm technology If you meet the requirements and are interested in this opportunity, please share your resume with us at amith.m@youzentech.com.,
Posted 1 month ago
8.0 - 13.0 years
35 - 100 Lacs
Hyderabad
Work from Office
Role & responsibilities Expertise in Cadence VLE/VXL and Mentor Graphic Calibre DRC/LVS is a must. Should have hands on experience in creating layout of critical blocks such as Temperature sensor, PLL, ADC, DAC, LDO, Bandgap, Ref Generators, Charge Pump, Current Mirrors, Comparator, Differential Amplifier etc., Good understanding of Analog Layout fundamentals (e.g., Matching, Electro-migration, Latch-up, coupling, crosstalk, IR-drop, active and passive parasitic devices etc.) Understanding layout effects on the circuit such as speed, capacitance, power and area etc., Ability to understand design constraints and implement high-quality layouts. Ability to understand design hierarchy and different architectures for Memory designs. Excellent command and problem-solving skills in physical verification of custom layout. Multiple Tape out support experience will be an added advantage. Prefer to have expertise in PERL/SHELL/SKILL. Experience of Virtuoso, IC compiler, Finesim, ANSYS Totem, and Signal Integrity is advantageous. Experience in managing multiple layout projects, ensuring quality checks are taken care at all stages of layout development. Excellent verbal and written communication skills.
Posted 2 months ago
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