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You should have a B.Tech/M.Tech degree along with more than 5 years of industry experience in analog/mixed signal behavioral modeling across different levels of abstraction and full chip verification (AMS and DMS DV). Your role will involve a deep understanding of analog design principles and mixed signal design architectures. Exposure to products integrating various Analog/Mixed-Signal/RF building blocks like Power Management, ADCs, DACs, PLL, bandgap references, oscillators, SerDes, RF Transceiver, etc., and related digital control and signal processing is essential. Your responsibilities will include devising verification strategies based on product requirements and design specifications, creating models for analog/mixed-signal blocks, validating models against actual designs, developing verification plans and environments, and implementing self-checking test cases. You will collaborate with cross-disciplinary team members for first-pass silicon success and provide support for post-silicon validation. It is crucial that you have demonstrated experience in verification plan development, verification environment setup, and verification/debug of complex mixed signal products at block and chip-top levels. Proficiency in co-simulations with analog model/transistor level and digital RTL/Gate+SDFs, as well as experience in circuit simulations with Spice/Fast Spice simulators, is required. You must be well-versed in industry-standard metrics for closing the verification of analog designs and possess exceptional interpersonal and communication skills to effectively collaborate and influence innovative design methodologies. The ability to manage the technical aspects of AMS team execution, mentor junior engineers, and lead AMS DV projects is also expected. Additionally, you should be quick to adapt to new technologies, possess good problem-solving skills, and be self-motivated and enthusiastic about your work.,

We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a passionate and meticulous engineer with a deep commitment to excellence in analog and high-speed mixed signal layout design. With a minimum of 2 years of hands-on experience in advanced technology nodes (5nm and below), you thrive in dynamic, collaborative environments where quality, precision, and innovation are valued above all. You are well-versed in the intricacies of SerDes, CTLE, AFE, PLL, LDO, and transmitter/receiver sub-blocks, and you relish the challenge of delivering robust designs for cutting-edge semiconductor products. You are motivated by the opportunity to work alongside some of the brightest minds in the industry, continuously learning and contributing your expertise. You are eager to be part of a team that values diversity, inclusion, and the relentless pursuit of innovation, and you bring a growth mindset that seeks to elevate those around you. Your ability to communicate effectively, adapt to evolving requirements, and deliver under tight timelines sets you apart as a trusted contributor and future leader. What Youll Be Doing: Designing and implementing high-quality analog and mixed signal layouts for advanced technology nodes (5nm and below). Collaborating closely with circuit design, verification, and physical implementation teams to optimize layout performance and manufacturability. Executing full custom layout of SerDes blocks including CTLE, AFE, PLL, LDO, and transmitter/receiver sub-blocks. Performing layout verification tasks such as DRC, LVS, and parasitic extraction to ensure compliance with design and process requirements. Participating in design reviews and providing technical input to ensure the robustness and reliability of delivered IP blocks. Documenting layout methodologies, design decisions, and best practices to drive organizational knowledge sharing. Supporting silicon debug and post-silicon validation activities as needed. The Impact You Will Have: Drive the successful delivery of high-performance, low-power analog and mixed signal IP for next-generation semiconductor products. Enable rapid time-to-market for customer solutions by ensuring first-pass silicon success through meticulous layout practices. Enhance Synopsys reputation as a leader in advanced technology node design by delivering innovative, reliable, and manufacturable layouts. Influence the development of best-in-class methodologies and automation for layout design and verification. Contribute to cross-functional learning and mentorship within a diverse, inclusive team environment. Support customer engagements and help resolve complex technical challenges, ensuring satisfaction and repeat business. What Youll Need: Minimum of 2 years of experience in analog and high-speed mixed signal layout at 5nm or below technology nodes. Proven expertise in full custom layout of SerDes blocks (CTLE, AFE, PLL, LDO, transmitter/receiver sub-blocks). Strong command of industry-standard EDA tools for layout and verification (e.g., Cadence Virtuoso, Mentor Calibre, Synopsys IC Compiler). Demonstrated ability to interpret and implement complex circuit schematics into robust, high-quality layouts. Hands-on experience with DRC, LVS, and parasitic extraction flows and methodologies. Who You Are: Detail-oriented, with a strong commitment to quality and continuous improvement. Collaborative and communicative, able to work seamlessly across multidisciplinary teams. Self-motivated and proactive, taking ownership of deliverables and driving them to completion. Flexible and adaptive, thriving in fast-paced, evolving environments. Curious, eager to learn, and enthusiastic about sharing knowledge with peers. Committed to diversity, equity, and inclusion in the workplace. The Team Youll Be A Part Of: You will join a diverse and highly skilled team of analog and mixed signal design professionals who are passionate about pushing the boundaries of semiconductor technology. The team collaborates closely with global engineering, product, and customer teams, focusing on delivering best-in-class IP for advanced technology nodes. We foster a culture of innovation, mentorship, and continuous learning, where every voice is heard and every contribution matters. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. Show more Show less

Job description About The Role Responsibilities may be quite diverse of a technical nature. U.S. experience and education requirements will vary significantly depending on the unique needs of the job. Job assignments are usually for the summer or for short periods during breaks from school. Qualifications Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.Minimum QualificationsB.E/ B.Tech Electronics/Electrical/VLSI Design Engineering with 3+ years of relevant experience in Analog and IO IP design e.g. GPIOs, Thermal Sensor, PLL, ADC/DAC/ Voltage regulators/LDOs, LVDS etc.Preferred Qualifications:Analog Device and Metal Layout FundamentalsAnalog/Mixed Signal FundamentalsReliability Verification.Cadence Virtuoso Layout Suite Inside this Business Group As the world's largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in theTechnology Development and Manufacturing Groupare part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore's Law to bring smart, connected devices to every person on Earth.

Our client, Micron Technology, a global leader in memory and storage solutions, is seeking a Layout Design Engineer to join their HBM Team in Hyderabad, India. As a Layout Design Engineer at Micron Technology, you will play a crucial role in developing innovative technologies for applications such as artificial intelligence and high-performance computing solutions, specifically High Bandwidth Memory. In this position, you will collaborate with cross-functional teams across Micron's global footprint on multiple projects. Responsibilities include designing and developing critical analog, mixed-signal, and custom digital blocks, as well as providing full chip level integration support. You will be responsible for layout verification, quality checks, documentation, and ensuring on-time delivery of block-level layouts. Additionally, you will demonstrate leadership skills in project planning, scheduling, and execution, while also guiding junior team members and contributing to effective project management. The ideal candidate will have 8 to 15 years of experience in analog/custom layout design in advanced CMOS processes, expertise in tools such as Cadence VLE/VXL and Mentor Graphic Calibre DRC/LVS, and hands-on experience in creating layouts for critical blocks. A strong understanding of analog layout fundamentals, design constraints, and layout effects on circuits is required. Excellent communication and problem-solving skills, as well as experience in managing multiple layout projects, are also desired qualifications. Candidates should hold a BE or MTech in Electronic/VLSI Engineering. Micron Technology is known for its relentless focus on customer satisfaction, technological leadership, and operational excellence. If you are passionate about innovation and want to be part of a dynamic team shaping the future of memory and storage solutions, we encourage you to apply. To learn more about Micron Technology, Inc. and explore career opportunities, visit micron.com/careers. For assistance with the application process or accommodations, please contact hrsupport_india@micron.com. Micron Technology is committed to ethical practices and complies with all applicable labor laws and standards, including prohibiting the use of child labor.,

As a Senior Engineer in Micron Technology's HIG HBM team, you will play a crucial role in the design and development of critical analog, mixed-signal, custom digital blocks, and full chip level integration support. Your responsibilities will include layout verification such as LVS/DRC/Antenna, quality check, and support documentation. You will be expected to deliver block-level layouts on time with acceptable quality and demonstrate leadership qualities in planning, area/time estimation, scheduling, and execution to meet project milestones in a multiple project environment. Collaboration with peer teams across Micron's global footprint is essential, and you will be required to guide junior team members in executing sub block-level layouts and review critical items. Effective communication with global engineering teams to ensure the success of layout projects is also a key aspect of this role. Additionally, you will contribute to effective project management and problem-solving in the physical verification of custom layout designs. To qualify for this role, you should have 6 to 9 years of experience in analog/custom layout design in advanced CMOS processes across various technology nodes. Expertise in tools like Cadence VLE/VXL and Mentor Graphic Calibre DRC/LVS is a must. Hands-on experience in creating layouts of critical blocks such as Temperature sensor, PLL, ADC, DAC, LDO, Bandgap, Ref Generators, Charge Pump, Current Mirrors, Comparator, Differential Amplifier, etc., is required. A good understanding of Analog Layout fundamentals and layout effects on circuits is essential, along with the ability to implement high-quality layouts based on design constraints. A BE or MTech in Electronic/VLSI Engineering is the preferred educational background for this role, although exceptionally talented Diploma holders in electronic or VLSI engineering will also be considered. Micron Technology, Inc. is a global leader in innovative memory and storage solutions, driving the transformation of information into intelligence. Our relentless focus on technology leadership and operational excellence enables us to deliver high-performance DRAM, NAND, and NOR memory and storage products through our Micron and Crucial brands. Our innovations fuel the data economy, supporting advances in artificial intelligence and 5G applications across various platforms. If you are looking to be part of a dynamic team that is shaping the future of technology, visit micron.com/careers to learn more about opportunities at Micron Technology, Inc. For assistance with the application process or to request reasonable accommodations, please contact hrsupport_in@micron.com. Micron prohibits the use of child labor and complies with all applicable labor laws and standards.,

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: We know our employees ideas change the world. For more than three decades, weve been a global leader in mobile technology, continually pushing the boundaries of whats possible. Working with customers across industries "” from automotive to health care, from smart cities to robotics"” we continue to accelerate innovation and unlock new possibilities in a time where everything is connected. By joining the Qualcomm family, you too can bring the future forward faster. Qualcomm is looking for an energetic, creative and self-driven engineer to work in Modem , Multimedia , Connectivity , Computer Vision and Image Processing , software implementation and hardware acceleration. The work will directly influence the various subsystems within the SoC. The ideal candidate would have very strong problem solving and analytical skills combined with creativity and a passion for innovation. They would be able to carry forward that new idea, concept, and/or application that will propel systems to new levels of effectiveness and efficiency. At Qualcomm you will perform detailed technical analysis, translate ideas into models, SW and/or HW and work closely with other teams to help deliver real products. At Qualcomm, the sky's the limit. College Graduates play important roles everywhere in the company. Many of our 27,000+ employees join us right out of school because we're working on the cutting edge in wireless. Complex wireless devices are only as powerful as the software that runs them. As a software engineer, you will develop, implement and maintain multimedia, gaming and application software for the world's leading-edge mobile devices. We know our employees ideas change the world. For more than three decades, weve been a global leader in mobile technology, continually pushing the boundaries of whats possible. Working with customers across industries "” from automotive to health care, from smart cities to robotics"” we continue to accelerate innovation and unlock new possibilities in a time where everything is connected. By joining the Qualcomm family, you too can bring the future forward faster. SOC & Hard Macro Physical Design SOC Validation & Debug RF & Analog Layout RF/Analog/Mixed Signal/Power IC Design Low Power Design Board and FPGA Design\ Digital ASIC Design Design/SOC Verification CAD Solution Engineer Design for Test (DFT) CPU Design Minimum Qualifications: Associate's degree in Computer Science, Electrical/Electronic Engineering, Engineering, or related field. Must have educational background in one or more of the following areas: Verifying SoC with embedded RISC/DSP processors, communications/ networking ASICs. Verilog or VHDL, C/C++, Tcl/Perl/shell-scripting. RTL design experience and/or strong OO programming knowledge Knowledge of wireless/wired communications and protocols or graphics/video multi-media is a plus. Knowledge in PLL, LNA, OpAmp, CMOS, ADC/DAC, Cadence, SpectreRF, or Layout is required in RF/Analog/Mixed Signal IC Design. Excellent analytical and problem solving skills. Ability to collaborate and work in teams. Good verbal and written communication skill Preferred Qualifications: Bachelor's degree in Computer Science, Electrical/Electronic Engineering, Engineering, or related field. Applicants Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: We know our employees ideas change the world. For more than three decades, weve been a global leader in mobile technology, continually pushing the boundaries of whats possible. Working with customers across industries "” from automotive to health care, from smart cities to robotics"” we continue to accelerate innovation and unlock new possibilities in a time where everything is connected. By joining the Qualcomm family, you too can bring the future forward faster. Qualcomm is looking for an energetic, creative and self-driven engineer to work in Modem , Multimedia , Connectivity , Computer Vision and Image Processing , software implementation and hardware acceleration. The work will directly influence the various subsystems within the SoC. The ideal candidate would have very strong problem solving and analytical skills combined with creativity and a passion for innovation. They would be able to carry forward that new idea, concept, and/or application that will propel systems to new levels of effectiveness and efficiency. At Qualcomm you will perform detailed technical analysis, translate ideas into models, SW and/or HW and work closely with other teams to help deliver real products. At Qualcomm, the sky's the limit. College Graduates play important roles everywhere in the company. Many of our 27,000+ employees join us right out of school because we're working on the cutting edge in wireless. Complex wireless devices are only as powerful as the software that runs them. As a software engineer, you will develop, implement and maintain multimedia, gaming and application software for the world's leading-edge mobile devices. We know our employees ideas change the world. For more than three decades, weve been a global leader in mobile technology, continually pushing the boundaries of whats possible. Working with customers across industries "” from automotive to health care, from smart cities to robotics"” we continue to accelerate innovation and unlock new possibilities in a time where everything is connected. By joining the Qualcomm family, you too can bring the future forward faster. SOC & Hard Macro Physical Design SOC Validation & Debug RF & Analog Layout RF/Analog/Mixed Signal/Power IC Design Low Power Design Board and FPGA Design\ Digital ASIC Design Design/SOC Verification CAD Solution Engineer Design for Test (DFT) CPU Design Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field. Educational Background:Masters, BachelorsElectrical Engineering , VLSI , Embedded and VLSI , ECE Must have educational background in one or more of the following areas: Verifying SoC with embedded RISC/DSP processors, communications/ networking ASICs. Verilog or VHDL, C/C++, Tcl/Perl/shell-scripting. RTL design experience and/or strong OO programming knowledge Knowledge of wireless/wired communications and protocols or graphics/video multi-media is a plus. Knowledge in PLL, LNA, OpAmp, CMOS, ADC/DAC, Cadence, SpectreRF, or Layout is required in RF/Analog/Mixed Signal IC Design. Excellent analytical and problem solving skills. Ability to collaborate and work in teams. Good verbal and written communication skill Applicants Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.

Job Area: Interns Group, Interns Group > Interim Engineering Intern - HW Qualcomm Overview: Qualcomm is a company of inventors that unlocked 5G ushering in an age of rapid acceleration in connectivity and new possibilities that will transform industries, create jobs, and enrich lives. But this is just the beginning. It takes inventive minds with diverse skills, backgrounds, and cultures to transform 5Gs potential into world-changing technologies and products. This is the Invention Age - and this is where you come in. General Summary: We know our employees ideas change the world. For more than three decades, weve been a global leader in mobile technology, continually pushing the boundaries of whats possible. Working with customers across industries "” from automotive to health care, from smart cities to robotics"” we continue to accelerate innovation and unlock new possibilities in a time where everything is connected. By joining the Qualcomm family, you too can bring the future forward faster. SOC & Hard Macro Physical Design SOC Validation & Debug RF & Analog Layout RF/Analog/Mixed Signal/Power IC Design Low Power Design Board and FPGA Design Digital ASIC Design Design/SOC Verification CAD Solution Engineer Design for Test (DFT) CPU Design Must have educational background in one or more of the following areas: Verifying SoC with embedded RISC/DSP processors, communications/ networking ASICs. Verilog or VHDL, C/C++, Tcl/Perl/shell-scripting. RTL design experience and/or strong OO programming knowledge Knowledge of wireless/wired communications and protocols or graphics/video multi-media is a plus. Knowledge in PLL, LNA, OpAmp, CMOS, ADC/DAC, Cadence, SpectreRF, or Layout is required in RF/Analog/Mixed Signal IC Design. Excellent analytical and problem solving skills. Ability to collaborate and work in teams. Good verbal and written communication skill Educational Background:Masters, BachelorsElectrical Engineering , VLSI , Embedded and VLSI , ECE Applicants Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail myhr.support@qualcomm.com or call Qualcomm's toll-free number found here . Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.

As a member of the Cadence team, you will have the opportunity to contribute to the world of technology by utilizing your skills and expertise. You will be responsible for hands-on layout experience in various analog IP components such as Opamps, Bandgaps, Data converters, LDO, PLL, and more. Your role will involve understanding the impact of layout on the circuit regarding speed, capacitance, power, and area. Knowledge of analog layout techniques like matching, shielding, and familiarity with DSM technology methodology will be essential. Experience with the latest technology nodes, specifically 28nm and below, is preferred. Additionally, you will be expected to possess good communication skills, work effectively as a team player, and have experience with scripting and automation. High-speed analog layout experience in areas like Serdes, power management, and PLL will be beneficial. Understanding layout effects on the circuit and various techniques, floorplan constraints, and IP integration at the chip level will be part of your responsibilities. Qualifications for this role include a degree in BE/BTech/ME/MS/MTech in Electrical/Electronics. Strong written, verbal, and presentation skills are essential, along with the ability to establish close working relationships with customers and management. You should exhibit strong analytical and problem-solving skills and be open to exploring unconventional solutions to get the job done. Operating with integrity and pushing to raise the bar will be key aspects of your role. Join us in our mission to tackle challenges that others cannot solve and be a part of work that truly matters at Cadence.,

As a Lead Analog Validation Engineer, you should have a minimum of 7 years of experience and hold a Bachelors or Masters degree in Electronics or Electronics & Communication. Your expertise should include a strong understanding of electrical circuit analysis, design, and test fundamentals. You must be proficient in automating Analog Characterization Setups using Labview and Test Stand, and have strong debugging and problem-solving skills. Your responsibilities will include bringing up Silicon & Analog Validation Platforms for new ASIC/SoC designs, developing bench characterization test methodologies for various Analog IPs such as ADC, DAC, PLL, USB, VREG, OSC, DDR, LOW POWER, and IO PADs. You will also be required to develop automated code to control test equipment and generate required PVT electrical parameters. Additionally, you should possess expertise in using test & measurement equipment for Analog Validation, PVT characterization of Analog IPs, and have experience in Multilayer Board design, testing, integration, and Signal Integrity issues. Knowledge of C programming is essential for this role. Strong leadership and planning skills are crucial as you will be expected to deliver timely results in lead positions. You will work closely with cross-functional teams including marketing, systems, design, test, and project management to support the successful launch of new products. Your ability to communicate effectively with individuals from diverse backgrounds and strong team-building skills are essential for this role. Your motivation and energy to tackle bench characterization challenges on stand-alone/automated setups will be key to success in this position.,

You will be responsible for designing and leading the development of high-speed IP such as GDDR7, DDR5, and LPDDR6. As a strong individual contributor in the analog domain, you will actively participate in all aspects of development including analog design, layout, digital design, documentation, and silicon validation. Your role will also involve engaging in customer-facing discussions to address their requirements and concerns. To qualify for this position, you should hold a B.Tech / BE / ME / Mtech degree with at least 5 to 15+ years of experience. It is essential to have hands-on design experience and leadership skills in GDDR/DDR/LPDDR IPs. A successful candidate must have been involved in the entire cycle of analog IP creation, from specification to silicon debugging and characterization. Good communication skills and the ability to work effectively in a team are crucial for this role. Moreover, expertise in areas such as PLL, high-speed circuits like TX, RX, clocking circuits, etc., is mandatory. Experience with other common IP blocks like BGR, LDO, POC, temperature sensor, etc., would be considered advantageous.,

The ideal candidate for this position should have at least 7+ years of experience in the field. The location for this role includes Bangalore, Delhi NCR, and Hyderabad with 8-10 openings available. The preferred education qualifications are BE/B.Tech./MS/M.Tech. in Electronics or Electronics & Communication. **Required Basic Qualification & Skills:** - Strong understanding of electrical circuit analysis, design, and test fundamentals - Automation of Analog Characterization Setups using Labview and Test Stand - Strong debugging and problem-solving skills - Experience in bring up of Silicon & Analog Validation Platforms - Proficiency in C programming - Leadership and planning skills for timely results delivery **Additional Preferred Qualifications:** - Expertise in using test & measurement equipment for Analog Validation - PVT characterization experience of Analog IPs like ADC, DAC, PLL, USB, VREG, OSC, DDR, LOW POWER, and IO PADs - Good debugging exposure and root cause analysis for new analog designs - Knowledge of Multilayer Board design, testing, integration, and Signal Integrity issues - Experience with LabVIEW and Test Stand automation software - Working experience in a lab environment **Primary and Secondary Responsibilities:** - Develop unique bench characterization test methodologies for Analog IPs - Write automated code for controlling test equipment during data collection and processing - Perform Design Evaluation and Bench Characterization for Analog IPs - Provide requirements and review schematics for circuit board development **Other Complex Tasks:** - Provide customer application note support by generating characterization data - Collaborate with cross-functional teams for successful product launches **Team and People Skills:** - Strong team-building skills and effective communication abilities are essential for this role.,

Analog IP development including circuit design, layout, AMS verification, and characterization. Analog IP development Circuit Design implementation of IPs including LDOs, Band Gap reference, Current Generators, POR, ADC/DACs, PLLs,

You will be part of the SoC Clocking team, focusing on next-generation Networking and Edge SoC designs. Your responsibilities will include product pathfinding, end-to-end clocking architecture, clock distribution, and overseeing SoC clock implementation and Sign off. You should have experience in SoC Clock Architecture, clock distribution, and system-level clocking. Additionally, hands-on experience with spice, clock jitter simulations, and different jitter components is required. You will work on clocking methodologies and guidelines for IPs or SoCs and create scalable flows for clocking infrastructure to enhance performance and power in the design. Collaboration with Platform, package, IP, and SoC design teams is essential to drive best-in-class clocking solutions. A good understanding of Physical design and SoC timing analysis would be beneficial. Proficiency in Perl, TCL Scripting Skills is necessary. Qualifications - Bachelors (B.Tech) or Masters (M.Tech) in Electrical Engineering or related areas. - At least 18+ years of experience in SoC clock architecture, clock distribution, and clock implementation. - Hands-on experience with Synopsys, cadence APR/Clock implementation tools. - Good understanding of System-level clocking. - Proficient in scripting languages (Tcl, Perl, Python). - Ability to communicate effectively with multiple global cross-functional teams. This is an Experienced Hire job role with a requirement for on-site presence at Shift 1 (India). The primary location for this role is in India, Bangalore. Xeon and Networking Engineering (XNE) business group focuses on the development and integration of XEON and Networking SOC's and critical IP's to sustain Intel's Xeon and 5G networking roadmap. Please note that this role is a Position of Trust, requiring consent to and successful completion of an extended Background Investigation, which includes various checks. The work model for this role is subject to change.,

: 6 to 8 years of Semiconductor industry experience in Custom Mixed-Signal layout design with a bachelors degree in electrical/Electronic Engineering. Able to deliver Custom analog layouts independently from schematic to layout generation, estimating the area, optimizing floorplan, routing, and complete verification flows. Firsthand experience in critical analog layout design blocks such as Temperature sensor, Serdes, PLL, ADC, DAC, LDO, Bandgap, Ref Generators, Charge Pump, Current Mirrors, Comparator, Differential Amplifier etc. Good at LVS/DRC debugging skills and other verifications for lower technology nodes - 14nm FinFet and below. Good understanding of Matching, EM, ESD, Latch-Up, Shielding, Parasitic and short channel concepts. Familiar with EDA tools like Cadence VLE/VXL, PVS, Assura and Calibre DRC/ LVS is necessary. Understanding layout effects on the circuit such as speed, capacitance, power, and area etc. Ability to understand design constraints and implement high-quality layouts. Multiple Tape out support experience and collaborating with cross functional teams will be an added advantage. Good people skills and critical thinking abilities to resolve the issue technically and professionally. Excellent communication. Responsible for timely execution with high quality of layout design. Multiple foundries experience is an added plus. Minimum Educational Qualification : Educational Bachelor"s, Electrical or Electronics Engineering or equivalent Role And Responsibilities Responsible for Design and development of critical analog, mixed-signal, custom digital block and full chip level integration support. Perform layout verification like LVS/DRC/Antenna, EM, quality check and documentation. Responsible for on-time delivery of block-level/top-level layouts with acceptable quality. Demonstrate leadership Skill in planning, area/time estimation, scheduling, delegation and execution to meet project schedule/milestones in multiple project environment. Guide junior team-members in their execution of Sub block-level layouts & review their work Should have good experience in working with cross-functional team. Ensure standard processes and procedures are followed to resolve all client queries. Handle technical escalations through effective diagnosis and troubleshooting of client queries Manage and resolve technical roadblocks/ escalations to timely deliverable with high quality. Troubleshoot all client queries in a user-friendly, courteous, and professional manner. Offer alternative solutions to clients (where appropriate) with the objective of retaining customers" and clients" business. Build people capability to ensure operational excellence and maintain superior customer service levels of the existing account/client. Contribute to effective project-management. Effectively communicating with engineering teams in different Geographical locations to assure the success of the layout project. Works in the area of Software Engineering, which encompasses the development, maintenance and optimization of software solutions/applications.1. Applies scientific methods to analyse and solve software engineering problems.2. He/she is responsible for the development and application of software engineering practice and knowledge, in research, design, development and maintenance.3. His/her work requires the exercise of original thought and judgement and the ability to supervise the technical and administrative work of other software engineers.4. The software engineer builds skills and expertise of his/her software engineering discipline to reach standard software engineer skills expectations for the applicable role, as defined in Professional Communities.5. The software engineer collaborates and acts as team player with other software engineers and stakeholders.

Experience on Agile Transceiver ICs like AD9364, AD9361, characterisation of transceiver receiver, ISM band transceiver will be value addition Designing, implementation and testing of RF circuits like Transceivers, transmitter, receiver, LNA, PA, filters, mixer, PLL synthesizers

Strong understanding of electrical circuit analysis, design, and test fundamentals. Working knowledge on Analog, Digital Electronics, Knowledge in C, experience in either characterization or signal integrity, ADC, DAC, PLL, LOW POWER and IO PADs.

As a Silicon Design Validation Engineer at Lattice, you will have the opportunity to be part of a dynamic team working on cutting-edge FPGA projects. This role involves validating building blocks in FPGA on the board level to ensure functionality and performance according to design intent. The FPGA includes various IPs such as SERDES (PMA/PCS), Memory DDR (DDR4, LPDDR4, DDR5, etc.), DPHY, PLL, DSP, Fabric, I/O, among others. In this position, you will learn how to validate one or many building blocks within the FPGA and gain knowledge of the process and methodology required for validating IPs from planning to completion. You will work with advanced equipment, boards, and software/tools while developing validation and characterization plans for specific IPs, bench hardware, and software. You will also create test logic RTL to conduct validation and characterization tests, drive new silicon product bring-up, validation, and debug processes, and analyze data sheet parameters. The ideal candidate for this role is highly motivated to develop a career in Silicon Design Validation Engineering. You will have exposure to various areas including FPGA and its building blocks, IP validation, bench hardware and software development, and more. You will lead and manage teams, possess an electrical engineering degree, have expertise in high-speed Serdes interface characterization, high-speed board design, Verilog/VHDL, FPGA development tools, test automation development, statistical analysis concepts, and bench equipment for device characterization. To excel in this role, you should have strong written and verbal communication skills, be self-motivated, proactive, possess critical thinking skills, and demonstrate good problem-solving and debugging abilities. If you thrive in a fast-paced, results-oriented environment and are looking to contribute to a team-first organization, Lattice may be the perfect fit for you.,

This is a full-time on-site role for an AMS Verification Engineer at UANDWE, Inc. in Bengaluru. As an AMS Verification Engineer, you will have complete ownership of AMS verification for complex mixed signal blocks such as PLL, DFE, transmitters, receivers, etc. It is essential for you to understand the JDEC spec for DDR interface and define verification methodology. Your responsibilities will include test planning, creating testbenches, and verification using Cadence tool mixed signal design flow. Knowledge of RNM (real number model) modelling would be a plus. You will collaborate closely with Logic and Analog design teams to comprehend the requirements and provide feedback on the results. Additionally, you will be responsible for creating schedules, tracking progress, and identifying and addressing issues and risks to project management. To qualify for this role, you should hold a Masters or Bachelor's degree in Electronics Engineering, VLSI, or Microelectronics from a reputed university. You should have a minimum of 7 years of industry experience in AMS verification. Strong written and verbal communication skills are required, as well as the ability to work effectively as a team player with cross-functional teams.,

Youzentech Technologies is currently seeking an experienced Analog IC Layout Engineer to be a part of our team in Hyderabad. If you possess 5-10 years of expertise in Custom Mixed-Signal Layout Design, we are eager to hear from you. The position is based in Hyderabad/Bangalore and requires the following qualifications and responsibilities: - Proficiency in Full Custom & Semi-Custom Analog IP & IC Layout, starting from schematic to verification - Hands-on experience with various components including Temperature Sensor, SerDes, PLL, ADC, DAC, LDO, Bandgap, Charge Pump, Current Mirrors, Differential Amplifier, and more - Skilled in LVS/DRC debugging & verification for 16FF and below nodes (TSMC, Samsung, GF) - Strong understanding of EM, ESD, Shielding, Parasitic, and Layout-dependent effects - Familiarity with Cadence, Calibre, Assura, Redhawk, and Totem for verification purposes - Experience in supporting multiple Tape-outs and collaborating with cross-functional teams - Knowledge of Layout automation (SKILL/PERL) would be an added advantage - Mandatory experience with TSMC 7nm technology If you meet the requirements and are interested in this opportunity, please share your resume with us at amith.m@youzentech.com.,

Qualcomm India Private Limited is a leading technology innovator that strives to push the boundaries of what is possible, enabling next-generation experiences and driving digital transformation for a smarter, connected future. As a Qualcomm Hardware Engineer, your role will involve planning, designing, optimizing, verifying, and testing electronic systems, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment, packaging, test systems, FPGA, and/or DSP systems to launch cutting-edge products. Collaboration with cross-functional teams will be essential to develop solutions and meet performance requirements. To be eligible for this position, you should have a Bachelor's/Master's/PhD degree in Computer Science, Electrical/Electronics Engineering, Engineering, or a related field, along with relevant work experience ranging from 4 to 6+ years. Join Qualcomm's design verification team and be involved in verifying high-speed mixed-signal IP designs for products targeted for 5G, AI/ML, compute, IoT, and automotive applications. Responsibilities will include defining test plans, developing testbenches using advanced verification methodologies, authoring assertions, developing test cases, and collaborating with various teams to ensure successful verification and integration. Qualified candidates should possess a Master's/Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field, with at least 12+ years of ASIC design verification experience. Knowledge of HVL methodologies like SystemVerilog/UVM and experience with ASIC simulation/formal tools are required. Preferred qualifications include experience with low power design verification, formal verification, gate-level simulation, knowledge of standard protocols, scripting languages like Python or Perl, and experience with mixed-signal IP design verification. Qualcomm is an equal opportunity employer that is committed to providing accessible processes for individuals with disabilities. If you require accommodations during the application/hiring process, please contact disability-accommodations@qualcomm.com. Additionally, Qualcomm expects its employees to adhere to all applicable policies and procedures, including those related to the protection of confidential information. For more information about this role, please contact Qualcomm Careers.,

Company Overview Connectpro operates in the human-resources industry, specializing in recruitment and talent acquisition. Role And Responsibilities As a senior analog design engineer at Connectpro, you will be responsible for taking a subsystem of analog design through all phases of the design process. This includes: Creating the architecture of the analog subsystem Providing technical leadership to the team during execution Designing, simulating, and supervising the layout and verification processes Evaluating and debugging silicon samples You will be working with the latest Cadence analogue design tools including Virtuoso Composer, Verilog, HSPICE, and other PC-based tools like Matlab. The circuits you will be working on involve mixed signal blocks such as switched capacitor amplifiers, PLL, RAM, high-speed interfaces, references, IO circuits, data converters, and digital building blocks. Your role will also involve ensuring timely execution and collaborating with cross-functional teams like PE/TE. Experience with custom layout and analog verification is a plus. Candidate Qualifications To be successful in this role, you should possess the following qualifications: Bachelor's degree with 5-8 years of experience in CMOS, analog/power/mixed-mode IC design using tools similar to the ones mentioned above Strong fundamentals in CMOS analog design Excellent communication skills Ability to interact effectively with cross-functional teams Understanding of the semiconductor development flow Skills: hspice,semiconductor development flow,adc,,pll,icdesign,data converters,analog,layout/verification,dac,mixed signal,team management,cadence analogue design tools,custom layout,analog/power/mixed-mode ic design,simulation,evaluation/debug,amplifiers and filters,matlab,interact with cross functional teams,switched capacitor amplifiers,pmic,cmos process,cmos,,ram,ams,virtuoso composer,architecting,design,dll,,digital building blocks,references,analog verification,cmos,io circuits,hispeed interfaces,communication skills,verilog,analog design,

About the Role: We are looking for a detail-oriented and proactive QA Engineer with 25 years of experience to help us ensure the security, performance, and reliability of our Fintech platforms . You will work across both manual and automated testing , ensuring that every release meets the highest standards — especially in the areas of data accuracy, transactional integrity, and system stability. You'll also explore AI-powered testing tools to drive faster and smarter quality assurance. If you're passionate about quality in high-stakes environments like payments, lending, KYC, or financial reporting , this is the role for you. Key Responsibilities: Validate mission-critical features : Write and execute detailed test cases for transaction flows, lead journeys, credit bureau integrations, and partner APIs. Ensure data security and compliance : Test for data leaks, verify encryption/PII handling, and monitor logs for sensitive information exposure. Own test strategy : Design, automate, and maintain functional, regression, smoke, and integration tests using tools like Playwright , Selenium , or Cypress . AI-powered QA : Use tools like Testim , Applitools , or Mabl to enhance coverage, reduce flaky tests, and enable intelligent test maintenance. API & Backend Testing : Use Postman , REST-assured , and SQL queries to validate financial logic, settlements, KYC data, and lead assignments. Defect lifecycle management : File and track bugs in Jira , ensuring high-impact issues are prioritized and reproducible. CI/CD quality gates : Integrate automated tests into pipelines (GitHub Actions, Jenkins, or GitLab CI) for smooth, stable releases. Collaborate closely : Work alongside developers, PMs, and data teams to improve quality early in the SDLC, from product design through release. What We're Looking For: Bachelor's degree in Computer Science, Engineering, or equivalent. 2–5 years of experience in QA across Fintech, banking, or high-availability transactional platforms . Hands-on experience with modern automation frameworks (Playwright preferred). Exposure to AI/ML-driven QA tools like Testim, Applitools, Functionize, or Mabl. Experience testing RESTful APIs , SQL databases, and multi-service architectures. Solid understanding of Agile/Scrum, SDLC/STLC, and testing best practices. Awareness of security and compliance requirements (e.g., PCI-DSS, CIBIL/credit data protection, GDPR). Analytical mindset with attention to financial accuracy, edge cases, and performance limits. Strong communicator with ability to articulate quality concerns to devs, product, and business teams. Why Join Us: Be part of a fast-growing Fintech product team impacting lending at scale. Work with cutting-edge tools in a modern QA ecosystem blending automation and AI. Shape the quality culture in a domain where precision and trust are non-negotiable. Opportunities for growth, learning, and cross-functional exposure in the fintech space.

Responsibilities: * Develop PLL/DLL designs using Virtuoso software * Collaborate with cross-functional teams on project requirements * Ensure compliance with industry standards and specifications Interested ,share resume to mansoor@hisoltech.com

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 8+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 7+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 6+ years of Hardware Engineering or related work experience. Job Function BDC SerDes Mixed-Signal design team is actively looking for experienced (16+ years) analog circuit designers to work on high speed SerDes PHYs . You will be directly involved in delivering next-generation custom PHY designs for SoCs and will be part of a growing team involved in architecture analysis in leading-nodes - finfets & beyond. Design goals include low-power analog designs to address Qualcomm's low-power wireless products. Responsibilities Hands-on experience - Analog circuit design Experience in designing multiple analog building blocks - LDO, high speed TX and RX (Equalizer, Sampler, PI, Deserializer etc) , Bias, Reference etc. Analog and or Digital PLLs for frequency synthesis and/or SerDes applications Charge pump, loop filter, VCO/DCO, PFD/TDC, high speed dividers. PLL Loop Dynamics, Jitter sources and modeling (RJ & DJ) Ability to take a design, perform schematic to post layout verification, integration sign-off to post silicon bring up. Work closely with RTL, DD, PD, DV and SoC verification teams to integrate the PHY. Skills & Experience For lead position, candidates must have performed PHY Lead roles which include PHY integration to SOC & interaction with post silicon teams like HSIO, ATE, SVE, CE etc. Understanding of advance Finfet process effects on designs and layout is required. Experience in using SPICE simulators, adexl & virtuoso. Experience with post-Si bring-up and debug is must. Good understanding on peripheral PHYs (USBs, UFS, PCIe) protocols is added advantage. Master/Bachelor in Electronics Shell/Perl-python scripting to automate circuit design and verification work. Able to work with teams across the globe and possess good communication and presentation skills. Preferred Mixed signal design experience Keywords Analog circuit Design, Rx, Tx, PLL, SerDes, PHY, Serializer, Deserializer, VCO, High-speed Trans receiver