48 Serdes Jobs

You should have a B.Tech/M.Tech degree along with more than 5 years of industry experience in analog/mixed signal behavioral modeling across different levels of abstraction and full chip verification (AMS and DMS DV). Your role will involve a deep understanding of analog design principles and mixed signal design architectures. Exposure to products integrating various Analog/Mixed-Signal/RF building blocks like Power Management, ADCs, DACs, PLL, bandgap references, oscillators, SerDes, RF Transceiver, etc., and related digital control and signal processing is essential. Your responsibilities will include devising verification strategies based on product requirements and design specifications, creating models for analog/mixed-signal blocks, validating models against actual designs, developing verification plans and environments, and implementing self-checking test cases. You will collaborate with cross-disciplinary team members for first-pass silicon success and provide support for post-silicon validation. It is crucial that you have demonstrated experience in verification plan development, verification environment setup, and verification/debug of complex mixed signal products at block and chip-top levels. Proficiency in co-simulations with analog model/transistor level and digital RTL/Gate+SDFs, as well as experience in circuit simulations with Spice/Fast Spice simulators, is required. You must be well-versed in industry-standard metrics for closing the verification of analog designs and possess exceptional interpersonal and communication skills to effectively collaborate and influence innovative design methodologies. The ability to manage the technical aspects of AMS team execution, mentor junior engineers, and lead AMS DV projects is also expected. Additionally, you should be quick to adapt to new technologies, possess good problem-solving skills, and be self-motivated and enthusiastic about your work.,

We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a passionate and meticulous engineer with a deep commitment to excellence in analog and high-speed mixed signal layout design. With a minimum of 2 years of hands-on experience in advanced technology nodes (5nm and below), you thrive in dynamic, collaborative environments where quality, precision, and innovation are valued above all. You are well-versed in the intricacies of SerDes, CTLE, AFE, PLL, LDO, and transmitter/receiver sub-blocks, and you relish the challenge of delivering robust designs for cutting-edge semiconductor products. You are motivated by the opportunity to work alongside some of the brightest minds in the industry, continuously learning and contributing your expertise. You are eager to be part of a team that values diversity, inclusion, and the relentless pursuit of innovation, and you bring a growth mindset that seeks to elevate those around you. Your ability to communicate effectively, adapt to evolving requirements, and deliver under tight timelines sets you apart as a trusted contributor and future leader. What Youll Be Doing: Designing and implementing high-quality analog and mixed signal layouts for advanced technology nodes (5nm and below). Collaborating closely with circuit design, verification, and physical implementation teams to optimize layout performance and manufacturability. Executing full custom layout of SerDes blocks including CTLE, AFE, PLL, LDO, and transmitter/receiver sub-blocks. Performing layout verification tasks such as DRC, LVS, and parasitic extraction to ensure compliance with design and process requirements. Participating in design reviews and providing technical input to ensure the robustness and reliability of delivered IP blocks. Documenting layout methodologies, design decisions, and best practices to drive organizational knowledge sharing. Supporting silicon debug and post-silicon validation activities as needed. The Impact You Will Have: Drive the successful delivery of high-performance, low-power analog and mixed signal IP for next-generation semiconductor products. Enable rapid time-to-market for customer solutions by ensuring first-pass silicon success through meticulous layout practices. Enhance Synopsys reputation as a leader in advanced technology node design by delivering innovative, reliable, and manufacturable layouts. Influence the development of best-in-class methodologies and automation for layout design and verification. Contribute to cross-functional learning and mentorship within a diverse, inclusive team environment. Support customer engagements and help resolve complex technical challenges, ensuring satisfaction and repeat business. What Youll Need: Minimum of 2 years of experience in analog and high-speed mixed signal layout at 5nm or below technology nodes. Proven expertise in full custom layout of SerDes blocks (CTLE, AFE, PLL, LDO, transmitter/receiver sub-blocks). Strong command of industry-standard EDA tools for layout and verification (e.g., Cadence Virtuoso, Mentor Calibre, Synopsys IC Compiler). Demonstrated ability to interpret and implement complex circuit schematics into robust, high-quality layouts. Hands-on experience with DRC, LVS, and parasitic extraction flows and methodologies. Who You Are: Detail-oriented, with a strong commitment to quality and continuous improvement. Collaborative and communicative, able to work seamlessly across multidisciplinary teams. Self-motivated and proactive, taking ownership of deliverables and driving them to completion. Flexible and adaptive, thriving in fast-paced, evolving environments. Curious, eager to learn, and enthusiastic about sharing knowledge with peers. Committed to diversity, equity, and inclusion in the workplace. The Team Youll Be A Part Of: You will join a diverse and highly skilled team of analog and mixed signal design professionals who are passionate about pushing the boundaries of semiconductor technology. The team collaborates closely with global engineering, product, and customer teams, focusing on delivering best-in-class IP for advanced technology nodes. We foster a culture of innovation, mentorship, and continuous learning, where every voice is heard and every contribution matters. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. Show more Show less

You will be responsible for the Ethernovia's Networking devices software stack development. This may include Embedded Firmware, kernel/user mode device drivers, stack extensions, debug, and test utilities as well as automated unit/system testing. The device drivers will allow the User application, Middleware, and Operating system to take full advantage of the feature-rich hardware. The firmware configures, controls, and monitors the communication device and interacts with the host system via device drivers to expose hardware features of the devices. Firmware code may also run as a standalone library within the device driver itself. As a part of the Software team, you will be responsible for architecture, design, implementation, testing, and integration of the firmware rolled into Ethernovia's SDK. This firmware is built ground-up for safety-critical automotive applications. Also, we build products with strict adherence to Functional Safety, and hence, every team member is required to fit into a culture of safety and best development practices. Technical Qualifications: - Bachelor's or Master's degree in Computer Science/Software or a related field. - Work Experience: Minimum 10+ years of relevant experience for this position. - Strong understanding of Software Development lifecycle including Architecture, Implementation, and Testing fundamentals. - Proficient in C/C++ Programming Language. Experience in Python is a plus. - Experience with Firmware, preferably for communication devices like Ethernet. - Experience with Embedded firmware, preferably for communication devices like Ethernet. - Experience with integration and testing of firmware and low-level code. - Hands-on Experience with Hardware and embedded processors, preferably for communication devices. - Expertise in efficient code practices for code footprint and performance. Nice to Have Experience with: - Experience with simulation and emulation platforms. - GNU or similar compiler, debugging suite. - Embedded programming, preferably with communication devices and hardware buses like I2C, SPI, Ethernet, USB. - Building Automotive or other safety-critical systems using qualification methods/processes like MISRA, ASPICE, and ISO26262. - Communication protocols like Ethernet MAC, PHY, Switching, TCP/IP, Security, Serdes, PCIe, NTB, and SR-IOV. - Video processing standards and protocols. - Code Version Control and Review tools/processes like Perforce/Git, Swarm. - Mixed Signal systems - Analog, Digital, Digital Signal Processing (DSP). - ARM family of processors or similar embedded processors. - Bootloaders like uboot or similar. Soft Skills: - Self-motivated and able to work effectively both independently and in a team. - Excellent communication/documentation skills. - Attention to details. What you'll get in return: - Technology depth and breadth expansion that can't be found in a large company. - Opportunity to grow your career as the company grows. - Pre-IPO stock options. - Cutting-edge technology. - World-class team. - Competitive base salary. - Flexible hours.,

Eridu AI India Private Limited, a subsidiary of Eridu Corporation, Saratoga, California, USA, invites highly motivated professionals to join its R&D center in Bengaluru. Eridu AI is a Silicon Valley hardware startup dedicated to enhancing training and inference performance for large AI models. By introducing innovative solutions in semiconductors, software, and systems, Eridu AI aims to optimize AI data center performance, increase GPU utilization, and reduce capex and power consumption. The company, backed by a team of experienced Silicon Valley executives and engineers, offers a unique opportunity to work on cutting-edge technology in the AI networking industry. As a Senior Manager at Eridu AI, you will lead the IC Verification team in Bengaluru, shaping the future of AI Networking. This role requires a self-driven individual with a passion for solving real-world problems and a desire to drive innovation in AI networking. Responsibilities: - Manage and lead the Bengaluru team of ASIC verification engineers, ensuring a collaborative work environment and effective communication across different locations. - Provide technical expertise in ASIC verification, ensuring compliance with industry standards and project specifications. - Conduct gate-level simulations, including timing and power analysis, to validate ASIC designs before tape-out. - Oversee RTL coverage analysis and provide feedback to enhance test suite thoroughness. - Collaborate with Firmware teams to ensure seamless integration between hardware and firmware components. - Mentor team members, identify training needs, and manage team augmentation in different locations. Qualifications: - ME/BE in Electrical Engineering, Computer Engineering, or related field. - Minimum 12 years of experience in ASIC verification, particularly in networking ASIC design. - Expertise in Hardware Verification Methodology, System Verilog, UVM, gate/timing/power simulations, and test-plan documentation. - Prior experience with Ethernet, UCIe, and PCIe protocols, high-speed SerDes, and global team management. - Excellent communication skills to lead and coordinate a diverse team effectively. Join Eridu AI to be part of a team that is revolutionizing AI infrastructure and shaping the future of AI networking. Your work will directly impact the next generation of AI networking solutions, pushing the boundaries of AI performance. The starting base salary will be determined based on skills, experience, qualifications, market trends, and comparable roles in the industry. Visit eridu.ai to learn more about our company and team.,

You are a highly experienced ASIC RTL Design Architect responsible for leading the design and verification of cutting-edge SoCs and high-speed digital IPs. With over 10 years of experience in ASIC/FPGA design, your expertise lies in RTL using Verilog/SystemVerilog, Lint, CDC, and Spyglass-based design verification methodologies. Your main responsibilities include leading RTL design and micro-architecture for high-performance ASIC SoCs, ensuring compliance with Lint, CDC, and SDC constraints using Spyglass or equivalent tools, driving design optimization and timing closure, as well as collaborating with cross-functional teams such as Design Verification, DFT, Physical Design, and Software teams. You will also be involved in developing and reviewing architecture specifications, coding guidelines, and best practices, as well as performing synthesis, timing analysis, and static verification using tools like STA, LEC, and Formal Verification. Key requirements for this role include a minimum of 10 years of experience in ASIC RTL design and architecture, expertise in Verilog/SystemVerilog for RTL design, strong knowledge of Spyglass Lint/CDC and static verification methodologies, experience in SoC micro-architecture, high-speed interfaces, and power optimization. Additionally, you should have a solid understanding of synthesis, STA, timing closure, backend constraints, experience with EDA tools like Synopsys, Cadence, Mentor Graphics, and familiarity with UVM-based verification and scripting languages such as TCL, Python, or Perl. Preferred qualifications include an M.Tech/MS/PhD in Electrical Engineering, Computer Engineering, or related field, experience in chip tape-out and production silicon, and an understanding of hardware security, reliability, and safety standards. If you are looking to be part of a team that is shaping the future of high-performance computing, apply now and join us in building innovative solutions together.,

As an Applications Engineer (AE) at Synopsys, you will play a crucial role in driving innovation and shaping the future in the Era of Pervasive Intelligence. You will have the opportunity to work with high-end customers in the Mobile Industry Processor Interface (MIPI) domain, providing top-tier technical support and guidance with your strong technical background in ASIC design. Your role will involve partnering with customers through the full cycle of ASIC design, conducting reviews on major design milestones, and ensuring successful integration of Synopsys MIPI IP solutions into customers" SoCs. Your impact will be significant as you enhance customer satisfaction by providing expert support, drive innovation through collaboration on cutting-edge SoC designs, and contribute to the development of industry-leading IP solutions. You will expand Synopsys" market presence in the MIPI domain and support the growth of Synopsys" IP portfolio by addressing customer needs and promoting the adoption of Synopsys IP through impactful documentation. To succeed in this role, you will need a Bachelor's degree with 5+ years or a Master's degree with 2+ years of relevant experience in the ASIC design process. Proficiency in Verilog HDL, synthesis, simulation, and verification is required, and knowledge of Place and Route, Design Reuse, Physical Design, or Analog Design is a plus. Familiarity with MIPI UFS/UniPro protocols, high-speed SERDES, or parallel interfaces is advantageous, as well as experience with Synopsys tool suites. Strong verbal and written communication skills in English are essential. As an Applications Engineer at Synopsys, you will join a dedicated and innovative team focused on supporting customers in the Synopsys Intellectual Property (IP) domain. You will have the opportunity to collaborate with a customer-centric approach, drive customer success, and advance the capabilities of Synopsys IP solutions. Synopsys offers a comprehensive range of health, wellness, and financial benefits to cater to your needs. Your recruiter will provide more details about the salary range and benefits during the hiring process. If you are an excellent communicator, a problem solver who thrives in a dynamic environment, a collaborative team player with a passion for technology and continuous learning, then you are the perfect fit for this role.,

The Lead Engineer (Analog Design) position requires a candidate with 5 to 15 years of experience, hands-on experience with spice simulators such as Hspice or Spectre, and a track record of leading client projects. The ideal candidate should hold a BE/BTech degree from a reputable university, with a preference for candidates with a Master's degree. Key responsibilities for this role include leading client projects, ensuring the timely delivery of high-quality work, maintaining clear communication, possessing expertise in major Serdes blocks like Tx or Rx, understanding clients" CAD flow environments, guiding the Layout team in resolving simulation issues, collaborating with the PD team to integrate AMS blocks, and having a strong grasp of PPA goals and strategies to achieve them. Additionally, the Lead Engineer must debug functional and performance simulations, comprehend the client's QA check processes, and be proficient in generating all necessary design views using sign-off tools. This full-time position is based in Hyderabad, Bangalore, Pune, or Ahmadabad.,

Build your career with Sykatiya Technologies! Sykatiya Technologies values both technical ability and the attitude of its highly talented team, which is evident in their contributions to customer projects. The team consists of skilled engineers and experts specializing in Design Verification, DFT/Test, Physical Design, and Analog Design for ASICs. We are currently looking for an Analog Design Engineer with 3-12 years of experience to join our team in Bangalore. The ideal candidate will have experience in transceiver design for high-speed interfaces such as DDR, HBM, PCIe, USB3, and JESD204. Exposure to nodes below 22nm is a plus, as well as experience in FINFET technology and the 32G-112G range of SERDES. The successful candidate should have taken at least one block from circuit design to layout closure and be capable of guiding the layout team for high-performance matched circuit design. Understanding reliability requirements such as ESD, EMIR, EOS, Aging, etc., is essential. The candidate should be able to work independently, mentor juniors, and have exposure to post-silicon validation. If you are a motivated Analog Design Engineer looking to work with a team of experts and contribute to cutting-edge projects, we encourage you to apply and be a part of our innovative team at Sykatiya Technologies.,

You will be responsible for the Ethernovia's Networking devices software stack development. This may include Embedded Firmware, kernel/user mode device drivers, stack extensions, debug, and test utilities as well as automated unit/system testing. The device drivers will allow the User application, Middleware, and Operating system to take full advantage of the feature-rich hardware. The firmware configures, controls, and monitors the communication device and interacts with the host system via device drivers to expose hardware features of the devices. Firmware code may also run as a standalone library within the device driver itself. As a part of the Software team, you will be responsible for architecture, design, implementation, testing, and integration of the firmware rolled into Ethernovia's SDK. This firmware is built ground-up for safety-critical automotive applications. Also, we build products with strict adherence to Functional Safety, and hence every team member is required to fit into a culture of safety and best development practices. Technical Qualifications - Bachelors or Master's degree in Computer Science/Software or related field. - Work Experience: Minimum 10+ years of relevant experience for this position. - Strong understanding of Software Development lifecycle including Architecture, Implementation, and Testing fundamentals. - Proficient in C/C++ Programming Language. Experience in Python is a plus. - Experience with Firmware, preferably for communication devices like Ethernet. - Experience with Embedded firmware, preferably for communication devices like Ethernet. - Experience with integration and testing of firmware and low-level code. - Hands-on Experience with Hardware and embedded processors, preferably for communication devices. - Expertise in efficient code practices for code footprint and performance. Nice to Have Experience with - Experience with simulation and emulation platforms. - GNU or a similar compiler, debugging suite. - Embedded programming, preferably with communication devices and hardware buses like I2C, SPI, Ethernet, USB. - Building Automotive or other safety-critical systems using qualification methods/processes like MISRA, ASPICE, and ISO26262. - Communication protocols like Ethernet MAC, PHY, Switching, TCP/IP, Security, Serdes, PCIe, NTB, and SR-IOV. - Video processing standards and protocols. - Code Version Control and Review tools/processes like Perforce/Git, Swarm. - Mixed Signal systems - Analog, Digital, Digital Signal Processing (DSP). - ARM family of processors or similar embedded processors. - Bootloaders like uboot or similar. Soft Skills - Self-motivated and able to work effectively both independently and in a team. - Excellent communication/documentation skills. - Attention to details. What you'll get in return: - Technology depth and breadth expansion that can't be found in a large company. - Opportunity to grow your career as the company grows. - Pre IPO stock options. - Cutting edge technology. - World-class team. - Competitive base salary. - Flexible hours.,

We are seeking a skilled and motivated DDR5/SerDes Verification Engineer to join our organization. As a DDR5/SerDes Verification Engineer, you will be responsible for verifying and validating the functionality and performance of DDR5 memory subsystems and high-speed SerDes interfaces. In addition to strong DDR5 and SerDes verification expertise, knowledge and experience with sideband I2C and I3C protocols would be considered a plus. Candidate should have Design and implement advanced verification environments and test benches using SystemVerilog/UVM Experience4-10 Job Category VLSI (Silicon engineering) Job Type Full Time Job Location IndiaBangalore

Strong understanding of transmission line theory, impedance matching, & electromagnetic effects PCIe Gen 3/4/5, DDR3/4/5, SATA, USB 3.x, Ethernet, HDMI, SERDES IBIS/IBIS-AMI, S-parameters, SPICE models, Cadence Sigrity, Keysight ADS, MATLAB, HSPICE

: 6 to 8 years of Semiconductor industry experience in Custom Mixed-Signal layout design with a bachelors degree in electrical/Electronic Engineering. Able to deliver Custom analog layouts independently from schematic to layout generation, estimating the area, optimizing floorplan, routing, and complete verification flows. Firsthand experience in critical analog layout design blocks such as Temperature sensor, Serdes, PLL, ADC, DAC, LDO, Bandgap, Ref Generators, Charge Pump, Current Mirrors, Comparator, Differential Amplifier etc. Good at LVS/DRC debugging skills and other verifications for lower technology nodes - 14nm FinFet and below. Good understanding of Matching, EM, ESD, Latch-Up, Shielding, Parasitic and short channel concepts. Familiar with EDA tools like Cadence VLE/VXL, PVS, Assura and Calibre DRC/ LVS is necessary. Understanding layout effects on the circuit such as speed, capacitance, power, and area etc. Ability to understand design constraints and implement high-quality layouts. Multiple Tape out support experience and collaborating with cross functional teams will be an added advantage. Good people skills and critical thinking abilities to resolve the issue technically and professionally. Excellent communication. Responsible for timely execution with high quality of layout design. Multiple foundries experience is an added plus. Minimum Educational Qualification : Educational Bachelor"s, Electrical or Electronics Engineering or equivalent Role And Responsibilities Responsible for Design and development of critical analog, mixed-signal, custom digital block and full chip level integration support. Perform layout verification like LVS/DRC/Antenna, EM, quality check and documentation. Responsible for on-time delivery of block-level/top-level layouts with acceptable quality. Demonstrate leadership Skill in planning, area/time estimation, scheduling, delegation and execution to meet project schedule/milestones in multiple project environment. Guide junior team-members in their execution of Sub block-level layouts & review their work Should have good experience in working with cross-functional team. Ensure standard processes and procedures are followed to resolve all client queries. Handle technical escalations through effective diagnosis and troubleshooting of client queries Manage and resolve technical roadblocks/ escalations to timely deliverable with high quality. Troubleshoot all client queries in a user-friendly, courteous, and professional manner. Offer alternative solutions to clients (where appropriate) with the objective of retaining customers" and clients" business. Build people capability to ensure operational excellence and maintain superior customer service levels of the existing account/client. Contribute to effective project-management. Effectively communicating with engineering teams in different Geographical locations to assure the success of the layout project. Works in the area of Software Engineering, which encompasses the development, maintenance and optimization of software solutions/applications.1. Applies scientific methods to analyse and solve software engineering problems.2. He/she is responsible for the development and application of software engineering practice and knowledge, in research, design, development and maintenance.3. His/her work requires the exercise of original thought and judgement and the ability to supervise the technical and administrative work of other software engineers.4. The software engineer builds skills and expertise of his/her software engineering discipline to reach standard software engineer skills expectations for the applicable role, as defined in Professional Communities.5. The software engineer collaborates and acts as team player with other software engineers and stakeholders.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field. Experience2 to 4 years The candidate should have good understanding of analog and mixed signal circuits with experience in high-speed links such as DDR PHY and/or Serdes Experience with high-speed digital circuits, memories and lab. testing is desirable Experience with Tx/Rx equalization techniques and circuits like de-emphasis, CTLE, DFE is desirable Knowledge of DDR protocols is desirable Ability to work in a dynamic environment and interact well with cross-functional teams such as design, boards, ATE etc. Applicants Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.

Role and Responsibilities: Job Title / Designation : Technical Lead Business Unit : Embedded Engineering Services (EES) Industry Experience Range : 8+ years Job Location : Pune, Ahmedabad Shift : General Shift (Mon-Fri) Area of expertise: 8+ years of hands-on experience in Embedded software development, with a track record of leading a small size team of 2-5 engineers. Expert in C/C++ programming, with extensive experience in Linux BSP and Free RTOS environments. In-depth knowledge of high-speed interfaces: PCIe (Gen3/Gen4/Gen5), USB (2.0/3.0/3.1), Ethernet (1G/10G/25G), and SerDes technologies. Strong background in Linux kernel Development, Device drivers and bootloaders (e.g. U-Boot). Solid understanding and practical experience on ARM and/or RISC-V based SoC Architecture. Proficient in high-speed interface bring-up, system level debugging, and using tools like oscilloscopes, logic analysers, and protocol analysers. Very strong analytical ability and strong experience with debugging issues at both pre-silicon and post-silicon environments. Excellent written and verbal communication and proactive interaction with internal and external stakeholders. Problem solving, curious and open-minded attitude. Nice to have Experience working with emulation platforms such as Zebu, Veloce, or Palladium. Hands-on working experience on FPGA based platforms and pre-silicon virtualization tools. Knowledge of networking protocols including TCP/IP, UDP, MQTT, HTTP, GSM, and GPRS. Exposure to wireless communication technologies such as Zigbee, Z-Wave, Matter, Bluetooth Low Energy (BLE), Thread, Wi-Fi, and Sub-GHz. Educational Criteria: BE/ME/B.Tech/M.Tech Electronics / Electronics & Communications The interested and qualified candidate can reach directly to Mr. Anup Sharma at 99099-75421 or anup.s@acldigita.com. (Request staffing partner to reach on email id)

As a PHY Hardening Engineer at Ampere, you will play a pivotal role in the development of cutting-edge expertise in high-speed digital design. You will collaborate with various teams including architects, RTL designers, packaging and PCB design teams, and post-silicon validation groups to optimize layouts, ensure signal and power integrity, and perform chip-level physical design tasks. Your expertise in managing high-speed signals and advanced packaging techniques will be crucial in delivering reliable designs that meet timing, power, and manufacturability requirements. The ideal candidate for this role is a self-motivated individual with a Bachelor's degree and 8 years of related experience or a Master's degree and 6 years of related experience. You should have a strong background in floor planning, bump planning, routing, power grid design, clock design/distribution, and optimization for high-speed digital circuits. Experience in developing high-speed digital layouts, handling chip assembly, and using EDA tools for chip-level physical verification is essential. Additionally, familiarity with signal and power integrity concepts, advanced packaging technologies, and DFT structures will be advantageous. In return, Ampere offers a comprehensive benefits package including premium medical, dental, and vision insurance, parental benefits, retirement plans, and generous paid time off. You will also enjoy fully catered lunches, healthy snacks, and energizing beverages in the office. At Ampere, we nurture an inclusive culture that encourages personal and professional growth, empowering employees to innovate and contribute to a more sustainable future through industry-leading cloud-native designs. Join us at Ampere and be part of our journey to invent the future of computing.,

Here is an excellent opportunity for you to join Cisco's Distributed Software Engineering [DSE] business unit. In this role, you will work on next-generation data center products that facilitate large-scale, low-latency, high-speed networks and switching solutions. Your contributions will better equip customers to handle growing workloads. You will have a unique chance to be involved in product development from the ground up, focusing on both Platforms and Software. As a member of a dynamic testing team, you will collaborate closely with the development team to ensure the delivery of high-quality products. Your responsibilities will include owning multiple components, understanding new feature requirements, developing test designs based on functional specifications, automating tests, and engaging with customers. Additionally, you will interact with peer engineers and technical leaders within the business unit to discuss design, functionality, and architecture across Cisco products. As a software QA engineer in this group, you will be responsible for testing, automating, and enabling platform/software solutions for customers. You will also have the opportunity to work on the Storage Area Network in conjunction with Ethernet for Cisco's product line. In this role, you will work within the Data Center Networking Group, which focuses on developing the Nexus 9000 line of data center and cloud switches. These switches prioritize application awareness to enhance network infrastructure flexibility and agility in response to application needs and virtual machine workload mobility. The group has also developed a 400G, 800G Ethernet transceiver aimed at lowering the optic's price to outperform competitor offerings. You will collaborate closely with Customers, Product Marketing, Hardware, and Software groups to deliver products effectively. As a suitable candidate for this role, you should hold a B.E/B.Tech/ME/Mtech/MS degree from a reputed university and have at least 5-10 years of software development experience in embedded systems or system software space. You should be a hands-on engineer/leader capable of contributing to architecture, design, and development of the platform development cycle. Additionally, you should possess an in-depth understanding of hardware boards and layout, along with experience in BIOS/GRUB/uboot, Linux device drivers/Linux KLM, networking stack, memory model, and other related areas. Desired qualifications include working experience in merchant silicon, knowledge of asic forwarding, Linux drivers, and 3rd party ASICs/network processors. Experience with scalable, distributed architectures and network switches is a plus. Strong written and verbal communication skills, the ability to multi-task, solve complex problems, drive a team towards results, and a passion for technology and software development are also desired qualities. Join Cisco, where every individual's unique skills and perspectives come together to power an inclusive future for all. As a Cisconian, you will experience diverse career opportunities, supported learning and development, and a culture that embraces hybrid work trends. Embrace the opportunity to connect with communities, give back through volunteering, and contribute to a more inclusive future for all. Be part of the worldwide leader in technology that powers the internet and make a difference with Cisco.,

Qualcomm India Private Limited is seeking talented Software developers to join the team, lead, and contribute towards the development of software tools. In this role, you will collaborate with cross-functional teams to ensure that the tools meet the highest standards of quality and performance. Your responsibilities will include designing, developing, and maintaining software tools and frameworks that enable customers to efficiently integrate and test chipsets across various design stages, from early development to factory testing. This is an excellent opportunity to work with cutting-edge technology and collaborate with cross-functional teams to drive customer success. The minimum qualifications for this role include a Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field with 6+ years of Hardware Engineering or related work experience. Alternatively, a Master's degree with 5+ years of experience or a PhD with 4+ years of experience is also acceptable. As a System HW Applications Engineering Engineer, Sr Staff/Manager at Qualcomm, you will be responsible for supporting customers in designing solutions using Qualcomm hardware and software. You will contribute to the dynamic Applications engineering team for end product designs in Consumer, Industrial, and IoT applications. Your role will involve successfully integrating Qualcomm solutions into customer end products across various markets such as Mobile, Compute, 5G Broadband, Automotive, IoT, and consumer electronics. Key responsibilities include gathering, integrating, and interpreting information from cross-functional teams to troubleshoot issues and find solutions. You will apply your deep and broad knowledge to anticipate and identify gaps/risks in processes, technical aspects, and close these gaps by working with a wide range of eco-system partners within Qualcomm. Additionally, you will act as a tech lead on projects, collaborate with internal partners, define product requirements, support customers on HW design signoffs, system/SoC debug, and manage a cross-functional team of engineers. Preferred qualifications for this role include expertise in embedded systems HW/SW design, board bring up, Silicon bench tests, measurements of AC/DC parameters, SOC interface parametric measurements, and basic SW integrated functional tests. Proficiency in programming languages such as C, PERL, and PYTHON is preferred. Experience with High-Speed Digital interfaces, Power management areas, ARM processors, and JTAG emulators is highly desirable. Qualcomm is an equal opportunity employer committed to providing accessible processes for individuals with disabilities. If you require accommodations during the application/hiring process, you can reach out to disability-accommodations@qualcomm.com or call Qualcomm's toll-free number. Please note that Qualcomm expects its employees to abide by all applicable policies and procedures, including those related to the protection of confidential information. If you are an individual seeking a job at Qualcomm, please refrain from using the Careers Site for staffing and recruiting purposes. Qualcomm does not accept unsolicited resumes or applications from agencies. For more information about this role, please contact Qualcomm Careers.,

As an Analog Design Engineer at Sykatiya Technologies, you will be an integral part of our highly talented team that focuses on Technical Ability and a positive Attitude. Your contributions to projects will reflect our commitment to excellence for our customers. Our team consists of skilled engineers and experts in Design Verification, DFT/Test, Physical Design, and Analog Design for ASICs. We are looking for an Analog Design Engineer with 3-12 years of experience to join our team in Bangalore. The ideal candidate will have experience in transceiver design for high-speed interfaces such as DDR, HBM, PCIe, USB3, and JESD204. Exposure to nodes below 22nm is a plus, along with experience in FINFET technology and the 32G-112G range of SERDES. In this role, you will be responsible for taking at least one block from circuit design to layout closure. You should also be able to guide the layout team in high-performance matched circuit design. Understanding reliability requirements such as ESD, EMIR, EOS, Aging, and being able to work independently while mentoring junior team members are essential qualities we are looking for. If you have exposure to post-silicon validation, it would be considered a plus. Join us at Sykatiya Technologies and be part of a dynamic team that values technical expertise, a positive attitude, and a commitment to excellence in Analog Design.,

You will be responsible for the Embedded Firmware for Ethernovia's Networking devices. This responsibility includes developing firmware that configures, controls, and monitors the communication device and interacts with the host system via device drivers to expose hardware features of the devices. As a part of the Software team, you will be responsible for architecture, design, implementation, testing and integration of the firmware rolled into Ethernovia's SDK. This firmware is built ground-up for safety critical automotive application. Also, we build products with strict adherence to Functional Safety and hence every team member is required to fit into a culture of safety and best development practices. Technical Qualifications: - Bachelors or Master's degree in Computer Science/Software or related field. - Work Experience: 3 years for Mid-level and 7 years for Senior Level position. - Strong understanding of Software Development lifecycle including Architecture, Implementation and Testing fundamentals. - Proficient in C/C++ Programming Language. Experience in Python is a plus. - Experience with Firmware, preferably for communication devices like Ethernet. - Experience with Embedded firmware, preferably for communication devices like Ethernet. - Experience with integration and testing of firmware and low-level code. - Hands-on Experience with Hardware and embedded processors, preferably for communication devices. - Expertise in efficient code practices for code footprint and performance. Nice to Have Experience with: - Experience with simulation and emulation platforms. - GNU or similar compiler, debugging suite. - Embedded programming, preferably with communication devices and hardware buses like I2C, SPI, Ethernet, USB. - Building Automotive or other safety critical systems using qualification methods/processes like MISRA, ASPICE and ISO26262. - Communication protocols like Ethernet MAC, PHY, Switching, TCP/IP, Security, Serdes, PCIe, NTB, and SR-IOV. - Code Version Control and Review tools/processes like Perforce/Git, Swarm. - Automation and DevOps tools like Jenkins. - Mixed Signal systems - Analog, Digital, Digital Signal Processing (DSP). - ARM family of processors or similar embedded processors. - Bootloaders like uboot or similar. Soft Skills: - Self-motivated and able to work effectively both independently and in a team. - Excellent communication/documentation skills. - Attention to details. What you'll get in return: - Technology depth and breadth expansion that can't be found in a large company - Opportunity to grow your career as the company grows - Pre IPO stock options - Cutting edge technology - World-class team - Competitive base salary - Flexible hours - Medical, dental and vision insurance for employees - Flexible vacation time to promote a healthy work-life balance,

As a Silicon Design Validation Engineer at Lattice, you will have the opportunity to be part of a dynamic team working on cutting-edge FPGA projects. This role involves validating building blocks in FPGA on the board level to ensure functionality and performance according to design intent. The FPGA includes various IPs such as SERDES (PMA/PCS), Memory DDR (DDR4, LPDDR4, DDR5, etc.), DPHY, PLL, DSP, Fabric, I/O, among others. In this position, you will learn how to validate one or many building blocks within the FPGA and gain knowledge of the process and methodology required for validating IPs from planning to completion. You will work with advanced equipment, boards, and software/tools while developing validation and characterization plans for specific IPs, bench hardware, and software. You will also create test logic RTL to conduct validation and characterization tests, drive new silicon product bring-up, validation, and debug processes, and analyze data sheet parameters. The ideal candidate for this role is highly motivated to develop a career in Silicon Design Validation Engineering. You will have exposure to various areas including FPGA and its building blocks, IP validation, bench hardware and software development, and more. You will lead and manage teams, possess an electrical engineering degree, have expertise in high-speed Serdes interface characterization, high-speed board design, Verilog/VHDL, FPGA development tools, test automation development, statistical analysis concepts, and bench equipment for device characterization. To excel in this role, you should have strong written and verbal communication skills, be self-motivated, proactive, possess critical thinking skills, and demonstrate good problem-solving and debugging abilities. If you thrive in a fast-paced, results-oriented environment and are looking to contribute to a team-first organization, Lattice may be the perfect fit for you.,

Youzentech Technologies is currently seeking an experienced Analog IC Layout Engineer to be a part of our team in Hyderabad. If you possess 5-10 years of expertise in Custom Mixed-Signal Layout Design, we are eager to hear from you. The position is based in Hyderabad/Bangalore and requires the following qualifications and responsibilities: - Proficiency in Full Custom & Semi-Custom Analog IP & IC Layout, starting from schematic to verification - Hands-on experience with various components including Temperature Sensor, SerDes, PLL, ADC, DAC, LDO, Bandgap, Charge Pump, Current Mirrors, Differential Amplifier, and more - Skilled in LVS/DRC debugging & verification for 16FF and below nodes (TSMC, Samsung, GF) - Strong understanding of EM, ESD, Shielding, Parasitic, and Layout-dependent effects - Familiarity with Cadence, Calibre, Assura, Redhawk, and Totem for verification purposes - Experience in supporting multiple Tape-outs and collaborating with cross-functional teams - Knowledge of Layout automation (SKILL/PERL) would be an added advantage - Mandatory experience with TSMC 7nm technology If you meet the requirements and are interested in this opportunity, please share your resume with us at amith.m@youzentech.com.,

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. Responsibilities Front-End implementation of SERDES high speed Interface PHY designs RTL development and its validation for linting, clock-domain crossing, conformal low power and DFT rules. Work with functional verification team on test-plan development and debug. Develop timing constraints, deliver synthesized netlist to physical design team, and provide constraints support for PD STA. UPF writing, power aware equivalence checks and low power checks. DFT insertion and ATPG analysis for optimal SAF, TDF coverage. Provide support to SoC integration and chip level pre/post-silicon debug. Skills & Experience MTech/BTech in EE/CS with hardware engineering experience of 4 to 7 years. Experience in micro-architecture development, RTL design, front-end flows (Lint, CDC, low-power checks, etc.), synthesis/DFT/FV/STA. Experience with high-speed interface design and good understanding of Industry standard protocols like USB/PCIe/MIPI, etc. is desirable. Experience with post-silicon bring-up and debug is a plus. Able to work with teams across the globe and possess good communication skills.

Hands on experience in Circuit Design implementation of IPs including LDOs, Band Gap reference, Good working knowledgein Current Generators, POR, ADC/DACs, PLLs, Oscillators, Good working knowledge in General Purpose IOs, Temperature sensor, SERDES, PHYs, Good in Die to Die interconnect, High-speed IOs,

Analog Mixed Signal Circuit Designer Role - Lead / Principal Engineer / Director Desired Experience and Skills In-depth understanding and practical experience in analog mixed-signal circuit design, including areas such as PLL, DLL, CDR, transceivers, clocking circuits, data converters, LDO, BG, DC-DC converters, and high-speed circuits (USB, DDR, SerDes). Proven hands-on experience in transistor-level design and verification of analog circuits to meet functional and performance specifications. Skilled in leading technical teams, providing mentorship, and guiding engineers in execution and delivery. Knowledgeable in advanced process nodes and experienced in addressing design challenges during migration to newer technology/process nodes. Familiarity with modeling and AMS verification is a plus. Strong ability to communicate effectively and interact with customers. A collaborative team player.

Lead and manage the analog and RF layout team for high-performance semiconductor products Oversee layout planning, floorplanning, and routing for RF, analog, and mixed-signal IC designs. Work closely with circuit design teams to optimize layouts for performance, area, and manufacturability. Ensure DFM (Design for Manufacturability), DRC (Design Rule Check), LVS (Layout vs. Schematic), and EM (Electromigration) compliance. Drive automation and layout methodologies to improve efficiency and quality. Collaborate with foundry partners for process design kits (PDKs), layout guidelines, and tape-out requirements. Provide technical mentorship to layout engineers and review critical blocks. Own full-chip layout integration and support post-layout simulations. Qualifications: 8+ years of experience in analog/mixed-signal/RF IC layout. Strong expertise in FinFET (e.g., 16nm, 7nm, 5nm) or advanced CMOS nodes. Hands-on experience with Cadence Virtuoso, Calibre DRC/LVS, and Mentor Graphics tools. Knowledge of high-frequency layout techniques, parasitic-aware layout design, and shielding strategies. Experience in power management, high-speed SerDes, RF front-ends, or ADC/DAC layouts is a plus. Proven ability to lead teams, review layouts, and drive tape-out schedules. Strong understanding of wafer-level packaging and chip integration. Excellent problem-solving and communication skills.