15 Crosstalk Jobs

Job Description 5+ experience in Analog layouts in advanced nodes (16nm/10nm/ 7nm/5nm/3nm ). Should have experience on block level, IP level and chip level layouts. Should have hands-on experience in creating layout of critical blocks such as LDO,ADC,DAC,Bandgap,Buck and boost converters etc.. Good understanding of analog layout fundamentals such as matching,WPE,STI,LOD,Electromigration,crosstalk,latchup etc.. Ability to understand design constraints and implement high quality layouts. Strong debug and problem solving skills for LVS,DRC,Antenna and EM/IR. Multiple tape out support experience will be an added advantage. Excellent written and oral communication skills required. Proven experien...

Job Title: Signal and Power Integrity (SIPI) Engineer Location: Bangalore Company: Mettlesemi Systems and Technologies Pvt Ltd Employment Type: Full-time Experience Level: Mid to Senior-Level IMMEDIATE TO 30 DAYS JOINEES. Job Description: Mettlesemi is seeking a skilled and driven Signal and Power Integrity (SIPI) Engineer to support a high-profile client in the semiconductor industry. This is a unique opportunity to contribute at the cutting edge of package and PCB co-design, optimizing high-speed interfaces and power delivery systems. You will work with industry-standard technologies such as PCIe, USB, MIPI, and LPDDR, playing a key role in enhancing system performance through advanced sim...

Role Overview: As a member of Tata Electronics Private Limited (TEPL), you will be responsible for integration tasks to develop CMOS Image Sensor technologies on various nodes ranging from 28nm to 180nm. Your role will involve optimizing technology parameters such as Quantum Efficiency, Pixel Size, Cross-talk, and Dark current across wavelengths from 400-800nm. Additionally, you will work on both BSI and FSI technologies, ensuring Global and Rolling shutter capabilities. Your responsibilities will also include designing and laying out test chips for device/technology optimization, assisting in SPICE model and design kit creation, and maintaining core CMOS transistor performance for 3T/4T pix...

As an RFIC/MMIC Layout Engineer, your role involves designing, planning, scheduling, and executing Full Chip development with analog and digital components. You will be responsible for performing Full chip feasibility and die size estimation, expertise in floorplan, power schemes, Interface signal planning and routing, physical verification, and quality check. It is crucial to deliver quality full chip layout on-schedule meeting design intent including Speed, Capacitance, Resistance, Power, Noise, and Area. You will work on complex issues, exercise judgement in selecting methods, and build strong business relationships with cross-functional teams for project execution. Working closely with S...

We are seeking an experienced, highly motivated and high-caliber individual to build these differentiating products. Does this sound like a good role for you Senior/Lead STA Engineer (R&D Engineering) Location: Hyderabad & Bhubaneswar & Bangalore Experience: 5yrs to 15yrs Strong experience in STA concepts , tools and methodologies at IP/subsystem/chip levels Hands-on experience in Synthesis, pre-layout STA, post-layout STA, CTS tools Ability to understand IP/subsystem design and come up with STA plan/checkers and reviews Sound knowledge of standard ASIC RTL2GDS physical implementation and signoff flows Exposure to design implementation and signoff of soft & mixed-signal IPs and subsystems Ex...

As an IO Layout Engineer at our company, you will play a crucial role in the layout design of IO blocks such as GPIO, Analog IOs, High-Speed IOs, and Pad ring. Your responsibilities will include: - Working on IO layout for ASIC controllers under the guidance of senior team members. - Collaborating closely with designers to understand design constraints and create quality layout efficiently. - Managing all the Sign Off PV & quality checks on an IP layout. To excel in this role, you are required to meet the following qualifications and requirements: - Hold a Bachelor's or Master's degree in Electronics & Communication/Electrical engineering. - Possess 4 to 8 years of working experience in IO l...

Job Requirements Bachelor's or master's Degree with 3-10 years of Analog Layout experience. Good understanding of advanced semiconductor technology process and device physics. Full-custom circuit layout/verification and RC extraction experience. Experience in one or more of the following areas is preferable : Mixed signal/analog/high speed layout, e.g. PLL, IO, RF, PMIC, OSC, DC-DC convertor, Temperature sensor, SRAM, TCAM, ROM, MRAM, ESD Familiar with Cadence Virtuoso environment and various industry physical verification tools (DRC,LVS,DFM, etc). Experiences in advanced technology node under 16nm/14nm/7nm. 5nm/3nm will be an added advantage. Must have expertise on Totem EMIR & Self-heating...

As a Senior Analog Layout Engineer at Xeedo Technologies working for Micron Technology, you will be responsible for designing analog and custom digital layout blocks in advanced CMOS technologies. Your primary role will involve performing full physical verification using Mentor Graphics Calibre tools, ensuring first-pass silicon success, and collaborating with global design teams for successful project execution and tape-outs. Key Responsibilities: - Design and develop analog and custom digital layout blocks - Perform full physical verification using Mentor Graphics Calibre - Interpret circuit schematics to optimize layouts - Plan, estimate, and track layout tasks - Collaborate with cross-fu...

Role & responsibilities 6-8 years of experience in high-speed SI/PI simulations and testing •Should have hands on experience on interfaces such as PCIe gen 3/4/5, DDR 4/5, LPDDR 4/5, 10G Ethernet, USB 3.2 gen 1&2.Should be able to perform pre and post layout analysis (die/pkg/board) •Should have knowledge about stack-up selection which includes dielectric materials, copper thickness & impedance control •Should be able to analyze S-Parameters which includes insertion loss, return loss, crosstalk & TDR •Should have hands on experience in simulation using IBIS/IBIS-AMI models.Good to have hands on experience with Oscilloscope & VNA.Ability to identify technical issues and analyze their root cau...

As a CAD Applications Engineer at Micron Technology, Inc., you will be working in a collaborative, production support role evaluating, improving EDA and debugging both in-house and commercial Electronic Design Automation (EDA) tools and flows for Static Timing Analysis (STA). You will work closely with the Design teams to increase their productivity and work efficiency. Responsibilities and Tasks include, but are not limited to: - Deliver methodology and tool solutions for static timing closure and power optimization. - Deploy innovative modeling and optimization approaches to achieve globally optimal targets. - Prudently apply best-in-class algorithms and ECO techniques for value-adding des...

As an RFIC/MMIC Layout Engineer, you will be responsible for the design, planning, scheduling, and execution of Full Chip development involving analog and digital components. Your key responsibilities will include: - Performing Full chip feasibility and die size estimation for different bonding schemes - Demonstrating expertise in floorplan design, power schemes, signal planning, routing, physical verification, and quality check - Ensuring the delivery of quality full chip layout on-schedule while meeting design intent criteria such as Speed, Capacitance, Resistance, Power, Noise, and Area - Handling complex issues and using judgment to select appropriate methods for obtaining results - Esta...

Job Description: Role and Responsibilities: Develops and prepares stdcells layouts and detailed drawings of the semiconductor devices from schematics and related geometry provided by design engineering. Work may be completed through use of CAD or other computerized equipment. Checks dimensions, writes specifications, and verifies completed drawings, artwork or digitized plots. Check design layouts and detailed drawings. 3-5 years of experience. Qualification/Requirements: Must have 3-5 of experience in standard cell layout, analog, mixed-signal and custom digital block designs in advanced CMOS process. Should have expertise in multiple standard cell layout library developments. Should be abl...

Job Description: Role and Responsibilities: Develops and prepares stdcells layouts and detailed drawings of the semiconductor devices from schematics and related geometry provided by design engineering. Work may be completed through use of CAD or other computerized equipment. Checks dimensions, writes specifications, and verifies completed drawings, artwork or digitized plots. Check design layouts and detailed drawings. 3-5 years of experience. Qualification/Requirements: Must have 3-5 of experience in standard cell layout, analog, mixed-signal and custom digital block designs in advanced CMOS process. Should have expertise in multiple standard cell layout library developments. Should be abl...

Static Timing Analysis (STA) Engineer with hands-on experience in timing validation, analysis, and closure for complex SoC designs. Should have a strong background in STA flows using Tempus, along with a solid understanding of deep submicron nodes. Required Candidate profile Expertise in STA using Cadence Tempus, timing validation across multiple PVT corners, DMMMC flows, and timing closure at both block and full-chip levels, skills in TCL and Python are essential

Our vision is to transform how the world uses information to enrich life for all. Micron Technology is a global leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate, and advance faster than ever. Joining our inclusive team means focusing on relentless innovation for customers and partners, contributing to integrity, sustainability, and community support to drive the very innovation we pursue. As a CAD Applications Engineer at Micron Technology, Inc., you will collaborate in a production support role to evaluate and enhance Electronic Design Automation (EDA) tools and flows for STA Anal...