Analog Layout Engineer Acesoft Labs India Private Limited

3.0 - 5.0 years

8 - 23 Lacs

Hyderabad, Telangana, India

On-site

Experience: 3-5 years Notice period: immediate - 15 days Location: Hyderabad Interview: 2-3 rounds Mandate Skills: Electro-migration, Latch-up, coupling, crosstalk, IR-drop, parasitic analysis, CMOS process, standard cell layout, analog, mixed-signal and custom digital block designs , Virtuoso schematic editor Virtuoso layout L, XL & Verification tools like Mentor Caliber Interested Engineers can share their resumes at [HIDDEN TEXT] Note: matching profiles will get get Mail/Call from us.

Posted 1 month ago

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Staff Physical Design Engineer IBM

5.0 - 8.0 years

0 Lacs

Bengaluru / Bangalore, Karnataka, India

On-site

Introduction Physical design team is responsible for designing high performance microprocessor blocks for IBM Power and z mainframe servers. Your role and responsibilities . Responsible for high performance microprocessor blocks RTL to GDSII implementation . Perform block level synthesis, floor-planning, placement and routing. . Close the design to meet timing, power budget and area. . Implement ECOs to address functional bugs and timing violations. . Team player, with good problem solving and communication skills. Required education Bachelors Degree Preferred education Masters Degree Required technical and professional expertise 5-8 years industry experience in physical design methodology. Good knowledge andhands on experience in physical design methodology which include logic synthesis,placement, clock tree synthesis, routing . Should be knowledgeable in physical verification ( LVS,DRC.. etc), Noise analysis, Power analysis and electro migration . Team player with good problem solving skills, communication skills and leadership skills. Preferred technical and professional experience Automation skills in PYTHON, PERL ,SKILL and/or TCL

Posted 2 months ago

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