4943 Verilog Jobs - Page 48

NVIDIA System-On-Chip (SOC) group is hiring for a Design Engineer! The complexity of the chips we build has increased manifold over the years. We are now packing tens of billions of transistors in a chip to meet the growing computing demand. We are looking for a top ASIC Design Engineer. In this role, you should have real passion for RTL design implementation and methodologies that enable high quality system-level IP design. What You'll Be Doing Be an integral part of the team defining and developing system-level RTL and methodologies to measure performance on the industry's leading GPUs/SOCs. Design and implement RTL features - work through the entire design cycle for SOC. Run and debug RTL...

Senior Principal Engineer – Analog Design Location: Bangalore We are a global company that makes industry-leading memory interface chips and Silicon IP to advance data center connectivity and solve the bottleneck between memory and processing We are a premier chip and silicon IP provider, is seeking to hire an exceptional Principal Engineer – Analog Design to join our memory interface chip design team in Bangalore. Candidates will be joining some of the brightest inventors and engineers in the world to develop products that make data faster and safer. As a Principal Engineer – Analog Design, the candidate will be reporting to Director Engineering and is a Full-Time position. The candidate wi...

Senior Principal Logic Design Engineer Location: Bangalore We are a global company that makes industry-leading memory interface chips and Silicon IP to advance data center connectivity and solve the bottleneck between memory and processing As a SPE Logic Design Engineer, you’ll play a pivotal role in designing and implementing the world’s best Registered Clocking Driver (RCD) products. In this full-time role, you’ll report directly to our Logic Design Manager. Our MIC IDC is dedicated to leverage over three decades of high-performance memory expertise to deliver cutting-edge memory interface chipset solutions, enhancing memory bandwidth and capacity for data centers and client applications a...

Senior Principal Engineer – Analog Design Location: Bangalore We are a global company that makes industry-leading memory interface chips and Silicon IP to advance data center connectivity and solve the bottleneck between memory and processing We are a premier chip and silicon IP provider, is seeking to hire an exceptional Principal Engineer – Analog Design to join our memory interface chip design team in Bangalore. Candidates will be joining some of the brightest inventors and engineers in the world to develop products that make data faster and safer. As a Principal Engineer – Analog Design, the candidate will be reporting to Director Engineering and is a Full-Time position. The candidate wi...

Senior Principal Logic Design Engineer Location: Bangalore We are a global company that makes industry-leading memory interface chips and Silicon IP to advance data center connectivity and solve the bottleneck between memory and processing As a SPE Logic Design Engineer, you’ll play a pivotal role in designing and implementing the world’s best Registered Clocking Driver (RCD) products. In this full-time role, you’ll report directly to our Logic Design Manager. Our MIC IDC is dedicated to leverage over three decades of high-performance memory expertise to deliver cutting-edge memory interface chipset solutions, enhancing memory bandwidth and capacity for data centers and client applications a...

Company Qualcomm India Private Limited Job Area Engineering Group, Engineering Group > Systems Engineering General Summary Job Description Analyze and evaluate GPU architecture/microarchitecture and workload for performance and power optimizations GPU power modeling and estimation for projection and correlation GPU workload analysis, profiling, and characterizations Analyze, model, and minimize GPU register, logic, memory, and clock power Develop and maintain tests for pre-silicon and post-silicon power verifications. Work closely with multiple teams such as RTL designer, architecture, design verification, compiler, driver, silicon implementation, and post-silicon teams Knowledge of Graphics...

TITLE: Design Verification Engineer LOCATION: GREATER HYDERABAD AREA Company Description We are a technology consulting company delivering best-in class Chip Design Services. Founded in 2008, we partner with top semiconductor companies in building a connected, safer tomorrow. With over 40+ tapeouts and expertise spanning the breadth of chip design, we offer a wide variety of Semiconductor skills Job Description Exposure to various interface IP like I2C/SPI/UART/USB/NVM/PCIe; Buses AXI/AHB/APB; ARM based SoC designs is needed. Skills: Overall 5-10 years industry experience with atleast 3+ years in Design Verification using System-Verilog/C/UVM. Generic knowhow on Digital Design and Verificati...

JD Design Verification • Understanding the business requirements and functional specifications of the IPs, subsystems and SOC • Creating Verification Environment Architecture document • Reviewing and Revising: working towards meeting agreed upon acceptance criteria • Developing code in System Verilog, UVM (Universal Verification Methodology), C for Unit, Subsystem and SOC level verification • Performing RTL simulations using Synopsys and Cadence simulators • Debugging and resolving problems found by simulations .Performance test plan development and maintenance • Development of transactors, monitors and models for performance verification. • Implement performance verification flow including ...

Role : ASIC RTL Engineer / Digital Design Location: Bangalore, Hyderabad, Pune Mandatory Skill RTL, Coding, Design, IP Design, SOC Development, Lint, CDC , Micro Architecture PCIe/DDR/Ethernet - Any One I2C,UART/SPI - Any One Spyglass Lint/CDC / Synopsys DC / Verdi/Xcellium - Any One Scripting languages like Make flow, Perl ,shell, python - Any One Good To Have processor architecture / ARM debug architecture debug issues for multiple subsystems create/review design documents for multiple subsystems Able to support physical design, verification, DFT and SW teams on design queries and reviews Details JD Expertise in SoC subsystem/IP design Expertise in IP design, Subsystem/Cluster and SoC leve...

As a Silicon Design Validation Engineer at Lattice, you will have the opportunity to work on cutting-edge projects within Lattice's Silicon Engineering team. Your role will involve validating building blocks in FPGA on a board level to ensure functionality and performance align with the design intent. You will work with various IPs such as SERDES (PMA/PCS), Memory DDR (DDR4, LPDDR4, DDR5, etc.), DPHY, PLL, DSP, Fabric, I/O, and more. Your responsibilities will include developing validation and characterization plans, creating test logic RTL, driving new silicon product bring-up, and collaborating with cross-functional teams to ensure successful product release. Key Responsibilities: - Valida...

Staff Gen AI based DV Methodology Engineer We are a US based Stealth mode Start-up location: Hyderabad / Bangalore / Remote ( any where in India ) We unify the processes used in Semiconductor and Hardware Systems design - thus reducing bugs, improving efficiency and productivity Our breakthrough technology has drawn investment from Silicon Valley’s boldest VCs and semiconductor pioneers. Beyond capital, they bring decades of expertise and powerful networks, Senior Application Engineer, AI based CAD systems This role offers an exceptional opportunity to lead product definition, validation and customer engagement. Key Responsibilities: Work with the software development team to define the deta...

As a Synthesis & STA engineer, you will be responsible for performing RTL Synthesis to optimize the Performance/Power/Area of the designs. Your role will involve DFT insertions such as MBIST and SCAN, setting up Timing Constraints for functional and Test Modes, and Validation. You will be expected to create Power Intent for the designs, verify power intent on RTL, run static Low-Power checks on gate level netlists, and ensure Logic Equivalency Checks between RTL to Gates and Gates to Gates. Collaborating with the Design/DFT/PD teams, you will set up signoff Static Timing Analysis and ECO flows to achieve timing closure. Additionally, you will be involved in Power Analysis, estimating power a...

You are a highly skilled and experienced Full Chip RTL Design Architect sought by the company to join their dynamic team. Your role involves a deep understanding of RTL (Register-Transfer Level) design, SoC (System-on-Chip) architecture, and a passion for innovation in semiconductor design. You will be pivotal in defining and implementing full chip-level RTL designs to ensure successful execution. - Define and develop full chip architecture and RTL designs for complex SoCs. - Drive top-level integration of IPs and subsystems into full chip designs, ensuring design quality and efficiency. - Collaborate on micro-architectural specifications and ensure seamless implementation. - Develop and opt...

We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a highly skilled R&D Staff Engineer passionate about pushing the boundaries of static low power verification products. With 5 to 8 years of experience in software engineering, you have honed your expertise in C/C++ and possess a robust understanding of data structures and ...

Job Description Role Purpose The purpose of this role is to lead the VLSI development and design of the system by defining the various functionalities, architecture, layout and implementation for a client Do 1. Lead end to end VLSI components & hardware systems a. Design, analyze, develop, modify and evaluate the VLSI components and hardware systems b. Determine architecture and logic design verification through software developed for component and system simulation c. Analyze designs to establish operating data, conducts experimental tests and evaluates results to enable prototype and production VLSI solutions d. Conduct system evaluations and make appropriate recommendations to modify desi...

Job Description Role Purpose The purpose of this role is to perform the development of VLSI system by defining the various functionalities, architecture, layout and implementation for a client Do 1. Conduct verification of the module/ IP functionality and provide customer support a. Understand the architecture of the module or the IP and create verification environment and the development plan as per Universal Verification Methodology b. Create test bench development and test case coding of the one or multiple module c. Write the codes or check the code as required d. Execute the test cases and debug the test cases if required e. Conduct functional coverage analysis and document the test cas...

Meet the Team Join the Cisco Silicon One team in developing a unified silicon architecture for web-scale and service provider networks. Cisco''s silicon team provides an outstanding, unique experience for ASIC engineers by combining the resources offered by a sizable multi-geography silicon organization and a large campus (with an on-site gym, healthcare, caf, social interest groups, and philanthropy) with the startup culture and breadth of growth opportunities that working in a smaller ASIC team can provide. Your Impact Write micro-architecture specifications and participate in reviews. Implement Verilog RTL to meet timing, performance, and power requirements. Contribute to full chip integr...

Software Engineer- C Programming,Networking platform development, PHY drivers, SERDES, SFP- 4-8 Years Meet the Team The Enterprise Switching organization delivers top-tier products, with the Catalyst Cat9000 series leading in core, aggregation, and access switching for security, IoT, and Cloud. These switches are critical for SD-Access, Cisco''s intent-based networking architecture, offering the bandwidth, speed, and scale needed for hybrid work environments. They improve security with PoE power and AI/ML for zero-trust security and provide outstanding network experiences both on-premises and in the cloud through Cisco DNA Center or the Meraki Dashboard. The new Catalyst 9000X models offer f...

Role : Sr. FPGA Engineer Work Location : Hyderabad Years of experience : 4+ Years Work mode: Work from Office Notice Period expectations- Immediate to 45 Days Responsibilities Experience on FPGA platforms like AMD(XILINX)/Altera. Basic STA knowledge along with tools like Vivado. Expertise in digital hardware designing using Verilog on large AMD(Xilinx)/altera FPGAs Experience in scripting language like perl, python and tcl Working experience on Linux. Ensure to complete design and timing verification tasks within allotted timelines. Ability to work individually and in a team Design, implementation, test, integration, and delivery of system level digital designs for FPGA blocks timing verific...

We are seeking a visionary Staff Engineer as part of System Validation Infra to join our team in Bengaluru, India. In this pivotal role, you will lead the technical direction of our engineering efforts, drive innovation, and mentor our talented team of engineers. As a Staff Engineer, you will be at the forefront of designing and implementing cutting-edge solutions and monitoring infra tools and systems deployment that shape the future of our products. Working on high-performance Infra software that meet business requirements and industry standards Working on the development of technical strategies and roadmaps to guide long-term engineering initiatives Collaborate with cross-functional teams...

Develop/Maintain tests for functional verification and performance verification at the core level Build testbench components to support the next generation IP Maintain or improve current test libraries to support IP level testing Create hardware emulation build to verify the IP functional performance Maintain and improve current hardware emulation environment to speed up the runtime performance and improve the debug facility Provide technical support to other teams PREFERRED EXPERIENCE: Good at C/C++ Familiarity with SystemVerilog and modern verification libraries like UVM Experience/Background on Computing/Graphics is a benefit Experience with OpenGL/OpenCL/D3D programming is a benefit

Be proficient at VHDL, AMD/Xilinx Vivado tool-set, RTL Coding style Signal processing, Serial communication protocols, state machines, memory interface architecture and simulation. Use lab test tools- logic analyzer, oscilloscope, multimeter etc.

About the Role: We are seeking an experienced Design Verification Engineer with 5 to 10 years of hands-on experience in verifying complex digital designs, particularly in IP cores, SoCs, and PCIe protocols. The ideal candidate will have deep expertise in developing and executing verification plans, writing testbenches, and automating verification environments to ensure high-quality silicon delivery. Key Responsibilities: Develop and implement comprehensive verification plans and strategies for IP, SoC, and PCIe blocks. Create and maintain advanced verification environments using SystemVerilog, UVM (Universal Verification Methodology), and other relevant methodologies. Write and debug directe...

We are looking for skilled Senior ASIC/SoC RTL Engineer / Lead / Managers with 5-20 years of experience to join our team in Bangalore, Chennai, Hyderabad, Kochi, Pune, Noida, and Ahmedabad. The ideal candidate will have expertise in SoC/IP design, Subsystem/Cluster and SoC level integration using Verilog/System Verilog, AMBA bus protocols (AXI, AHB, ATB, APB), interface protocols, and scripting languages like Make flow, Perl, shell, and Python. Roles and Responsibility Design and develop high-quality ASIC/SoC RTL code. Lead the development team in integrating subsystems and clusters at the SoC level. Collaborate with cross-functional teams to ensure successful project execution. Develop and ...

Description: Responsible for top-level IC verification using Verilog-AMS. This role requires modeling analog blocks, developing test specifications, running simulations, and maintaining regression environments. LOCATION: Bangalore / NOIDA