DV Engineer

• A major part of your responsibility will be to take an independent verification role in developing TB architecture definition and TB infrastructure/test coding development for PCIe/Networking/IP Sub-Systems.
• Understanding product specifications and deriving the TB architectures.
• Developing verification plan, test plan, coverage plan, assertions, etc.
• Developing block-level and multi block-level verification environments & reusable verification components based on SV/UVM methodology.
• Coverage metrics to ensure conformity, running regressions, debug test failures, and regression management.
• Knowledge and working experience with any of the complex protocols like PCIe/Ethernet/DMAs/Cryptography/Others an advantage.
• Experience in scripting languages like Perl or Python.
• Knowledge in AMBA AXI,APB, etc. an advantage.
• Ability to work collaboratively with other team members and have good ownership and accountability.
• Assisting validation teams with on board-level test issues, educating design teams on verification methodology.
• Contributing to process improvement in verification methodologies that impact productivity.
• Strong oral and written communication skills, problem-solving and analytical skills.

Job Requirements:

• Working experience with latest SOC tools including Questa, Cadence Conformal, VCS simulation.
• B.E/M.E/M.Tech or B.S/M.S in EE/CE