DV Engineer (PCIE)

Job Description

Job Summary:

We are looking for a highly experienced and motivated Senior Design Verification Engineer with a deep understanding of the PCIe protocol and hands-on experience in SystemVerilog and UVM. The ideal candidate will lead verification activities for complex PCIe subsystems or SoCs, and contribute to building scalable, reusable verification infrastructure.

Key Responsibilities:

• Develop UVM-based verification environments for

  PCIe IPs or SoCs

  .
• Define and execute comprehensive verification plans for PCIe Gen3/Gen4/Gen5/Gen6 features.
  
• Drive testbench development, stimulus generation, scoreboarding, and coverage closure.
  
• Validate protocol compliance including LTSSM, TLP/DLLP, BAR/Address decoding, and interrupt mechanisms.
  
• Work closely with RTL, DFT, and system validation teams for debug and feature bring-up.
  
• Conduct assertion-based verification and participate in formal verification as needed.
  
• Collaborate with cross-functional teams to ensure successful first-silicon quality.
  

Required Skills & Experience:

• B.E./B.Tech or M.E./M.Tech in ECE
  
• 8+ years of experience in ASIC/SoC design verification.
  
• Proven expertise in SystemVerilog, UVM, and complex testbench development.
  
• Deep knowledge of PCIe protocol (Gen3/Gen4/Gen5/Gen6).
  
• Experience in verifying Root Complex (RC) and Endpoint (EP) configurations.
  
• Familiarity with AMBA protocols (AXI, AHB) and memory-mapped IO.
  
• Proficiency with EDA tools like VCS, Questa, Verdi, SimVision.
  
• Strong debugging and analytical skills, particularly with PCIe protocol analyzers and simulation waveforms.
  
• Scripting proficiency in Python, Perl, TCL, or Shell for automation.
  

Nice to Have:

• Knowledge of low power (UPF) and DFT concepts.
  
• Familiarity with Formal Verification, Portable Stimulus, or Emulation.
  
• Exposure to hardware validation, bring-up, or post-silicon debug.
  
• Domain experience in datacenter, storage, networking, or automotive industries.
  

Soft Skills:

• Strong communication and documentation skills
  
• Problem-solving mindset and attention to detail
  
• Leadership in driving verification tasks and mentoring junior engineers