Digital Design Engineer

Role Overview: You are a highly motivated Senior RTL Design Engineer who will be responsible for designing and implementing digital circuits and systems, with a focus on logic, timing, and power optimization. Your role involves writing RTL code, simulating, and verifying designs to ensure functionality meets performance requirements. You will collaborate with physical design, verification, and software teams to integrate and validate the design in the overall system. This position is based in Bangalore. Key Responsibilities: - Own specification, micro-architecture, and RTL implementation of digital IP/SoC subsystems. - Write synthesizable RTL code (SystemVerilog/Verilog/VHDL) and ensure design quality through lint, CDC, and synthesis checks. - Collaborate with architects to understand design requirements and translate them into efficient micro-architectures. - Drive block-level and subsystem-level integration into SoC. - Work with verification teams to review test plans, support debug, and close coverage. - Perform timing analysis and design optimization to meet performance, power, and area goals. - Contribute to design reviews, coding guidelines, and best practices. - Prior experience with protocols like AXI, PCI, NOCs, and PCIe is preferred. - Knowledge of encryption algorithms is an added advantage. - Collaboration with Verification team, PD team, and DFT team. - Perform design optimization using UPF, VCLP, LEC, and ECOs. Qualification Required: - Minimum 7.5 years of experience in RTL Design. - Educational Qualification: 15 years of full-time education.,