NVIDIA has continuously reinvented itself. Our invention of the GPU sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. Today, research in artificial intelligence is booming worldwide, which calls for highly scalable and massively parallel computation horsepower that NVIDIA GPUs excel. NVIDIA is a “learning machine” that constantly evolves by adapting to new opportunities that are hard to solve, that only we can address, and that matter to the world. This is our life’s work , to amplify human creativity and intelligence. As an NVIDIAN, you’ll be immersed in a diverse, supportive environment where everyone is inspired to do their best work. Come join our diverse team and see how you can make a lasting impact on the world! As part of the CAD team our engineers develop and support tools for all of NVIDIA's semiconductor products. In addition, they also develop in-house tools in the area of Design for Test (DFT) and Design for Power (DFP) using C++, Python, and TCL. Below are some of the some of the teams' activities. We are a diverse team needing someone who is not afraid of a challenge. If this is you, come join us today. What you will be doing: Be responsible for architecting highly automated and customizable design flows using software engineering with modular design and object oriented techniques. Work closely with our diverse team members on flows to provide DFT, and DFP methodologies for industry-leading chip designs. Support development of tools using C++/Python/TCL. Work cross functionally with DFT Methodology, Implementation and design teams with important DFT and power tools development tasks. What we need to see: 2+ years of relevant work experience. Smart, diligent and motivated to work in our CAD group. BE or BTech or MTech in Computer Science, or Electronics Engineering, or Electrical Engineering, or equivalent experience. Knowledge or experience with DFT, DFP is a plus. Familiar with Verilog, VLSI and ASIC design principles, including knowledge of logic cells. Software engineering: software design, algorithms, and QA. Strong C++ programming experience. Solid programming and scripting skills in Python or TCL desired. Knowledge of GenAI, LLM, AI Code Generation is a plus. Having strong interpersonal skills will serve you well in this role. NVIDIA is widely considered to be one of the technology world’s most desirable employers. We have some of the most forward-thinking and dedicated people in the world working for us. If you're creative and autonomous, we want to hear from you! #LI-Hybrid

If you are looking for a challenging and exciting career in the world of technology, then look no further. Skyworks is an innovator of high performance analog semiconductors whose solutions are powering the wireless networking revolution. At Skyworks, you will find a fast-paced environment with a strong focus on global collaboration, minimal layers of management and the freedom to make meaningful contributions in a setting that encourages creativity and out-of-the-box thinking. We are excited about the opportunity to work with you and glad you want to be part of a team of talented individuals who together can change the way the world communicates. Requisition ID: 74922 Description Responsibilities Work with a dedicated team, verifying analog and mixed-signal building blocks for SOCs, with a focus on the portable, ultra-low power audio markets. Participate in all aspects of the mixed-signal design verification, in partnership with the design engineering team, to develop and implement a mixed-signal verification infrastructure to verify all functional and performance requirements. Required Experience and Skills 5-10 yrs of relevant industry experience Insatiable curiosity to learn about new circuit architectures to advance ultra-low power audio devices A keen understanding of modern mixed-signal verification challenges and solutions. Solid foundation in network theory, amplifier design and data converters. Experience developing RNM behavioral models using System Verilog/VerilogAMS for analog blocks like analog/digital PLLs, ADCs, DACs, LDOs. Experience developing and maintaining chip level performance simulations of mixed-signal SOC designs. Ability to create and maintained mixed signal verification plans based on early system specifications or incomplete design definitions. Competent in the Cadence Virtuoso environment to setup and execute parameterized simulations of analog and SOC designs. Experienced in producing detailed technical reports and documentation. Experienced in Low-power audio amplifiers (Class D), audio converters, audio interfaces (I2S, PDM), and audio performance metrics (Dynamic Range, SNR, THD) is highly preferred. Experienced in Flow automation using command line scripts using Python, Matlab, Ocean, Perl, Csh, Make, etc. Simulation performance and accuracy trade-offs based on design requirements Experienced in Power-aware mixed-signal verification Hands-on verification of sub-45nm CMOS SOC designs Desired Experience and Skills Skyworks is an Equal Opportunity Employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, age, sex, sexual orientation, gender identity, national origin, disability, protected veteran status, or any other characteristic protected by law.

Bengaluru, Karnataka Job ID JR2025453287 Category Engineering - Electronic and Electrical Post Date Jun. 07, 2025 Job Description At Boeing, we innovate and collaborate to make the world a better place. We’re committed to fostering an environment for every teammate that’s welcoming, respectful and inclusive, with great opportunity for professional growth. Find your future with us. Overview As a leading global aerospace company, Boeing develops, manufactures and services commercial airplanes, defense products and space systems for customers in more than 150 countries. As a top U.S. exporter, the company leverages the talents of a global supplier base to advance economic opportunity, sustainability and community impact. Boeing’s team is committed to innovating for the future, leading with sustainability, and cultivating a culture based on the company’s core values of safety, quality and integrity. Technology for today and tomorrow The Boeing India Engineering & Technology Center (BIETC) is a 5500+ engineering workforce that contributes to global aerospace growth. Our engineers deliver cutting-edge R&D, innovation, and high-quality engineering work in global markets, and leverage new-age technologies such as AI/ML, IIoT, Cloud, Model-Based Engineering, and Additive Manufacturing, shaping the future of aerospace. People-driven culture At Boeing, we believe creativity and innovation thrives when every employee is trusted, empowered, and has the flexibility to choose, grow, learn, and explore. We offer variable arrangements depending upon business and customer needs, and professional pursuits that offer greater flexibility in the way our people work. We also believe that collaboration, frequent team engagements, and face-to-face meetings bring together different perspectives and thoughts – enabling every voice to be heard and every perspective to be respected. No matter where or how our teammates work, we are committed to positively shaping people’s careers and being thoughtful about employee wellbeing. With us, you can create and contribute to what matters most in your career, community, country, and world. Join us in powering the progress of global aerospace. Position Overview Boeing India Engineering seeks an Experienced ASIC-FPGA Verification Engineer with considerable experience in design to support multiple product lines in commercial and defense electronics development. Primary Responsibilities: Use high-level architectural documentation along with algorithm description and implement functions for test bench architecture and design . Develop models in System Verilog to verify design implementation and develop and run scripts and Make files . Leads analysis of customer and system requirements and development of architectural approaches and detailed specifications for various electronic products . Leads reviews of testing and analysis activity to assure compliance to requirements . Identifies, tracks and statuses technical performance measures to measure progress and ensure compliance with requirements . Leads activities in support of functional verification, simulation, emulation, safety and other technical services/methodologies . Proficient in creating verification plan IPs/Subsystems . Coordinates engineering support throughout the lifecycle of the product . Plans research projects to develop concepts for future product designs to meet projected requirements . Works under minimal directio n Basic Qualifications (Required Skills/Experience): A Bachelor’s degree or higher is required as a BASIC QUALIFICATIO N 9 to 11 of experience in Digital ASIC/FPGA verification . 2 or more years of concurrent exposure to Digital ASIC/FPGA Design . Preferred Qualifications (Desired Skills/Experience): Experience leading development of architectural approaches from customer and system requirements . Experience identifying, tracking, and providing status of technical performance metrics to measure progress and ensure compliance with requirements . Experience leading a team of engineers for technical excellence . Experience developing and leading sophisticated and high data rate design verification bench . Experience in writing Universal Verification Methodology (UVM) sequences and virtual sequences and its concepts like Inheritance, Polymorphism, etc . Experience in using Universal Verification Methodology (UVM): Experience crafting drivers, monitors, predictors, and scoreboards . Work experience crafting a self-checking simulation test bench from scratch for SoCs/ASIC/FPGA . Work experience performing clock cross domain analysis (CDC) . Expertise in verification working with internal/external VIPs, its development and evaluation with multiple vendors . In-hand depth upon System Verilo g Work experience using Linux or Unix terminal commands . Experience using scripting languages: Make, Perl, Python, shell scripts, etc . Experience using Revision Control Systems: Subversion (SVN), CVS, Git . Good Understanding upon designing digital ASIC/FPGA architectural design documents (micro-architecture documents with timing diagrams, detailed design blocks, etc.) . Good Understanding in deriving digital ASIC/FPGA requirements specification from higher-level (system or board-level) requirements specifications . Basic understanding upon concepts like RTL synthesis, Static Timing Analysis and correcting timing violations . Experience in Avionics protocols is a plus . Typical Education & Experience: Bachelor with 9+years, Master’s with 8+ years or Doctorate of Science degree from an accredited course of study, in engineering, computer science, mathematics, physics or chemistry is required. Applications for this position will be accepted until Jun. 14, 2025 Export Control Requirements: This is not an Export Control position. Education Bachelor's Degree or Equivalent Required Relocation This position offers relocation based on candidate eligibility. Visa Sponsorship Employer will not sponsor applicants for employment visa status. Shift Not a Shift Worker (India) Equal Opportunity Employer: We are an equal opportunity employer. We do not accept unlawful discrimination in our recruitment or employment practices on any grounds including but not limited to; race, color, ethnicity, religion, national origin, gender, sexual orientation, gender identity, age, physical or mental disability, genetic factors, military and veteran status, or other characteristics covered by applicable law. We have teams in more than 65 countries, and each person plays a role in helping us become one of the world’s most innovative, diverse and inclusive companies. We are proud members of the Valuable 500 and welcome applications from candidates with disabilities. Applicants are encouraged to share with our recruitment team any accommodations required during the recruitment process. Accommodations may include but are not limited to: conducting interviews in accessible locations that accommodate mobility needs, encouraging candidates to bring and use any existing assistive technology such as screen readers and offering flexible interview formats such as virtual or phone interviews.

Waymo is an autonomous driving technology company with the mission to be the most trusted driver. Since its start as the Google Self-Driving Car Project in 2009, Waymo has focused on building the Waymo Driver—The World's Most Experienced Driver™—to improve access to mobility while saving thousands of lives now lost to traffic crashes. The Waymo Driver powers Waymo One, a fully autonomous ride-hailing service, and can also be applied to a range of vehicle platforms and product use cases. The Waymo Driver has provided over one million rider-only trips, enabled by its experience autonomously driving tens of millions of miles on public roads and tens of billions in simulation across 13+ U.S. states. Waymo's Compute Team is tasked with a critical and exciting mission: We deliver the compute platform responsible for running the fully autonomous vehicle's software stack. To achieve our mission, we architect and create high-performance custom silicon; we develop system-level compute architectures that push the boundaries of performance, power, and latency; and we collaborate closely with many other teammates to ensure we design and optimize hardware and software for maximum performance. We are a multidisciplinary team seeking curious and talented teammates to work on one of the world's highest performance automotive compute platforms. In this hybrid role, you will report to an ASIC Design Manager. You will: Manage a new team of engineers developing advanced silicon for our self-driving cars Grow the team by hiring top talent at our new site in Bangalore Hands on technical leadership and contributions to architecture, design, and verification of IP blocks Work and coordinate cross-functionally with our U.S. and Taiwan silicon and partner teams Develop methodologies and best practices to ensure on-time, high performance, and high-quality silicon You have: 6+ years experience managing ASIC or SoC development teams Strong technical experience with the full digital design and verification cycle - from spec through bring-up 5+ years of industry experience with high performance digital design in Verilog/SystemVerilog Experience prioritizing resources across multiple projects on tight timelines We prefer: Industry experience with constrained random verification and UVM Fluency in at least one high level programming language such as Python, C++ Experience with performance and power validation, and formal verification Experience with prototyping systems on FPGA platforms or emulators Experience with automotive silicon and standards The expected base salary range for this full-time position is listed below. Actual starting pay will be based on job-related factors, including exact work location, experience, relevant training and education, and skill level. Waymo employees are also eligible to participate in Waymo’s discretionary annual bonus program, equity incentive plan, and generous Company benefits program, subject to eligibility requirements. Salary Range ₹8,400,000—₹10,200,000 INR

Company: Qualcomm India Private Limited Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Experience in Logic design /micro-architecture / RTL coding is a must. Must have hands on experience with SoC design and integration for complex SoCs. Experience in Verilog/System-Verilog is a must. Should have knowledge of AMBA protocols - AXI, AHB, APB, SoC clocking/reset/debug architecture and peripherals like USB, PCIE and SDCC. Understanding of Memory controller designs and microprocessors is an added advantage Hands on experience in constraint development and timing closure • Work closely with the SoC verification and validation teams for pre/post Silicon debug Hands on experience in Low power SoC design is required • Experience in Synthesis / Understanding of timing concepts for ASIC is required. Hands on experience in Multi Clock designs, Asynchronous interface is a must. Experience creating pad ring and working with the chip level floorplan team is an added advantage Experience in using the tools in ASIC development such as Lint, CDC, Design compiler and Primetime is required. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. Preferred Qualifications 6-9 years of experience in SoC design Educational Requirements: 6+ years of experience with a Bachelor’s/ Master’s degree in Electrical engineering Applicants : Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies : Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.

Increasing digitalization and flexibility of production processes presents outstanding potential. In Digital Industries, we enable our customers to unlock their full potential and drive digital transformation with a unique portfolio of automation and digitalization technologies. From hardware to software to services, we’ve got quite a lot to offer. How about you? We blur the boundaries between industry domains by integrating the virtual and physical, hardware and software, design and manufacturing worlds. With the rapid pace of innovation, digitalization is no longer tomorrow’s idea. We take what the future promises tomorrow and make it real for our customers today. Join us - where your career meets tomorrow. Looking for Siemens EDA Ambassadors- QuestaSim (Simulation) R&D team (strong AI/ML background) This is your role In this role, you will, craft and develop AI/ML-driven algorithms and solutions to improve simulation tools' performance and capabilities. Contribute to building state-of-the-art engines and components, integrating machine learning techniques into simulation and verification workflows. Contribute to the development and improvement of production-quality components, algorithms, and engines while supporting and improving existing codebases. Solve complex, open-ended problems in collaboration with a senior group of engineers in a fast-paced and multifaceted environment. Apply technical expertise in AI/ML frameworks, data-driven problem solving, and traditional simulation technologies to achieve project milestones. Stay self-motivated, disciplined, and focused while driving innovation within the team. Required Qualifications We are seeking a graduate with Bachelor’s or Master’s degree in Computer Science, Artificial Intelligence, Electrical Engineering, or a related technical field from an accredited institution. We value your experience with conceptualizing, defining, architecting, and implementation of an open-ended problem scope or new insights. Hands-on experience with AI/ML techniques, including supervised and unsupervised learning, neural networks, and reinforcement learning. Strong proficiency in programming languages like C/C++ and Python, along with strong foundations in algorithms and data structures. Knowledge of machine learning and deep learning frameworks. Strong understanding of Compiler Concepts, Optimizations, and parallel computing. Experience working on UNIX and/or LINUX platforms. Excellent problem-solving and analytical skills. Proven track record to work independently, take ownership of tasks, and deliver results A plus! Basic knowledge of Digital Electronics and concepts related to SystemVerilog, Verilog, and VHDL. Exposure to Simulation technologies or Formal-based Verification methodologies is a plus! We are Siemens A collection of over 377,000 minds building the future, one day at a time in over 200 countries. We're dedicated to equality, and we encourage applications that reflect the diversity of the communities we work in. All employment decisions at Siemens are based on qualifications, merit and business need. Bring your curiosity and creativity and help us shape tomorrow! We offer a comprehensive reward package which includes a competitive basic salary, variable pay, other benefits, pension, healthcare and actively support working from home. We are an equal opportunity employer and value diversity at our company. We do not discriminate based on race, religion, color, national origin, sex, gender, gender expression, sexual orientation, age, marital status, veteran status, or disability status. #LI-EDA #LI-HYBRID

JOB DESCRIPTION Key Responsibilities:  Develop RTL code using Verilog/VHDL for FPGA implementations.  Optimize hardware designs for performance, area, and power.  Work on Xilinx Vivado IPs and other FPGA toolchains.  Implement and optimize DSP algorithms for image and signal processing.  Work with MATLAB/Simulink for algorithm modeling and hardware mapping.  Perform functional and timing verification using UVM, SystemVerilog.  Develop testbenches, run simulations, and analyze waveforms.  Conduct post-synthesis and post-layout verification.  Implement and verify standard communication protocols (I2C, SPI, UART, PCIe, AXI, etc.).  Integrate and validate external peripherals in FPGA-based designs.  Guide students and Ph.D. scholars in developing VLSI-based academic projects.  Provide documentation, reports, and technical support for research work.  Deliver workshops and training sessions on VLSI, FPGA, and Signal Processing. Required Skills & Qualifications :  B.Tech/M.Tech/Ph.D. in VLSI, Electronics, Electrical, or a related field.  Strong experience in RTL design (Verilog/VHDL).  Hands-on experience with FPGA toolchains (Xilinx Vivado, Quartus, etc.).  Knowledge of MATLAB/Simulink for DSP applications.  Expertise in verification methodologies (UVM, SystemVerilog, ModelSim, QuestaSim).  Familiarity with communication protocols (AXI, PCIe, Ethernet, etc.).  Experience in hardware debugging and timing analysis.  Experience in HLS (High-Level Synthesis).  Knowledge of ASIC design flow and RTL-to-GDSII concepts.  Exposure to AI/ML accelerators on FPGA (optional but a plus).  Passion for mentoring students and guiding research projects. Job Type: Full-time Pay: ₹20,000.00 - ₹30,000.00 per month Schedule: Fixed shift Experience: VLSI: 1 year (Required) Work Location: In person

Increasing digitalization and flexibility of production processes presents outstanding potential. In Digital Industries, we enable our customers to unlock their full potential and drive digital transformation with a unique portfolio of automation and digitalization technologies. From hardware to software to services, we’ve got quite a lot to offer. How about you? We blur the boundaries between industry domains by integrating the virtual and physical, hardware and software, design and manufacturing worlds. With the rapid pace of innovation, digitalization is no longer tomorrow’s idea. We take what the future promises tomorrow and make it real for our customers today. Join us - where your career meets tomorrow. We are seeking a highly motivated and experienced software engineer with a strong background in AI/ML to join the QuestaSim (Simulation) R&D team at Siemens EDA. This is your role Design and develop AI/ML-driven algorithms and solutions to improve simulation tools' performance and capabilities. Contribute to building state-of-the-art engines and components, integrating machine learning techniques into simulation and verification workflows. Contribute to the development and improvement of production-quality components, algorithms, and engines while supporting and improving existing codebases. Solve complex, open-ended problems in collaboration with a senior group of engineers in a fast-paced and multifaceted environment. Apply technical expertise in AI/ML frameworks, data-driven problem solving, and traditional simulation technologies to achieve project milestones. Stay self-motivated, disciplined, and focused while driving innovation within the team. Required Experience A Bachelor’s or Master’s degree in Computer Science, Artificial Intelligence, Electrical Engineering, or a related technical field from an accredited institution. Experience with conceptualizing, defining, architecting, and implementation of an open-ended problem scope or new insights. Hands-on experience with AI/ML techniques, including supervised and unsupervised learning, neural networks, and reinforcement learning. Strong proficiency in programming languages like C/C++ and Python, along with strong foundations in algorithms and data structures. Knowledge of machine learning and deep learning frameworks. Strong understanding of Compiler Concepts, Optimizations, and parallel computing. Experience working on UNIX and/or LINUX platforms. Excellent problem-solving and analytical skills. Proven ability to work independently, take ownership of tasks, and deliver results A plus! Basic knowledge of Digital Electronics and concepts related to SystemVerilog, Verilog, and VHDL. Exposure to Simulation technologies or Formal-based Verification methodologies is a plus! We are Siemens A collection of over 377,000 minds building the future, one day at a time in over 200 countries. We're dedicated to equality, and we encourage applications that reflect the diversity of the communities we work in. All employment decisions at Siemens are based on qualifications, merit and business need. Bring your curiosity and creativity and help us shape tomorrow! We offer a comprehensive reward package which includes a competitive basic salary, variable pay, other benefits, pension, healthcare and actively support working from home. We are an equal opportunity employer and value diversity at our company. We do not discriminate based on race, religion, color, national origin, sex, gender, gender expression, sexual orientation, age, marital status, veteran status, or disability status. #DVT Show more Show less

Company Qualcomm India Private Limited Job Area Engineering Group, Engineering Group > Hardware Engineering General Summary As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Skills/Experience 2-5 years of strong experience in digital front end ASIC design verification Bachelors or Masters Degree in Engineering in Electronics, VLSI, Communications or related field. We are looking for a highly motivated and talented RTL verification engineer to join our team to work on the next generation complex cores used in High End Modem/Mobile chips. In this role, a successful incumbent would: - Develop verification environment and testbench components such as BFM and checkers. - Develop comprehensive test plan for unit level verification of IP/Module features and implement test cases. - Verify design in unit level environment using directed and constrained random testing, assertion-based verification, formal analysis, and functional verification. - Write functional cover-groups and cover-points for coverage closure. - Perform RTL code coverage, assertion coverage, functional coverage and gate level simulations. - Have expertise in verifying designs at system level and block level using constrained random verification. - Operate at Expert level in System Verilog and UVM based verification. - Expertise in coding SV Testbench, drivers, monitors, scoreboards, checkers - Strong and independent design debugging capability. - Understanding of AHB, AXI and other bus protocols, digital design and system architecture - Understanding of TCP/IP Packet Processing Algorithms like Filtering, Routing, NAT, Decipher, Checksum, Ethernet Bridging, Tunneling is a Plus. Should possess good communication skills to ensure effective interaction with Engineering Management and team members. Should be self-motivated with good teamwork attitude and need to function with minimal guidance or supervision Responsibilities Work in close coordination with Systems, Design, SoC team , SW team, Validation & DFT teams to get the goals completed. Developing the Verification Strategy, Testbench architecture and implementing the design verification plan and tests using SV/UVM/C. HW verification using Cadence and Synopsys simulator tools, SV/UVM based TB development, Regression analysis, bug-triage. Formal Verification using Jasper, VCF etc. Power Aware Verification on RTL and DC/PD Gate lebel Netlist. Conducting High-/Mid-/Low- level verification reviews, coverage closure and sign-off on block and Sub-system testing. Assisting SOC team with IP Integration testing at SOC level. Post-Silicon Debugs in close collaboration with Design, Validation and SW teams. Self-Motivated to Execute the defined tasks almost independently with minimal guidance Minimum Qualifications Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field. Applicants : Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies : Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers. 3071061 Show more Show less

Job role: At Synopsys, we’re at the heart of the innovations that change the way we work and play. Self-driving cars. Artificial Intelligence. The cloud. 5G. The Internet of Things. These breakthroughs are ushering in the Era of Smart Everything. And we’re powering it all with the world’s most advanced technologies for chip design and software security. If you share our passion for innovation, we want to meet you. Our Silicon IP business is all about integrating more capabilities into an SoC—faster. We offer the world’s broadest portfolio of silicon IP—predesigned blocks of logic, memory, interfaces, analog, security, and embedded processors. All to help customers integrate more capabilities. Meet unique performance, power, and size requirements of their target applications. And get differentiated products to market quickly with reduced risk. We're looking for ASIC Digital Verification Engineers with different experience levels to join the team! Does this sound like a good role for you? You will be working on VLSI IP verification of controllers related to complex protocols. You will be part of the Solutions Group at our Bangalore Design Center, India. The position offers learning and growth opportunities. This is a Technical Individual Contributor role and offers challenges to work in a multi-site environment on technically challenging IP Cores in the Verification domain. Job Responsibilities - Understand Standard Specifications/ the functional specifications/ feature enhancements for the product and create micro-architecture and detailed design for some of the components of the Test Environment for the DesignWare family of synthesizable cores in protocol areas such as Ethernet/DSC/AMBA (AMBA2, AXI, CHI)/ SD/eMMC/DDR/PCIe/ USB/ MIPI Be an individual contributor in the Verification Tasks – Architect testbenches, coding of TE, debug, verification coverage improvement, etc. Will contribute to technical review of TE Code of medium complexity. Will contribute to technical process and quality improvement to achieve high quality deliveries Will be expected to Solve complex/ abstract problems The candidate should be able to analyze the coverage metrics and improve them with definition of additional test cases in CRV environment. The candidate will work in a project and team-oriented environment with teams spread across multiple sites, worldwide. May need to take the role of technical lead for a few of the components of the Test Environment and achieve high quality verification with a small team of verification engineers. The role offers ample scope to mentor junior engineers and interns and to enhance ones’ leadership skills. Key Qualifications And Experience Must have BSEE/ MSEE in EE with 5 to 8 years of relevant experience in the following areas: Verification of IP Cores or SoC Designs for Set Top Boxes, Mobile handsets, Smart Devices, etc. Knowledge of one or more of protocols: Ethernet/AMBA (AMBA2, AXI, CHI)/ SD/eMMC/USB/ DDR/PCIe MIPI/DSC. Knowledge of Ethernet protocol will be plus. Hands on experience with creating detailed design of components of Test Environment from Functional Specifications/ Test Environment Specifications. The TE must have used methodologies such as UVM, OVM Test Planning, Coverage Planning, Assertion Planning Hands on experience with System Verilog coding and Simulation tools; Deep Knowledge of OOPs Concepts Experience with Perforce or similar revision control environment Knowledge of Perl/Shell scripts. Exposure to quality processes in the context of IP design and verification is an added advantage In addition, the candidate should have good communication skills, will be a team player, and will have good problem-solving skills. Inclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, colour, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability. Show more Show less

Sr. Staff- ASIC Verification. This is a verification focused individual contributor’s role. The candidate will be part of the DesignWare IP Verification R&D team at our Bangalore Design Center, India. Implement state-of-the-art Verification environments for the DesignWare family of synthesizable cores and perform Verification tasks for the IP cores. Work closely with RTL design team and be part of a global team of expert Verification Engineers. Domains will include but not be limited to USB, PCI Express, Ethernet, AMBA. Job role will have a combination of Test planning, Test environment coding both at unit level and system level, Test case coding and debugging, FC coding and analysis and meeting quality metric goals and regression management. Requirements: BS/BE in EE with 8+ years of relevant experience or MS with 6+ years of relevant experience in the verification of IP cores and/or SOC verification. Experience in developing HVL based test environments, developing and implementing test plans, implementing and extracting verification metrics such as functional coverage. HVL coding skills for Verification and be hands-on with one or more Industry standard simulators such as VCS, NC, MTI used in Verification and relevant debugging tools. Exposure to verification methodologies such as UVM/VMM/OVM is required. Familiarity with HDLs such as Verilog and scripting languages such as perl is highly desired. Exposure to IP design and verification processes including VIP development is an added advantage. Basic understanding of functional & Code coverage. It is essential that the individual has good written and oral communication skills and is able to demonstrate good analysis, debug and problem solving skills and be self-driven. Our Silicon IP business is all about integrating more capabilities into an SoC—faster. We offer the world’s broadest portfolio of silicon IP—predesigned blocks of logic, memory, interfaces, analog, security, and embedded processors. All to help customers integrate more capabilities. Meet unique performance, power, and size requirements of their target applications. And get differentiated products to market quickly with reduced risk. At Synopsys, we’re at the heart of the innovations that change the way we work and play. Self-driving cars. Artificial Intelligence. The cloud. 5G. The Internet of Things. These breakthroughs are ushering in the Era of Smart Everything. And we’re powering it all with the world’s most advanced technologies for chip design and software security. If you share our passion for innovation, we want to meet you. Show more Show less

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a Senior/Staff Product Development Engineer working in Sim Solutions team at Micron Technology, Inc., you will be responsible for Analog and Digital Simulation Support for Worldwide Product Engineering teams. This role includes developing and supporting a Simulation GUI used to simplify the sim flows for end users, the Product Engineering Simulation Environment for all NVE Designs and the Custom tools developed for PE supporting the Sim activities. You will work with PE and Partner Teams such as Quality, Technology Development and Design to develop and run checks or flows to continually drive quality and reliability and improve speed of learning. You will be responsible for driving improvements in PE Simulation tools, flows and NVE Designs by providing timely feedback and reports. You will work with Design, Product Engineering, Quality and Technology Development through the RSC process by providing an in-depth analysis of circuitry identified as potential risk for reliability involving Identifying Circuitry, Developing and Running Checks needed to verify integrity and Safe Operating Areas and providing final reports for review by the cross-functional team. As an expert in these areas, you will also be responsible for providing training for new hires and presenting updates and changes to the tools and flows you develop. Responsibilities and Tasks Digital Sim Support Development, Setup and Support Verilog GUI and Custom PE Tools supporting Simulations. Accountable for Verilog Fullchip Environment for Product Engineering simulations. Work with partner teams to maintain CSV and keep updated with latest Design changes and features. Provide support to PE, Partner Teams and cross-functional teams through Analog simulation and debug Develop Testmode and Probe Regressions. Work with FDV Verilog team to ensure Regressions are effective and efficient. Oversee FDV Verilog requests and provide feedback and training as needed. General Training and instruction for new hires. Analog Sim Support Development, Setup and Support Analog GUI and Custom PE Tools supporting Simulations. Accountable for Analog Full Chip Environment for Product Engineering simulations. Provide support to PE, Partner Teams and cross-functional teams through Analog simulation and debug Develop, Run, Debug and Report Testmode Electrical Validation for Reliability (TMEV) for all Designs. Education This position requires a Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering etc. with at least 6-8+ years of industry experience. Course work in VLSI, semiconductor process, and semiconductor device physics About Micron Technology, Inc. We are an industry leader in innovative memory and storage solutions transforming how the world uses information to enrich life for all . With a relentless focus on our customers, technology leadership, and manufacturing and operational excellence, Micron delivers a rich portfolio of high-performance DRAM, NAND, and NOR memory and storage products through our Micron® and Crucial® brands. Every day, the innovations that our people create fuel the data economy, enabling advances in artificial intelligence and 5G applications that unleash opportunities — from the data center to the intelligent edge and across the client and mobile user experience. To learn more, please visit micron.com/careers All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, veteran or disability status. To request assistance with the application process and/or for reasonable accommodations, please contact hrsupport_india@micron.com Micron Prohibits the use of child labor and complies with all applicable laws, rules, regulations, and other international and industry labor standards. Micron does not charge candidates any recruitment fees or unlawfully collect any other payment from candidates as consideration for their employment with Micron. Show more Show less

BENGALURU, KARNATAKA, INDIA FULL-TIME HARDWARE ENGINEERING 3506 Waymo is an autonomous driving technology company with the mission to be the most trusted driver. Since its start as the Google Self-Driving Car Project in 2009, Waymo has focused on building the Waymo Driver—The World's Most Experienced Driver™—to improve access to mobility while saving thousands of lives now lost to traffic crashes. The Waymo Driver powers Waymo One, a fully autonomous ride-hailing service, and can also be applied to a range of vehicle platforms and product use cases. The Waymo Driver has provided over one million rider-only trips, enabled by its experience autonomously driving tens of millions of miles on public roads and tens of billions in simulation across 13+ U.S. states. Waymo's Compute Team is tasked with a critical and exciting mission: We deliver the compute platform responsible for running the fully autonomous vehicle's software stack. To achieve our mission, we architect and create high-performance custom silicon; we develop system-level compute architectures that push the boundaries of performance, power, and latency; and we collaborate closely with many other teammates to ensure we design and optimize hardware and software for maximum performance. We are a multidisciplinary team seeking curious and talented teammates to work on one of the world's highest performance automotive compute platforms. In this hybrid role, you will report to an ASIC Design Manager. You will: Manage a new team of engineers developing advanced silicon for our self-driving cars Grow the team by hiring top talent at our new site in Bangalore Hands on technical leadership and contributions to architecture, design, and verification of IP blocks Work and coordinate cross-functionally with our U.S. and Taiwan silicon and partner teams Develop methodologies and best practices to ensure on-time, high performance, and high-quality silicon You have: 6+ years experience managing ASIC or SoC development teams Strong technical experience with the full digital design and verification cycle - from spec through bring-up 5+ years of industry experience with high performance digital design in Verilog/SystemVerilog Experience prioritizing resources across multiple projects on tight timelines We prefer: Industry experience with constrained random verification and UVM Fluency in at least one high level programming language such as Python, C++ Experience with performance and power validation, and formal verification Experience with prototyping systems on FPGA platforms or emulators Experience with automotive silicon and standards The expected base salary range for this full-time position is listed below. Actual starting pay will be based on job-related factors, including exact work location, experience, relevant training and education, and skill level. Waymo employees are also eligible to participate in Waymo’s discretionary annual bonus program, equity incentive plan, and generous Company benefits program, subject to eligibility requirements. Salary Range ₹8,400,000—₹10,200,000 INR

Lattice Overview There is energy here…energy you can feel crackling at any of our international locations. It’s an energy generated by enthusiasm for our work, for our teams, for our results, and for our customers. Lattice is a worldwide community of engineers, designers, and manufacturing operations specialists in partnership with world-class sales, marketing, and support teams, who are developing programmable logic solutions that are changing the industry. Our focus is on R&D, product innovation, and customer service, and to that focus, we bring total commitment and a keenly sharp competitive personality. Energy feeds on energy. If you flourish in a fast paced, results-oriented environment, if you want to achieve individual success within a “team first” organization, and if you believe you can contribute and succeed in a demanding yet collegial atmosphere, then Lattice may well be just what you’re looking for. Role Specifics Responsibilities & Skills This is a full-time individual contributor position located in Pune, India. The role will focus on FPGA projects concentrated in Pune and similar time zones. The qualified candidate will be an expert in RTL design, best-in-class coding styles, algorithms, and both Verilog and System Verilog. The qualified candidate will be expert in SoC integration and associated quality checks including lint, CDC, RDC , SDC etc. The role requires to work with architecture team to define micro architect and design spec. The successful candidate will be open and willing to both (a) teach best-known-methods to an existing FPGA team and (b) learn from the team about the complications of highly programmable FPGA fabrics. This role carries the need to be both a strong educator and a open-minded student. Accountabilities Serve as a key contributor to FPGA design efforts. Drive logic design of key FPGA blocks & full chip and bring best-in-class methodologies to accelerate design time and improve design quality. Ensuring design quality through assertions, checkers, and scripting. Develop strong relationships with worldwide teams. entor and develop strong partners and colleagues. Occasional travel as needed. Qualifications BS/MS/PhD Electronics Engineering , Electrical Engineering, Computer Science or equivalent. 14+ years of experience in driving logic design across a multitude of silicon projects. Expertise in SoC integration , defining micro-architecture and experience of selecting 3rd party IP. Experience in working with ARM processor, AXI, AMBA bus , safety and security protocols, debug architecture. Familiarity with FPGA designs, use-cases, and design considerations is a plus. Independent worker and leader with demonstrated problem-solving abilities. Proven ability to work with multiple groups across different sites and time zones. Show more Show less

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. College education in Electronics Engineering or Computer Engineering Working knowledge in RTL design flow steps like RTL coding, Simulation, compilation/testbench validation, Synthesis, Timing, DFT,lint, CDC, LEC etc. Ability to debug existing Verilog/System verilog test cases with little or no help from the designer. Functional simulation using Verilog/System Verilog. Good in Scripting languages(Shell, Perl, TCL, Python) and automation of design database qualification and packaging. Checks and validation of package consistency. Familiarity with Power Flow (UPF/CPF). Able to collaborate with IP-development teams and facilitate high-quality releases. Maintaining package and release timelines for various projects. Time management skills enough to balance multiple high-priority projects. Bug reporting and resolution closure with IP providers Ability to debug synthesis/timing analysis constraints, reports, logs Ability to learn new tools/flows and develop methodology if needed. Ability to build and maintain close relationships with Designers and Application Engineers. Fastidious approach to building automated processes. Strong interpersonal and relationship-building skills. Additional Desirable Qualifications Familiarity with SerDes/DDR/other Design-IP’s & Analog design flows Familiarity with IP release and tracking management systems. We’re doing work that matters. Help us solve what others can’t. Show more Show less

Memory Controller Verification - Principal / Senior Staff Location: Hyderabad Founded by highly respected Silicon Valley veterans - with its design centers established in Santa Clara, California. / Bangalore A US based well-funded product-based startup looking for Highly talented Verification Engineers for the following roles. Memory Controller - Principal / Senior Staff Verification Engineers: looking for experienced and talented professional for DDR Memory Controller Verification. Minimum Qualifications: BE/BTech in Electrical/Computer engineering with 8+ years of experience Should have hands on experience in System Verilog, UVM/OVM and Object-Oriented Programming Proven track record in DDR5/LPDDR5X/LPDDR6/HBM4 IP verification from environment and tests development to validation closure Work closely with RTL designers and SOC team to scope out integration and verification requirements Proficiency in bus protocols AXI/AHB Integration and verification of complex System IP features. Proficiency in scripting languages like Perl, Python etc. Strong communication, collaboration, and interpersonal skills Strong analytical and problem-solving skills Preferred Qualifications: Experience in Memory controller, DDR4/5, LPDDR4/5, HBM memory protocols Knowledge of Fabric/Network on chips, Cache Coherency Experience in GLS is added advantage. Contact: Uday Mulya Technologies muday_bhaskar@yahoo.com "Mining The Knowledge Community" Show more Show less

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Performance Modeling Engineer Location – India (Pune) Summary We are looking for modeling engineers to help develop performance models, perform architectural tradeoff analysis, and enable data driven design decisions for our next generation DDR memory controller architectures that can meet today’s complex SoC and workload requirements. Hardware modelling experience (C++/SystemC/TLM/Python) and computer architecture foundation is desired. Responsibilities Develop cycle-level performance models in SystemC or C++ Correlate performance models to match RTL configurations and traffic conditions Work with Memory Architects to understand feature requirements, architectural specifications and implement in the model Analyze architectural trade-offs (throughput, hardware cost) across different scenarios and architectural choices Develop synthetic memory traffic/traces that are representative of real-world applications (CPU, GPU, DSP, NoC, etc) Develop scripts to automate generation of various performance metrics and statistics post RTL simulation that helps identify performance bottlenecks Required Skills BE/B.Tech ME/M.Tech in ECE, E&TC, CS or similar 8+ years of experience in hardware modeling, functional or performance Strong coding skills in C++, SystemC and Transaction Level Modeling (TLM) Basic understanding of performance principles, Queuing Theory, throughput/latency tradeoffs Additional Skills Understand RTL-Verilog, SV, UVM and experience analyzing waveforms Understand memory protocols and timing – DDR4, DDR5, LP4, LP5 Experience using performance simulators – Memory Controller, NoC, CPU models Coding in Python and familiarity with packages like Pandas, Matplotlib Experience working with performance benchmarks – SPEC, STREAM, etc Concepts related to Quality of Service (QoS) and how memory controller can tradeoff performance and latencies We’re doing work that matters. Help us solve what others can’t. Show more Show less

Lattice Overview There is energy here…energy you can feel crackling at any of our international locations. It’s an energy generated by enthusiasm for our work, for our teams, for our results, and for our customers. Lattice is a worldwide community of engineers, designers, and manufacturing operations specialists in partnership with world-class sales, marketing, and support teams, who are developing programmable logic solutions that are changing the industry. Our focus is on R&D, product innovation, and customer service, and to that focus, we bring total commitment and a keenly sharp competitive personality.Energy feeds on energy. If you flourish in a fast paced, results-oriented environment, if you want to achieve individual success within a “team first” organization, and if you believe you can contribute and succeed in a demanding yet collegial atmosphere, then Lattice may well be just what you’re looking for. Responsibilities & Skills Job Summary: As a Modeling Design Engineer, you will be responsible for creating and validating of models used for Lattice FPGAs, ensuring their accuracy and performance. You will work closely with design and development teams to ensure the accuracy and reliability of our models. Key Responsibilities Develop and validate models for analog, digital, and mixed-signal circuits. Utilize simulation tools such as Verilog, VHDL, SystemVerilog, or similar, to perform digital circuit analysis. Provide technical leadership and mentorship to a team of circuit modeling engineers. Collaborate with design engineers to understand circuit requirements and specifications. Collaborate with internal customers/consumers of the models to assure their needs are comprehended and objectives are met. Analyze simulation results and provide feedback to improve models and model performance. Optimize circuit models for performance, accuracy, and efficiency. Document modeling processes, assumptions, and results for internal and external stakeholders. Stay updated with the latest advancements in circuit modeling techniques and tools. Qualifications Bachelor’s or Master’s degree in Electrical Engineering with 6+ years of experience. Proven experience in circuit modeling and simulation. Proficiency in using circuit simulation tools such as SPICE, Verilog, VHDL, System Verilog, or similar. Understanding of analog, digital, and mixed-signal circuit design principles. Skill in modeling with SystemVerilog and higher-level modeling with SystemC Excellent analytical and problem-solving abilities. Excellent communication and collaboration skills. Experience with data analysis and visualization tools is a plus. Show more Show less

Requirements Design Verification Engineer with 5+ years of experience. Expertise in at least one of the following protocols: DDR, PCIe, or Ethernet. Expertise in SoC verification or IP verification. Proficient in Verilog, SystemVerilog, and UVM. This job was posted by Naveen A from Modernize Chip Solutions. Show more Show less

Digantara is a leading Space Surveillance and Intelligence company focused on ensuring orbital safety and sustainability. With expertise in space-based detection, tracking, identification, and monitoring, Digantara provides comprehensive domain awareness across regimes, allowing end users to have actionable intelligence on a single platform. At the core of its infrastructure lies a sophisticated integration of hardware and software capabilities aligned with the key principles of situational awareness: perception (data collection) , comprehension (data processing) , and prediction (analytics) . This holistic approach empowers Digantara to monitor all Resident Space Objects (RSOs) in orbit, fostering comprehensive domain awareness. Digantara seeks a highly skilled Senior Embedded Software Engineer to design and develop embedded software solutions tailored specifically for real-time image processing. You will leverage your expertise to enable the development of state-of-the-art embedded software with applications such as tracking objects from both space and the ground.\ Why Us? Be part of a collaborative and innovative environment where your ideas and skills make a real difference to the entire space realm Push the boundaries with hands-on experience, greater responsibilities, and rapid career advancement Competitive incentives, galvanizing workspace, blazing team—pretty much everything you have heard about a startup Responsibilities Design, develop, and implement embedded software for real-time image processing for satellite payload applications. Translate and optimize image processing algorithms to FPGA/SoC platforms to achieve low latency and high throughput. Collaborate with system-level designers and hardware designers, generate software functional requirements and architecture, and ensure seamless integration of software and hardware. Collaborate effectively with cross-functional teams to conceptualize, design, and implement optimal embedded software solutions for image processing. Define and implement interface and communication protocols for data handling between the satellite payload and bus systems. Develop clean, well-structured, maintainable code and execute comprehensive testing according to space industry standards (e.g., the ECSS software engineering standard). Implement rigorous software quality assurance practices, including static analysis, code coverage analysis, and other verification techniques. Develop efficient embedded software for high-performance embedded systems with the ARM Cortex processor architecture. Leverage AMD-Xilinx/Microchip EDA tools (e.g., Vivado/Vitis IDE, Libero SoC design suite) to develop efficient embedded software solutions. Troubleshoot and resolve embedded software defects and hardware interface issues. Required Qualifications B.Tech/B.E in Electronics Engineering or M.Tech/M.E or PhD degree in Embedded Systems/VLSI. 5+ years of experience in Embedded software design and development, with a strong focus on image processing and experience in handling communication protocols. Strong proficiency in bare-metal and RTOS programming for embedded systems, with expertise in real-time scheduling, interrupt handling, and device drivers. Proven ability to optimize embedded software implementation, including code optimization, memory management, and power efficiency techniques. Proficiency in Embedded C and C/C++ programming languages. Strong understanding of data communication protocols such as I2C, UART, SPI, CAN, Gigabit Ethernet, LVDS, RS422, etc. Working knowledge of software configuration management tools and defect tracking tools. Preferred Skills Prior experience in embedded software implementation in the areas of satellite imaging payload or ground-based imaging systems is highly preferred. Working knowledge of FPGA/SoC-based embedded systems designed for image processing applications is highly valued. Experience in hardware-related programming of FPGA interfaces and high-level synthesis. Knowledge of implementing fault-tolerant embedded systems for satellite applications. Familiarity with digital image processing and implementation. Experience in Python programming language and knowledge of Verilog/VHDL. Experience with camera interfaces such as USB3, CoaXPress, CameraLink, PCIe, Gigabit ethernet, etc. General Requirements Ability to work in a mission-focused, operational environment. Ability to think critically and make independent decisions. Interpersonal skills to enable working in a diverse and dynamic team. Maintain a regular and predictable work schedule. Writing and delivering technical documents and briefings. Verbal and written communication skills as well as organizational skills. Travel occasionally as necessary. PI267575298 Show more Show less

NVIDIA is seeking an elite Verification Engineer to verify the design and implementation of the next generation of PCI Express controllers for the world’s leading GPUs and SOCs. This position offers the opportunity to have real impact in a dynamic, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence. We have crafted a team of outstanding people stretching around the globe, whose mission is to push the frontiers of what is possible today and define the platform for the future of computing. At NVIDIA, our employees are passionate about parallel and visual computing. We're united in our quest to transform the way graphics are used to solve some of the most complex problems in computer science. The GPU started out as an engine for simulating human imagination, conjuring up the amazing virtual worlds of video games and Hollywood films. Today, NVIDIA’s GPU simulates human intelligence, running deep learning algorithms and acting as the brain of computers, robots, and self-driving cars that can perceive and understand the world. NVIDIA is increasingly known as “the AI computing company.” What You’ll Be Doing Be responsible for verification of the ASIC design, architecture, golden models and micro-architecture of PCIE controllers at IP/sub-system levels using state-of-the-art verification methodologies such as UVM. Build reusable bus functional models, monitors, checkers and scoreboards following coverage driven verification methodology. Expected to understand the design specification and implementation, define the verification scope, develop test plans, tests, and the verification infrastructure and verify the correctness of the design. You will be collaborating with architects, designers, and pre and post silicon verification teams to accomplish your tasks. What We Need To See B.Tech./ M.Tech or equivalent experience 2+ years of relevant experience Experience in verification at Unit/Sub-system/SOC level and expertise in Verilog and SystemVerilog Expertise in comprehensive verification of IP or interconnect protocols (e.g. PCI Express, USB, SATA) Experience in developing and working in functional coverage based constrained random verification environments Background in DV methodologies like UVM/VMM and exposure to industry standard verification tools for simulation and debug Ways To Stand Out From The Crowd Excellent knowledge of PCIE protocol - Gen3 and above Good understanding of the system level architecture of PCIE/CXL-based designs Perl, Python or similar scripting and SW programming language experience Good debugging and analytical skills Good interpersonal skills & dream to work as a great teammate With competitive salaries and a generous benefits package, NVIDIA is widely considered to be one of the most desirable employers in the world. We have some of the most brilliant and talented people in the world working for us. If you are creative, autonomous and love a challenge, we want to hear from you. We are an equal opportunity employer and value diversity at our company. We do not discriminate on the basis of race, religion, color, national origin, gender, sexual orientation, age, marital status, veteran status, or disability status. JR1998342 Show more Show less

Company Qualcomm India Private Limited Job Area Interns Group, Interns Group > Interim Engineering Intern - HW Qualcomm Overview Qualcomm is a company of inventors that unlocked 5G ushering in an age of rapid acceleration in connectivity and new possibilities that will transform industries, create jobs, and enrich lives. But this is just the beginning. It takes inventive minds with diverse skills, backgrounds, and cultures to transform 5Gs potential into world-changing technologies and products. This is the Invention Age - and this is where you come in. General Summary We know our employees’ ideas change the world. For more than three decades, we’ve been a global leader in mobile technology, continually pushing the boundaries of what’s possible. Working with customers across industries — from automotive to health care, from smart cities to robotics— we continue to accelerate innovation and unlock new possibilities in a time where everything is connected. By joining the Qualcomm family, you too can bring the future forward faster. SOC & Hard Macro Physical Design SOC Validation & Debug RF & Analog Layout RF/Analog/Mixed Signal/Power IC Design Low Power Design Board and FPGA Design Digital ASIC Design Design/SOC Verification CAD Solution Engineer Design for Test (DFT) CPU Design Must have educational background in one or more of the following areas: Verifying SoC with embedded RISC/DSP processors, communications/ networking ASICs. Verilog or VHDL, C/C++, Tcl/Perl/shell-scripting. RTL design experience and/or strong OO programming knowledge Knowledge of wireless/wired communications and protocols or graphics/video multi-media is a plus. Knowledge in PLL, LNA, OpAmp, CMOS, ADC/DAC, Cadence, SpectreRF, or Layout is required in RF/Analog/Mixed Signal IC Design. Excellent analytical and problem solving skills. Ability to collaborate and work in teams. Good verbal and written communication skill Educational Background Masters, Bachelors: Electrical Engineering , VLSI , Embedded and VLSI , ECE Applicants : Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail myhr.support@qualcomm.com or call Qualcomm's toll-free number found here . Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies: Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers. 3063801 Show more Show less

Company Qualcomm India Private Limited Job Area Interns Group, Interns Group > Interim Engineering Intern - HW Qualcomm Overview Qualcomm is a company of inventors that unlocked 5G ushering in an age of rapid acceleration in connectivity and new possibilities that will transform industries, create jobs, and enrich lives. But this is just the beginning. It takes inventive minds with diverse skills, backgrounds, and cultures to transform 5Gs potential into world-changing technologies and products. This is the Invention Age - and this is where you come in. General Summary We know our employees’ ideas change the world. For more than three decades, we’ve been a global leader in mobile technology, continually pushing the boundaries of what’s possible. Working with customers across industries — from automotive to health care, from smart cities to robotics— we continue to accelerate innovation and unlock new possibilities in a time where everything is connected. By joining the Qualcomm family, you too can bring the future forward faster. SOC & Hard Macro Physical Design SOC Validation & Debug RF & Analog Layout RF/Analog/Mixed Signal/Power IC Design Low Power Design Board and FPGA Design Digital ASIC Design Design/SOC Verification CAD Solution Engineer Design for Test (DFT) CPU Design Must have educational background in one or more of the following areas: Verifying SoC with embedded RISC/DSP processors, communications/ networking ASICs. Verilog or VHDL, C/C++, Tcl/Perl/shell-scripting. RTL design experience and/or strong OO programming knowledge Knowledge of wireless/wired communications and protocols or graphics/video multi-media is a plus. Knowledge in PLL, LNA, OpAmp, CMOS, ADC/DAC, Cadence, SpectreRF, or Layout is required in RF/Analog/Mixed Signal IC Design. Excellent analytical and problem solving skills. Ability to collaborate and work in teams. Good verbal and written communication skill Educational Background Masters, Bachelors: Electrical Engineering , VLSI , Embedded and VLSI , ECE Applicants : Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail myhr.support@qualcomm.com or call Qualcomm's toll-free number found here . Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies: Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers. 3063801 Show more Show less

WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences - the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. AMD together we advance_ MTS SILICON DESIGN ENGINEER The Role This exciting position as MTS in AMD's Silicon IP solutions & SOC group will provide the individual with an opportunity to demonstrate strong technical leadership across the design hierarchy from architecture to Productization. Join us in providing innovative IP solutions as we embark on our journey into the cutting edge programmable logic based silicon designs by delivering the complex IP Solutions for multiple market segments As an MTS you will work as part of a team responsible for all phases of product development including product definition and delivery. Member Technical Staff is expected to participate in and lead many aspects of a technical project including: thorough understanding of IP Architectural definition, u-Architecture development for individual IPs or IP subsystems, leading cross-functional IP teams from front-end development through Productization & ASICization. This position requires an individual to be creative, team-oriented, technology savvy, able to lead large cross-functional teams, comfortable and willing to provide regular updates to management chain during the project execution THE PERSON: You have a passion for modern, complex hardware and IP architecture, digital design, and verification in general. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/timezones. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems. KEY RESPONSIBILITIES: Role A major part of your responsibility will be to participate in and take a lead technical role in most of the phases of the product development cycle from new product exploration, architecture through implementation, prototyping, validation and support including: Define u-architecture from the archtiecture defintion Evaluating and executing design and development plans for IPs RTL design, IP Integration & documentation Participating in and acting as a senior technical reviewer for various u-architecture and implementation reviews within the development organization Working with stakeholders to develop comprehensive testing plans including Compliance and Interop testing Critically Review and provide feedback on the Design Implementations and Verification plans Acting as technical mentor to junior engineers PREFERRED EXPERIENCE: A minimum of 8 years of experience is required. Proven experience in Silicon IP development process, methodologies, Design for Test methodologies Experience with Verilog RTL design, VCS simulation tool, Perl/Shell scripting Proven experience in contributing to complex silicon tapeouts Detailed understanding and proven track record of developing leading edge PCIe, Full featured DMAs, NVMe based Storage IP, networking IP solutions such as Ethernet, TCP/IP, RDMA etc. Strong oral and written communication skills are essential The ideal candidate will be a proactive contributor to the RTL design methodologies Ability to work on complex issues where analysis situations or data requires an in-depth evaluation of variable factors. To be successful, this individual must demonstrate favorable results through leadership and influencing multiple individuals and groups. ACADEMIC CREDENTIALS: A Bachelor of Science Degree in Electrical Engineering or Computer Science, a Master Degree or equivalent experience is required. Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process. Show more Show less

Now Hiring: Memory Circuit Design Verification Engineer / Senior Engineer Location : Hyderabad, India Experience : 7+ Years Start Date : Immediate or within 15 days Are you an expert in memory circuit verification with a passion for cutting-edge technology? Join us in pushing the boundaries of DRAM and emerging memory design as a Senior Verification Engineer ! Key Responsibilities Perform pre-silicon verification of custom gate-level designs across memory technologies (DDR4/5, LPDDR4/5) Simulate, debug, and validate full-chip and block-level designs Develop and maintain test benches, functional vectors, and regressions Write functional test cases and analyze coverage reports Collaborate with global teams on design and verification Drive improvements in verification methodologies Must-Have Skills Strong foundation in CMOS fundamentals and circuit-level design Proficiency in Verilog and SPICE simulations Hands-on experience in writing and executing regressions Exceptional debugging and analytical skills Familiarity with memory protocols : DDR4/5, LPDDR4/5 Preferred Skills Experience with System Verilog , UVM , and PLI Scripting with Python, Perl Exposure to AMS verification / mixed-signal co-simulation Background in DRAM, SRAM , or related memory technologies Qualification B.E./B.Tech or M.E./M.Tech in Electronics, Electrical, VLSI , or a related discipline Why Join Us? Be part of a dynamic team that is at the forefront of memory innovation . This is your chance to contribute to industry-leading technologies and take ownership of complex verification challenges. Apply now or refer a candidate! DM us or send your resume to vignesh@mileveen.com Show more Show less