2300 Verilog Jobs - Page 11

Eximietas Design Hiring Senior Design Verification (PCIE) Engineers / Leads / Managers. Experience: 5+ to 15 Years. Location: Visakhapatnam. Job Description: # Lead SoC Design Verification efforts for complex projects, ensuring successful execution of verification plans. # Develop and implement comprehensive verification strategies, including test plans, testbenches, and coverage analysis, for both high-speed and low- speed peripherals (e.g., I2C, SPI, UART, GPIO, QSPI) as well as high- speed protocols (e.g., PCIe, Ethernet, CXL, MIPI, DDR, HBM). # Conduct Gate-level simulations and power-aware verification using tools like Xprop and UPF. # Collaborate closely with cross-functional teams, including architects, designers, and pre/post-silicon verification teams, to ensure alignment and seamless integration of verification efforts. # Analyze and implement System Verilog assertions and functional coverage (code, toggle, functional) to ensure thorough verification of design functionality. # Provide mentorship and technical guidance to junior verification engineers, helping to elevate team performance. # Lead and manage a dynamic team of verification engineers, fostering a collaborative and innovative work environment. # Ensure that all verification signoff criteria are met, with clear and comprehensive documentation. # Demonstrate strong dedication, work ethic, and commitment to meeting project goals and deadlines. # Uphold quality standards and implement best test practices, contributing to continuous improvements in verification methodologies. # Work with verification tools from Synopsys and Cadence, including VCS and Xsim. # I ntegrate third-party VIPs (Verification IP) from Synopsys and Cadence to enhance verification coverage. Qualifications: Minimum 5+ years of hands-on experience in SoC Design Verification. # Expertise in verification of high-speed SoCs and various protocols, including I2C/I3C, SPI, UART, GPIO, QSPI, PCIe, Ethernet, CXL, MIPI, DDR, and HBM. # Proficiency in System Verilog for verification, including assertions and coverage. # Experience with gate-level simulations and power-aware verification using Xprop and UPF. # Strong hands-on experience with VCS and Xsim from Synopsys and Cadence. # Mentorship experience, providing guidance to junior engineers and managing verification teams. # Demonstrated ability to work with cross-functional teams, ensuring effective collaboration and verification signoff. # Strong understanding of verification methodologies and ability to contribute to their continuous improvement. Preferred Qualifications: # Experience in third-party VIP integration (Synopsys/Cadence). # Prior experience in leading large verification teams and projects. # Familiarity with pre/post-silicon verification processes. Interested Engineers, please share your updated resume: maruthiprasad.e@eximietas.design

Hi All, Greetings from Eximietas...! Position: Senior DFT Engineers/Leads/Architects Location: Visakhapatnam Mode of Work: On-site Exp: 5 to 15 Years We are looking for SoC/ASIC Digital Design Engineer with experience in Design for Test (DFT). An intimate knowledge and experience in scan chain insertion, compression scan technologies, memory built-in self-test (MBIST) and automatic test pattern generation (ATPG) is required for this position. Should follow systematic quality metrics driven ATPG pattern generation. It is highly desirable for candidate to possess hands-on knowledge of synthesis, verification and debugging Verilog testbenches. Job Overview: Must be able to obtain and maintain a Department of Defense classified clearance Prior 5-15 years of professional experience in SoC/ASIC Digital Design with focus on Design for Test (DFT) Should possess intimate knowledge of DFT insertion flows Basic scan chain insertion using synthesis or other software tools Experience in compression scan insertion, LBIST and other scan technologies Intimate knowledge of memory build-in self-test (MBIST) Expertise in Automatic Test Pattern Generation (ATPG) to achieve design test coverage goals Debug and Analysis of failures to improve fault coverage Verification of ATPG testbenches and debugging root cause of simulation mis-compares Working knowledge of JTAG 1149.1/6, IEEE1500 and IEEE1687 Knowledge of timing analysis and equivalency checks would be added bonus Ability to work in collaborative team environment Should be able to finish DFT tasks independently Strong problem-solving skills. Exhibit discipline, thoroughness, and methodical approach in solving problems Ability to work with stakeholders across cross-functional teams – Architecture, Design, Internal and External Customers Self-driven and committed individual who can work in a fast-paced project environment This job might be for you if : You enjoy solving problems and love tackling difficult challenges with creative solutions. You persistently seek answers even when they are not readily available. You communicate clearly and write well . You are motivated, driven, and take initiative without waiting to be asked. You take ownership of your work and strive to make a difference. You can impress customers with your enthusiasm and ability to solve their issues. Qualifications: Bachelor’s degree in Computer Science, Electrical/Electronics Engineering , or a related field.

Hi All, Greetings from Eximietas...! We are hiring DFX Engineers with 4-10 years experience DFx Verification JD: Good experience in SoC RTL verification and debug, GLS simulations and debug, Verilog coding experience, good understanding on JTAG and verification in Test Mode. It's good to have pattern generation and Silicon debug experience. We are not looking for MBIST/SCAN related experience. Please let me know if you have suitable profiles. Location – Visakhapatnam Interested candidates please share your updated resume: maruthiprasad.e@eximietas.design

Hi All, Greetings from Eximietas...! Position: Senior DFT Engineers/Leads/Architects Location: Visakhapatnam Mode of Work: On-site Exp: 5 to 15 Years We are looking for SoC/ASIC Digital Design Engineer with experience in Design for Test (DFT). An intimate knowledge and experience in scan chain insertion, compression scan technologies, memory built-in self-test (MBIST) and automatic test pattern generation (ATPG) is required for this position. Should follow systematic quality metrics driven ATPG pattern generation. It is highly desirable for candidate to possess hands-on knowledge of synthesis, verification and debugging Verilog testbenches. Job Overview: Must be able to obtain and maintain a Department of Defense classified clearance Prior 5-15 years of professional experience in SoC/ASIC Digital Design with focus on Design for Test (DFT) Should possess intimate knowledge of DFT insertion flows Basic scan chain insertion using synthesis or other software tools Experience in compression scan insertion, LBIST and other scan technologies Intimate knowledge of memory build-in self-test (MBIST) Expertise in Automatic Test Pattern Generation (ATPG) to achieve design test coverage goals Debug and Analysis of failures to improve fault coverage Verification of ATPG testbenches and debugging root cause of simulation mis-compares Working knowledge of JTAG 1149.1/6, IEEE1500 and IEEE1687 Knowledge of timing analysis and equivalency checks would be added bonus Ability to work in collaborative team environment Should be able to finish DFT tasks independently Strong problem-solving skills. Exhibit discipline, thoroughness, and methodical approach in solving problems Ability to work with stakeholders across cross-functional teams – Architecture, Design, Internal and External Customers Self-driven and committed individual who can work in a fast-paced project environment This job might be for you if : You enjoy solving problems and love tackling difficult challenges with creative solutions. You persistently seek answers even when they are not readily available. You communicate clearly and write well . You are motivated, driven, and take initiative without waiting to be asked. You take ownership of your work and strive to make a difference. You can impress customers with your enthusiasm and ability to solve their issues. Qualifications: Bachelor’s degree in Computer Science, Electrical/Electronics Engineering , or a related field.

Hi All, We are seeking a talented and experienced Micro-architect RTL Engineer to join our dynamic team. The ideal candidate will have a strong background in multiple technologies, along with exposure to ARM or microprocessor design and networking. Experience: 10+ Years. Key Responsibilities : Design and implement RTL (Register Transfer Level) microarchitecture for high-performance processors. Develop and optimize microarchitectural components, ensuring efficient execution and low-power consumption. Collaborate with cross-functional teams including hardware designers, verification engineers, and software developers to achieve project goals. Conduct performance analysis and optimization of microarchitectural designs. Participate in the development of verification plans and methodologies to ensure design quality. Stay updated with the latest industry trends and advancements in microarchitecture and RTL design. Key Skills and Qualifications : Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field. Extensive experience in RTL design using VHDL, Verilog, or System Verilog. Proven track record in microarchitecture design and development. Familiarity with ARM or microprocessor design, including architecture, instruction sets, and pipelines. Strong understanding of networking concepts and protocols. Proficiency in design and simulation tools such as Cadence, Synopsys, or Mentor Graphics. Experience with performance analysis and optimization techniques. Excellent problem-solving skills and attention to detail. Strong communication and teamwork skills. Preferred Qualifications : Experience with low-power design techniques and methodologies. Familiarity with formal verification and validation methodologies. Knowledge of scripting languages such as Python or Perl for automation purposes. What We Offer : A collaborative and innovative work environment. Opportunities for professional growth and development. Competitive salary and benefits package. Work on cutting-edge technology projects that make a real impact. Location: Bangalore & Visakhapatnam Interested Engineers please share your updated resume : maruthiprasad.e@eximietas.design

Eximietas Hiring Senior Design Verification Engineers/Leads (PCIE) Experience - 5-15 Yrs. Location - Visakhapatnam. Job Description: Lead SoC Design Verification efforts for complex projects, ensuring successful execution of verification plans. Develop and implement comprehensive verification strategies , including test plans, testbenches, and coverage analysis, for both high-speed and low-speed peripherals (e.g., I2C, SPI, UART, GPIO, QSPI) as well as high-speed protocols (e.g., PCIe, Ethernet, CXL, MIPI, DDR, HBM ). Conduct Gate-level simulations and power-aware verification using tools like Xprop and UPF . Collaborate closely with cross-functional teams, including architects, designers , and pre/post-silicon verification teams , to ensure alignment and seamless integration of verification efforts. Analyze and implement System Verilog assertions and functional coverage (code, toggle, functional) to ensure thorough verification of design functionality. Provide mentorship and technical guidance to junior verification engineers, helping to elevate team performance. Lead and manage a dynamic team of verification engineers, fostering a collaborative and innovative work environment . Ensure that all verification signoff criteria are met, with clear and comprehensive documentation. Demonstrate strong dedication, work ethic, and commitment to meeting project goals and deadlines . Uphold quality standards and implement best test practices , contributing to continuous improvements in verification methodologies. Work with verification tools from Synopsys and Cadence , including VCS and Xsim . Integrate third-party VIPs (Verification IP) from Synopsys and Cadence to enhance verification coverage. Qualifications: 5+ years of hands-on experience in SoC Design Verification . Expertise in verification of high-speed SoCs and various protocols, including I2C/I3C , SPI , UART , GPIO , QSPI , PCIe , Ethernet , CXL , MIPI , DDR , and HBM . Proficiency in System Verilog for verification, including assertions and coverage . Experience with gate-level simulations and power-aware verification using Xprop and UPF . Strong hands-on experience with VCS and Xsim from Synopsys and Cadence . Mentorship experience, providing guidance to junior engineers and managing verification teams. Demonstrated ability to work with cross-functional teams , ensuring effective collaboration and verification signoff. Strong understanding of verification methodologies and ability to contribute to their continuous improvement.

Hi, Tech Mahindra hiring Design Verification Engineers for Bangalore. Exp-5-10yrs Location: Bangalore Notice Period: 0-45days JD: 5-10 years of professional experience in the industry with a proven track record of successfully building and delivering complex SOC computing devices Bachelor’s or master’s degree in Electronics/Computer Engineering or Computer Science with emphasis on computer architecture and performance/power analysis Experience with computer system simulation and performance evaluation Demonstrated success working in global development teams Experience working with cross-functional teams from multiple departments Experience with ASIC hardware design and verification languages/tools (Verilog, System Verilog, System C, UVM/UVC) Proficiency in debugging RTL code using simulation tools Proficiency with programming and scripting languages (C/C++, Perl, Python, etc.) Experience analyzing system bottlenecks and optimizing computing systems for performance Detailed microarchitecture knowledge in one or more of the following IPs - CPU, GPU, DSP, NPU, multimedia co-processor, I/O subsystem, DRAM controller Strong verbal, written, and interpersonal communication skills with both technical and non-technical audiences If interested share cv to Ramya.K1@techmahindra.com

Experience : 4+years Location : Bangalore Job Description: Candidate should be good in Integration of SOC & RTL coding. Should be aware of soC flow like Spyglass-Lint/Synthesis (DC)/CDC. Should be aware of scripting language. Candidate should have experience on SOC Integration, SpyGlass Lint, CDC, DC-Synthesis & VCLSP. Should have good understanding of SoC flows. Primary Skills VHDL, Verilog, Micro-architecture, RTL coding, CDC, Lint, Synthesis, STA, IP development, SoC integration, VCLP, scripting - Perl, Python, Shell, and Tcl. Secondary Skills Synopsis/Cadence tool flow, ARM Coretex, DMA, DDR, SPI, I2C, UART, AHB/AXI/APB, Ethernet, USB, PCIe, Mipi CSI/DSI, LPDDR.

Bengaluru, Karnataka, India Category: Engineering Hire Type: Employee Job ID 12356 Date posted 07/24/2025 Who we are: Synopsys (NASDAQ: SNPS) is the biggest ASIC EDA software company and the 2nd largest semiconductor IP provider in the world. Founded in 1986, $5B+ Synopsys employs 20,000+ headquartered in Mountain View, California, located globally in over 25 countries with 113+ offices throughout North America, Europe, Japan, Asia, and India. We enable companies to create the leading-edge micro-chips found in the latest smartphones, data center servers; and automobile smart systems. Synopsys is committed to fostering an environment that treats people with respect, honesty, and professionalism. We only want the best of the best to join our team. Be ready to produce results; bring innovation, creativity, and passion to work every day. What you will do: As a tech savvy and passionate Technical Writer in the Solutions Group at Synopsys, you will be part of a group responsible for developing and writing user documentation for various Digital and Mixed Signal IPs. You will have an opportunity to work across the various IP product lines of USB, PCIe, Ethernet, DDR, HDMI, MIPI etc., You will be responsible for planning, organizing, writing, and editing the technical specifications, engineering schematics, application notes, and user guides. You will be interfacing with our Design Engineering team to collect the raw content of technical specification and to effectively transform this into user consumable collateral by following the doc-processes. You will work independently, interacting, and collaborating with multi-site teams and you will deliver high quality documentation by demonstrating strict adherence to the style guide and other doc-processes followed by the group. As a writer, you will collaborate with other teams and have a significant and immediate impact on all customer documentation produced and the documentation roadmap. Hard skills we are looking for: Degree or masters in any electronics, science, hardware, computing, software, physics, mathematics, or engineering discipline. Other technical disciplines also considered. 3-7 years technical writing experience in software or hardware industry Excellent problem-solving skills; strong logical reasoning and solution-oriented Experience with authoring tools such as FrameMaker Excellent English writing and speaking skills Soft skills we are looking for: Has excellent communication and interpersonal skills Energetic and capable of learning new technologies as necessary Team player and able to work independently with minimal supervision You care (about others, about doing a good job, about details) You take ownership of projects and tasks assigned to you with little to no supervision and have pride in quality work done correctly the first time Advantageous skill areas that will give you the edge: Familiarity with Verilog and ASIC digital design flows TCL Structured FrameMaker. XSLT and XPATH Structured FrameMaker EDD and DTD DITA, DocBook, or IP-XACT XML schemas FrameScript, ExtendScript, or FDK DITA Open Toolkit At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

Bengaluru, Karnataka, India Category: Engineering Hire Type: Employee Job ID 12355 Date posted 07/24/2025 Who we are: Synopsys (NASDAQ: SNPS) is the biggest ASIC EDA software company and the 2nd largest semiconductor IP provider in the world. Founded in 1986, $5B+ Synopsys employs 20,000+ headquartered in Mountain View, California, located globally in over 25 countries with 113+ offices throughout North America, Europe, Japan, Asia, and India. We enable companies to create the leading-edge micro-chips found in the latest smartphones, data center servers; and automobile smart systems. Synopsys is committed to fostering an environment that treats people with respect, honesty, and professionalism. We only want the best of the best to join our team. Be ready to produce results; bring innovation, creativity, and passion to work every day. What you will do: As a tech savvy and passionate Technical Writer in the Solutions Group at Synopsys, you will be part of a group responsible for developing and writing user documentation for various Digital and Mixed Signal IPs. You will have an opportunity to work across the various IP product lines of USB, PCIe, Ethernet, DDR, HDMI, MIPI etc., You will be responsible for planning, organizing, writing, and editing the technical specifications, engineering schematics, application notes, and user guides. You will be interfacing with our Design Engineering team to collect the raw content of technical specification and to effectively transform this into user consumable collateral by following the doc-processes. You will work independently, interacting, and collaborating with multi-site teams and you will deliver high quality documentation by demonstrating strict adherence to the style guide and other doc-processes followed by the group. As a writer, you will collaborate with other teams and have a significant and immediate impact on all customer documentation produced and the documentation roadmap. Hard skills we are looking for: Degree or masters in any electronics, science, hardware, computing, software, physics, mathematics, or engineering discipline. Other technical disciplines also considered. 3-7 years technical writing experience in software or hardware industry Excellent problem-solving skills; strong logical reasoning and solution-oriented Experience with authoring tools such as FrameMaker Excellent English writing and speaking skills Soft skills we are looking for: Has excellent communication and interpersonal skills Energetic and capable of learning new technologies as necessary Team player and able to work independently with minimal supervision You care (about others, about doing a good job, about details) You take ownership of projects and tasks assigned to you with little to no supervision and have pride in quality work done correctly the first time Advantageous skill areas that will give you the edge: Familiarity with Verilog and ASIC digital design flows TCL Structured FrameMaker. XSLT and XPATH Structured FrameMaker EDD and DTD DITA, DocBook, or IP-XACT XML schemas FrameScript, ExtendScript, or FDK DITA Open Toolkit At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

You are invited to join VINIRMA Consulting Pvt. Ltd., a reputable 360-degree Human Resource Management Consulting and Staffing Services Organization operating in various countries including UAE, Qatar, Bahrain, Australia, USA, Singapore & India. Currently, we are seeking a Validation Engineer (AMS/Cosim) for our esteemed client in Bangalore. The ideal candidate should possess 3 years of experience in Verilog/spice co-sim, power up sequence, Analog block simulation at SOC level, and Electrical checks, along with good debug skills. The educational qualification required for this role is BE/B.Tech. As a selected candidate, you will be a direct employee of one of the leading organizations in Bangalore. If you are interested in this exciting opportunity, kindly submit your latest resume in MS Word format to ambili.krishnan@vamsystems.com or contact us at +91 476-2681150. We look forward to hearing from you soon.,

You will be part of a highly skilled and challenging high-speed parallel PHY design team, working on DDR, LPDDR, and other similar projects. Your responsibilities will include designing and developing high-speed interface PHY and its sub-blocks, such as high-speed data paths, analog calibration, training, IP initialization, low power control, test, and loopback functionalities. You will be accountable for various aspects of design and verification starting from specification to silicon, along with interface design for controllers and SoCs. Your active involvement in problem-solving and identifying opportunities for improvement will be crucial. Additionally, you will be mentoring and coaching other design team members on technical issues, collaborating closely with Analog designers to ensure a seamless interface between Digital and Analog circuits. Your skill set should include strong fundamental knowledge of digital design, Verilog, and scripting languages. Experience with micro-architecture and Asynchronous digital designs is required. Working knowledge of Synthesis, STA, Lint & CDC, DDR/LPDDR JEDEC protocol, DDR PHY designs, training algorithms, data path designs, domain transfer designs, APB/JTAG, and DFI is essential. The ideal candidate should have an M.S./M.Tech or BS/BE degree in Electronics. Micron Technology is a global leader in innovating memory and storage solutions, with a vision to transform how the world uses information to enrich lives. Micron's relentless focus on customers, technology leadership, and manufacturing excellence delivers a rich portfolio of high-performance DRAM, NAND, and NOR memory and storage products through the Micron and Crucial brands. Micron's innovations power the data economy, enabling advances in artificial intelligence and 5G applications from data centers to the intelligent edge, and across client and mobile user experiences. For more information about Micron Technology, Inc. and career opportunities, please visit micron.com/careers. To seek assistance with the application process or request reasonable accommodations, please reach out to hrsupport_india@micron.com. Micron strictly prohibits the use of child labor and adheres to all applicable laws, regulations, and international labor standards.,

As a VLSI Design Engineer at Kinara, you will be part of a dynamic team focused on edge AI technology, pushing the boundaries of what's achievable in machine learning and artificial intelligence. You will contribute to the development of state-of-the-art AI processors and high-speed interconnects, ensuring unmatched performance, power efficiency, and scalability to meet the demands of modern AI applications. Your role will involve working on cutting-edge semiconductor projects, requiring a blend of technical expertise, problem-solving skills, and collaborative teamwork. Your responsibilities will include defining micro-architecture and creating detailed design specifications, developing RTL code based on system-level requirements using Verilog, VHDL, or SystemVerilog, implementing complex digital functions and algorithms in RTL, and executing comprehensive test plans to verify RTL designs. You will optimize designs for power, performance, and area constraints, conduct simulation and debugging activities to ensure design accuracy, collaborate with verification engineers to develop test benches and validate RTL against specifications, and apply your strong understanding of digital design principles and concepts. To excel in this role, you should possess proficiency in writing and debugging RTL code, experience with synthesis, static timing analysis, and linting tools, familiarity with scripting languages like Python, Perl, or TCL for automation, and expertise in processor subsystem design, interconnect design, or high-speed IO interface design. A Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field, along with 5+ years of experience in RTL design and verification, is required. Proven experience in digital logic design using Verilog, VHDL, or SystemVerilog, familiarity with simulation tools such as VCS, QuestaSim, or similar, and hands-on experience with RTL design tools like Synopsys Design Compiler and Cadence Genus is preferred. At Kinara, we offer an innovative environment where technology experts and mentors collaborate to tackle exciting challenges. We believe in sharing responsibilities and valuing diverse viewpoints. If you are passionate about making a difference in the field of edge AI technology, we invite you to join our team and contribute to creating a smarter, safer, and more enjoyable world. Your application is eagerly awaited as we look forward to reviewing your qualifications and experiences. Make your mark with us at Kinara!,

Increasing digitalization and flexibility of production processes presents outstanding potential. In Digital Industries, you enable customers to unlock their full potential and drive digital transformation with a unique portfolio of automation and digitalization technologies. From hardware to software to services, Siemens has quite a lot to offer. The company blurs the boundaries between industry domains by integrating the virtual and physical, hardware and software, design and manufacturing worlds. With the rapid pace of innovation, digitalization is no longer tomorrow's idea. Siemens takes what the future promises tomorrow and makes it real for customers today. Join Siemens, where your career meets tomorrow. Siemens is looking for Siemens EDA ambassadors. The Veloce Transactor Group, part of Mentor Emulation Division R&D located in Noida, develops transactors (RTL based IPs/VIPs) for various protocol solutions in Networking, Display, Storage, Mobile, Automobile, etc. The Veloce Transactor Library currently supports more than 25 protocol solutions and is growing further. As an individual in this role, you will be responsible for developing transactor (xVIP) solutions for CCIX or PCIe based interconnect technology. Your primary responsibilities will include understanding standard specifications, developing architecture and micro-arch for the design, and writing a synthesized design using Verilog/System Verilog. Required Experience: - We are seeking a graduate with at least 1-5 years of relevant working experience with (BE/BTech/ME/MTech/MS) from a reputed engineering college. - Your experience with protocols such as PCIe, USB, Ethernet, AMBA in Design or Verification is valued. - A good understanding of IP Verification Methodologies, Verification procedures, and practices are a plus. Experience in one or more verification techniques such as simulation, emulation, acceleration, formal, etc., is beneficial. - Expertise in Verilog, SystemVerilog, and SystemC, as well as experience in developing RTL for FPGAs, ASICs, and IPs, will greatly contribute to the quality of Siemens products. - Candidates should be able to build verification test plans and environments, develop test cases, utilize VIPs, and efficiently debug defects identified during verification processes. - Exposure to object-oriented programming languages like C++ is considered an advantage. Experience in scripting languages such as Perl will also be valuable in automating tasks and improving efficiency. Engagement with customers for Deployment and R&D assistance is required. Siemens has a lot to offer, how about you Siemens - where we are always challenging ourselves to build a better future. With some of the most inquisitive minds working across the world, re-imagining the future and doing extraordinary things.,

You are a talented and experienced Micro-architect RTL Engineer who will join a dynamic team. You have a strong background in multiple technologies and exposure to ARM or microprocessor design and networking. With over 10 years of experience, you will design and implement RTL microarchitecture for high-performance processors, optimizing components for efficient execution and low-power consumption. Your collaboration with cross-functional teams will help achieve project goals, including performance analysis and optimization of designs. You will also contribute to verification plans and methodologies, staying updated with industry trends. As a qualified candidate, you hold a Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field. Your extensive experience in RTL design using VHDL, Verilog, or System Verilog, along with a proven track record in microarchitecture design, makes you a valuable asset. Your familiarity with ARM or microprocessor design, networking concepts, and protocols, coupled with proficiency in design and simulation tools, helps you excel in this role. Your problem-solving skills, attention to detail, and communication abilities are essential for success. Preferred qualifications include experience with low-power design techniques, formal verification, and validation methodologies. Knowledge of scripting languages like Python or Perl is beneficial for automation purposes. In return, you will be part of a collaborative and innovative work environment with opportunities for professional growth and development. A competitive salary and benefits package await you as you work on cutting-edge technology projects that have a real impact. If you are interested in this opportunity, please share your updated resume at maruthiprasad.e@eximietas.design. The position is available in Bangalore & Visakhapatnam.,

You are invited to join Lattice Semiconductor as a SoC RTL Design Engineer in Pune, India. Lattice is a global community of engineers, designers, and specialists working in collaboration with sales, marketing, and support teams to develop cutting-edge programmable logic solutions that are revolutionizing the industry. As a SoC RTL Design Engineer at Lattice Semiconductor, you will be part of a dynamic team dedicated to IP design and full chip integration. This role offers ample opportunities to contribute, learn, innovate, and grow within a fast-paced and results-oriented environment. Key responsibilities of this role include working on FPGA projects, RTL design, SoC integration, and ensuring design quality through various quality checks. You will collaborate with architects and micro-architects to define design specifications and drive logic design efforts for key FPGA blocks and full chips. To excel in this role, you will need a BS/MS/PhD in Electronics Engineering, Electrical Engineering, Computer Science, or equivalent, along with at least 5 years of experience in logic design across multiple silicon projects. Expertise in SoC integration, familiarity with FPGA designs, and the ability to work with various teams across different sites and time zones are essential for success in this position. At Lattice, we value our employees as our greatest asset and are committed to providing a comprehensive compensation and benefits program to attract, retain, and celebrate top talent in the industry. If you thrive in a collaborative environment, are a problem-solver, and have a passion for innovation, Lattice Semiconductor may be the perfect fit for you. Join us at Lattice Semiconductor and be part of a team that is dedicated to customer success and driven by a shared commitment to excellence. To learn more about our innovative programmable design solutions, visit www.latticesemi.com and follow us on Twitter, Facebook, and RSS. At Lattice, we embrace diversity and welcome applications from all qualified candidates who can contribute to our dynamic workplace. Feel the energy at Lattice Semiconductor and discover a rewarding career where you can make a real impact in the industry.,

The company Eximietas Design is currently seeking an experienced and highly skilled RTL Micro Architect to join their team in Bangalore. As the RTL Micro Architect, you will be responsible for defining and implementing the microarchitecture of advanced semiconductor designs. Your role will involve working on challenging RTL design tasks, collaborating with various teams, and contributing to the development of high-performance and power-efficient solutions. Your key responsibilities will include defining microarchitecture specifications for complex SoC designs, leading RTL design and implementation using Verilog/SystemVerilog, collaborating with different teams to ensure project success, performing design trade-off analysis, developing design methodologies for efficiency improvement, mentoring junior engineers, participating in design reviews, and providing technical leadership. To qualify for this position, you should have at least 8 years of hands-on experience in RTL design and microarchitecture development, strong expertise in RTL design using Verilog/SystemVerilog and logic synthesis, proficiency in microarchitecture design for complex SoCs, experience with low-power design techniques, familiarity with advanced process nodes, strong scripting skills in Tcl, Python, or Perl, excellent problem-solving skills, and effective communication and leadership skills. In return, Eximietas Design offers you the opportunity to work on cutting-edge semiconductor designs and innovative technologies, a collaborative work environment, competitive compensation and benefits package, and professional growth and development opportunities. If you are interested in this position, please share your updated resume with maruthiprasad.e@eximietas.design.,

Eximietas Design is looking for an experienced and highly skilled RTL Micro Architect with over 8 years of experience to join the team. In this role, you will be instrumental in defining and implementing the microarchitecture of advanced semiconductor designs. Your responsibilities will include tackling complex RTL design challenges, collaborating with various teams, and contributing to the delivery of high-performance, power-efficient, and innovative solutions. As the RTL Micro Architect, your key responsibilities will involve defining and developing microarchitecture specifications for complex SoC designs, leading RTL design and implementation using Verilog/System Verilog, and collaborating with cross-functional teams to ensure successful project execution. You will also be expected to perform design trade-off analysis, develop design methodologies for efficiency improvement, mentor junior engineers, and participate in design reviews to provide technical leadership. To qualify for this role, you should have at least 5 years of hands-on experience in RTL design and microarchitecture development, strong expertise in using Verilog/System Verilog for RTL design, and proficiency in microarchitecture design for complex SoCs. Experience with low-power design techniques, familiarity with advanced process nodes, and scripting skills in Tcl, Python, or Perl will be advantageous. Additionally, strong problem-solving skills, attention to detail, communication, and leadership skills are essential for this position. In return, Eximietas Design offers you the opportunity to work on cutting-edge semiconductor designs and innovative technologies in a collaborative and inclusive work environment. You can expect a competitive compensation and benefits package along with professional growth and development opportunities. If you are interested in this exciting opportunity, please share your updated resume with us at maruthiprasad.e@eximietas.design. Join us in shaping the future of semiconductor designs!,

As a Senior FPGA Design Engineer at Prodigy Technovations in Bangalore/Bengaluru, you will have the opportunity to work on existing and next-generation Protocol Analyzers and similar products. Your role will involve contributing to the entire FPGA-based product development flow, from requirement analysis to final product testing in a lab environment. Your responsibilities will include architecture/micro-architecture design, Verilog logic implementation for targeted FPGA, and writing test benches to validate the design. You will collaborate closely with board design, software, testing, and lab teams to ensure the product meets customer requirements. Additionally, you will work with interfaces such as PCIe, GigE, MPHY/UFS, DPHY/CSI/DSI, USB, SD, eMMC, I3C/I2C, SPI/QSPI, among others. Qualifications: - BE/ME in Electronics from a reputed college, with a specialization in VLSI and Embedded Design being a plus. - 3 to 8 years of experience in designing and implementing FPGA-based solutions in Xilinx or Altera FPGA, preferably in FPGA-based product development. - Experience in System Design with Xilinx/Altera FPGA devices and relevant tools. - Proficiency in Verilog and/or VHDL coding. - Experience in synthesis, implementation, and using constraints to achieve timing requirements. - Knowledge of high-speed FPGA designs and Static Timing Analysis (STA) is advantageous. - Experience in building test benches for verification, board-level testing, and system debugging. - Familiarity with protocols like UFS, UniPro, USB, Ethernet, PCIe, I3C, I2C, SPI, QSPI, UART, JTAG, SPMI, RFFE, SD, eMMC. - Hands-on experience with FPGA debugging tools, oscilloscopes, and Logic Analyzers. - Strong problem-solving and debugging skills. If you are a motivated and experienced FPGA Design Engineer with a passion for product development and a strong background in FPGA technologies, we encourage you to apply for this exciting opportunity. Join our team at Prodigy Technovations and be part of creating cutting-edge solutions for top semiconductor companies.,

You are a FPGA design engineer with at least 5 years of experience, located in Vadodara, India. Your main responsibility is to implement control logic state machines and DSP algorithms in FPGA fabric for high throughput systems. You should possess excellent troubleshooting and debugging skills for both simulation and in-circuit scenarios. Your expertise should include: - Strong knowledge of digital design involving multiple clock domains - RTL design in Verilog and System-Verilog - Creating micro-architecture from high-level specifications - Functional simulation using ModelSIM or similar tools - FPGA design and synthesis, map and route flow, pin assignments, attribute assignments, resource fixing, and design partitioning - Targeting designs for Intel(Altera) or Xilinx FPGAs using Quartus Prime or Vivado - IP creation and parametrization using Vivado or Quartus - Debugging using ChipScope/SignalTap and lab bench oscilloscopes/protocol analyzers - Understanding of static timing analysis and timing closure using SDC - Collaborating with a cross-functional, global team of hardware designers, software engineers, verification and validation engineers - Leading teams to successful project completion within deadlines - Strong problem-solving skills It would be beneficial if you also have expertise in: - Knowledge of TCL scripting and Python - Transceivers and PHY - Power estimation and resource utilization estimation - Soft-processor cores like Microblaze or Nios-II - Understanding of Digital Signal Processing concepts - Proficiency in Matlab or Python for algorithm design - Familiarity with embedded systems/C/C++ About A&W Engineering Works: A&W Engineering Works is committed to developing and deploying innovative solutions to real-world problems. The company specializes in developing complete systems from front-end sensors to back-end applications, covering analog, digital signal processing, and algorithmic data and control paths. The team at A&W Engineering Works has a wide range of expertise in hardware, software, mechanical engineering, and systems development, aiming to solve complex problems efficiently with innovative development techniques and fast prototyping. To apply for this position, please send an email to [email protected] with your resume and cover letter attached, and remember to include the job title in the subject line.,

You will be responsible for designing and RTL Coding using Verilog and/or VHDL, Design Verification, FPGA Synthesis, Place & Route, timing verification, Programming. You will also conduct lab-based analysis and debug on Hardware platforms, and FPGA prototyping which may require partitioning the core on two or more FPGAs. To qualify for this role, you should have 3-8 years of experience in FPGA Design & Development, and hold a BE/BTECH/ME/MTECH in EC/EE/CS or related field. Proficiency in VHDL and/or Verilog programming languages is required, along with exposure to industry standard FPGA design tools. Experience in multi-FPGA design partitioning is preferred, and domain expertise in Wimax/LTE/WLAN will be considered a plus. This position is ideal for candidates seeking Embedded Software Jobs.,

As FPGA Architect, you will play a pivotal role in leading the design and development efforts across a range of projects in a dynamic and collaborative environment. Your primary responsibility will involve defining and creating complex FPGA designs for our Test products. Working closely with a diverse team including R&D Project Managers, Product Architects, Solution Teams, FPGA developers, Software Qualification, and Software Engineers, you will contribute to the innovation of new product offerings and enhancements to existing products. A vital aspect of this role will be your ability to work effectively with design teams based in the US and Europe, showcasing your strong teamwork skills and collaborative mindset. To excel in this role, you should possess the following qualifications: - A Bachelor's or Master's degree in Electrical/Electronic Engineering - Minimum of 10 years of experience in FPGA development with expertise in Altera and Xilinx technologies - Proficiency in RTL languages such as VHDL or Verilog - Familiarity with Xilinx FPGA Tools Design Flow including Vivado, Chipscope, and Quartus - Experience in using EDA Functional Simulation tools like Synopsys, Mentor, or Cadence - Proven ability to adapt quickly to new technologies, protocols, and product segments - Hands-on experience in developing self-checking Simulation environments, test benches, automation scripts, and test case creation - Collaborative work with system architects to define system architecture and FPGA integration with other components on PCA boards - Strong background in timing closure for intricate designs - Exceptional written communication skills for creating various technical documents such as Product Definitions, Detailed FPGA Designs, and Hardware & Software Interface documents - Self-motivated, well-organized, and proactive individual - Excellent team player with a high level of responsiveness and accountability - Strong verbal communication skills Preferred qualifications include: - Familiarity with Keysight instruments like Oscilloscope, Analyzer, AWG & BERT - Experience working with protocols such as PCI Express, USB, MIPI, Ethernet, and DDR - Exposure to international and multi-vendor collaboration environments - Full-time job type with flexible schedule This role offers the opportunity to work in person at the specified location, providing a conducive environment for professional growth and innovation.,

The ideal candidate for the FPGA Engineer position in Hyderabad/Bangalore should have a minimum of 4 years of experience in the field. You should possess basic STA knowledge and be proficient in using tools like Vivado. Your expertise should extend to FPGA platforms such as AMD(XILINX) and Altera. Additionally, you should be skilled in digital hardware designing using Verilog on large AMD(Xilinx)/Altera FPGAs. Proficiency in scripting languages like perl, python, and tcl is essential for this role. Experience in working with Linux operating systems is also required. You will be responsible for completing design and timing verification tasks within specified timelines. The ability to work both independently and as part of a team is crucial for success in this role. Your primary job deliverables will include designing, implementing, testing, integrating, and delivering system-level digital designs for FPGA blocks timing verification. You will also be tasked with debugging design timing related issues on various FPGA families and segmenting FPGA designs effectively. In this role, you will run internal scripts for performance testing and update them as needed. A BTech/MTech qualification is necessary to be considered for this position. If you meet these requirements and are interested in the opportunity, please share your CV with sharmila.b@acldigital.com.,

Qualcomm India Private Limited is seeking a qualified Hardware Design Engineer with 5-8 years of experience in ASIC IP cores design to join their Engineering Group. In this role, you will be responsible for working independently on peripheral IPs, designing and proposing microarchitecture solutions, guiding and mentoring junior team members, and collaborating with external teams to resolve cross-team dependencies. Additionally, you will be expected to take complete ownership of one or more projects and drive them independently. The ideal candidate should possess a Bachelor's degree in Electrical Engineering (Master's degree preferred) and have a strong knowledge of AMBA protocols such as AXI, AHB, and APB. Experience with SoC clocking, reset, debug architecture, and peripherals like USB, PCIE, and Ethernet is desirable. Hands-on experience in Low power design, Multi Clock designs, and Asynchronous interfaces is required. Proficiency in using ASIC development tools like Lint, CDC, Design compiler, and Primetime is necessary. Furthermore, the successful candidate should have a good understanding of constraint development, timing closure, and synthesis concepts. Strong experience in micro architecting RTL design from high-level design specification is essential. Proficiency in System Verilog, Verilog, C/C++, Perl, and Python is a plus. Excellent problem-solving, communication, and teamwork skills are mandatory for this role. The ability to lead a small design team and work with minimal supervision is also required. Minimum qualifications for this position include a Bachelor's degree in Computer Science, Electrical/Electronics Engineering, or a related field with at least 3 years of Hardware Engineering experience. Alternatively, a Master's degree with 2+ years of relevant experience or a PhD with 1+ year of experience will also be considered. As a Hardware Design Engineer at Qualcomm, you will leverage your knowledge and experience to plan, optimize, verify, and test electronic systems. You will collaborate with various teams to implement new requirements and incorporate the latest test solutions to improve yield, test time, and quality. Your responsibilities will also include evaluating and developing manufacturing solutions for leading-edge products, ensuring reliability, and identifying potential design flaws or compatibility issues. This role requires independent work with minimal supervision, providing guidance to team members, and making decisions that may impact work beyond the immediate team. Strong verbal and written communication skills are essential for conveying information effectively. Problem-solving and prioritization skills will be necessary to complete tasks efficiently. If you meet the qualifications and are interested in joining Qualcomm's dynamic team, we encourage you to apply for this exciting opportunity.,

As a Senior Hardware Design Engineer at Agnisys, you will have the opportunity to work on high-tech semiconductor products by joining our R&D team. We provide a progressive and innovation-driven environment that promotes constant learning, which is crucial for personal and professional growth. Basic Requirements: - A B.Tech degree in Electronics and Communication Systems - Proficiency in Verilog, VHDL, SystemVerilog & C - Experience with FPGA, EDA Tools, Linux, Perl, and Tcl - Excellent communication skills - Ability to work independently with minimal supervision and collaboratively within a team - Strong multi-tasking skills - Self-motivated with a solid team spirit Job Responsibilities: - Design, plan, document, and develop new hardware products from initial requirements to production-ready prototypes - Maintain existing designs and create new variants to incorporate new features and manage component end-of-life issues - Collaborate with Hardware team members, Product Management, Software Engineering, and Manufacturing to deliver reliable and standards-compliant products About Agnisys: Agnisys Inc. is a prominent supplier of Electronic Design Automation (EDA) software aimed at addressing complex design and verification challenges in system development. Our products facilitate a unified specification-driven development flow, enabling users to describe registers and sequences for SoC and IP projects and automatically generate RTL design, UVM testbenches, C/C++ embedded code, and documentation. This approach accelerates design, verification, firmware, and validation processes. Leveraging patented technology and user-friendly interfaces, our specification automation tools enhance productivity, efficiency, and accuracy in system design and verification. Established in 2007, Agnisys is headquartered in Boston, Massachusetts, with R&D centers in Milpitas, CA, and Noida, India. Location: Noida Job Type: Full-time Schedule: Monday to Friday Work Location: In person,