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Advanced Micro Devices, Inc
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RTL design Engineer with static verification tools exp

RTL design Engineer with static verification tools exp

Advanced Micro Devices, Inc

4 - 9 years

10 - 15 Lacs

hyderabad

Posted:14 hours ago| Platform:

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Skills Required

vhdl asic fpga soc verilog perl silicon ieee python recruitment

Work Mode

Work from Office

Job Type

Full Time

Job Description

WHAT YOU DO AT AMD CHANGES EVERYTHING

At AMD, our mission is to build great products that accelerate next-generation computing experiences from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you ll discover the real differentiator is our culture. We push the limits of innovation to solve the world s most important challenges striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond.

Together, we advance your career.

SENIORSILICON DESIGN ENGINEER

THE ROLE:

Join our leading-edge Design and RTL Methodology team as a Hardware Development Engineer, contributing directly to the development of our latest FPGA products. In this role, you will help ensure the highest quality of RTL design that our customers rely on

.

THE PERSON:

You are an experienced, proactive RTL Design Engineer who thrives in a fast-paced environment. You quickly ramp up on new tools and methodologies, and youre comfortable working on a small, highly capable team where you can take on significant responsibility.

KEY RESPONSIBILITIES:

We will guide you as you ramp up on our RTL design and static verification tools and methodology ecosystem.

Collaborate with the design team to drive continuous improvements in front-end design methodologies, ensuring top-quality RTL across areas such as Lint, CDC, formal equivalence, and low-power verification.
Enhance and develop flows that analyze RTL and Unified Power Format (UPF) Files, including updating or creating new UPF to enable robust verification of power-domain crossings for AMDs next-generation monolithic and stacked FPGA-SoC product families.
Leverage corporate AI systems to increase productivity and streamline workflows.

PREFERRED EXPERIENCE:

Proven experience in logic design and static verification (SystemVerilog, Verilog, or VHDL), with contributions to one or more ASIC products brought to market.
Strong background in RTL/logic design, including specifying multi-power-domain architectures using IEEE 1801 Unified Power Format (UPF).
Programming skills in Perl, Python, and TCL

ACADEMIC CREDENTIALS:

Bachelors degree in Electrical or Computer Engineering; Masters degree preferred.

#LI-SR4

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RTL design Engineer with static verification tools exp