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STA Lead

Mulya Technologies

7 years

0 Lacs

greater bengaluru area

Posted:2 days ago| Platform:

Apply

Skills Required

service timing layout development design dft ip switching model scaling analysis data automation perl tcl

Work Mode

On-site

Job Type

Full Time

Job Description

Large Semiconductor Service Organization with revenue over 600 Million USD

Location: Bangalore

Experience : 7+ Years

Work location : Bangalore

Well versed with the timing closure (STA), timing closure methodologies.
Pre/Post-layout constraint development to timing closure.
Handshake with the design team and develop functional/DFT constraints.
IP level constraint integration.
Multi-voltage/Switching aware corner definitions.
RC/C model selection understanding.
Abstraction expertise like Hyperscale/ILM/ETM.
RC Balancing and scaling analysis of full chip clock.
RC Balancing and scaling analysis of critical data paths.
Good automation skills in PERL, TCL and EDA tool-specific scripting.
DMSA @ full chip and custom scripts for timing fixes

Qualification:

BE/BTECH/MTECH in EE/ECE with proven experience in ASIC Physical Design.
Detailed knowledge of EDA tools and flows, Tempus/Primetime experience is must.
Experience – 7+ years.

Contact:

Uday

Mulya Technologies

muday_bhaskar@yahoo.com

"Mining The Knowledge Community"

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STA Lead

Experience & Salary

Skills Required

Work Mode

Job Type

Job Description

Large Semiconductor Service Organization with revenue over 600 Million USD

Location: Bangalore

Experience : 7+ Years

Work location : Bangalore

Well versed with the timing closure (STA), timing closure methodologies.

Pre/Post-layout constraint development to timing closure.

Handshake with the design team and develop functional/DFT constraints.

IP level constraint integration.

Multi-voltage/Switching aware corner definitions.

RC/C model selection understanding.

Abstraction expertise like Hyperscale/ILM/ETM.

RC Balancing and scaling analysis of full chip clock.

RC Balancing and scaling analysis of critical data paths.

Good automation skills in PERL, TCL and EDA tool-specific scripting.

DMSA @ full chip and custom scripts for timing fixes

Qualification:

BE/BTECH/MTECH in EE/ECE with proven experience in ASIC Physical Design.

Detailed knowledge of EDA tools and flows, Tempus/Primetime experience is must.

Experience – 7+ years.

Contact:

Uday

Mulya Technologies

muday_bhaskar@yahoo.com

"Mining The Knowledge Community"

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