Principal STA / Synthesis Engineer

Job Description

Principal STA / Synthesis Engineer Hyderabad Founded by highly respected Silicon Valley veterans - with its design centers established in Santa Clara, California. / Hyderabad/ BangaloreA US based well-funded product-based startup looking for Highly talented Engineers for the following roles.Constraint developmentConstraint managementConstraint validationChip top level synthesis, sta and Timing Closure.RTL2GDS flow.Ability to handle synthesis,sta, lec, upf flow methodologies.TCL/perl/python scripting.Candidate with 12+ yrs exp in Synthesis / STA roleExperience in handling complex data path-oriented multi-million gate synthesisWorking Knowledge of Physical synthesis using tools like Genus, Design CompilerExperience in debugging for multi-clock domains hierarchical/flat timing analysis.Hands-on experience in LEC along with strong debugging skills for resolving issues/aborts.Netlist and constraint sign in checks and validation.Prime time constraint development at full chip level and clean up.Multimode multi corner timing knowledge and timing closure at block/top level using tools like DMSAExcellent debugging skills in timing convergence issues and ability to come up with creative solutions .Technical leadership and ability to mentor and make the team deliver. Contact:UdayMulya Technologiesmuday_bhaskar@yahoo.com"Mining The Knowledge Community"