Software Test Automation Engineer

Best NanoTech

6 years

0 Lacs

bengaluru karnataka india

Posted:1 week ago| Platform:

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Skills Required

software test automation synthesis cadence timing analysis constraints drive logic flow design power scripting tcl perl

Work Mode

On-site

Job Type

Full Time

Job Description

Role Overview

STA + Synthesis Engineer

Key Responsibilities

Perform
RTL-to-Gate Synthesis
using Genus / DC with high QoR.
Develop and optimize
SDC constraints
, clock definitions, and timing exceptions.
Execute
Static Timing Analysis (STA)
using
Cadence Tempus
and PrimeTime.
Drive
timing closure
across corners, modes, and hierarchical blocks.
Perform
timing debug
, ECO generation, and collaborate with PD teams for fixes.
Work with RTL designers to improve logic structure, timing robustness, and synthesis optimizations.
Develop scripts for better flow automation.

Required Skills

6+ years
experience in
STA and Synthesis
for SoC/ASIC.
Expert in
Cadence Tempus
(mandatory).
Strong hands-on experience with:
Genus / Design Compiler
PrimeTime (PT)
STA signoff flows
Solid understanding of:
Timing concepts (setup, hold, OCV, ECO, multi-mode, multi-corner)
Clock tree structure
, IO timing, integrated constraints
UPF/low-power flows
(nice to have)
Proficiency in scripting (
TCL, Perl, Python
)

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