4 - 12 years
0 Lacs
Posted:1 day ago|
Platform:
On-site
Full Time
Lead Design Verification Engineer Bangalore
We are looking for an experienced Lead Design Verification Engineer (412 yrs) to join our semiconductor team. Youll lead SoC/ASIC/IP verification using SystemVerilog, UVM, SVA, and drive test planning, coverage, regressions, and debug.
???? Must-have:
Strong expertise in protocols (PCIe, DDR, USB, AMBA, MIPI, CXL), EDA tools (VCS, Xcelium, Questa), scripting (Python/Perl/Tcl), and low-power/CDC/formal verification.
???? Bonus:
Experience with emulation/GLS, lint, DFT awareness, and leadership/mentoring.
???? Location: Bangalore, India
? Experience: 412 years
???? Apply now or share your profile at [HIDDEN TEXT]
Digicomm Semiconductor
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