Lead Design Verification Engineer

Company Description

Sasken Technologies Limited is a specialist in Product Engineering and Digital Transformation, offering concept-to-market, chip-to-cognition R&D services to global leaders in various industries including Semiconductor, Automotive, Industrials, Consumer Electronics, Enterprise Devices, SatCom, Telecom, and Transportation. With over 30 years of experience and multiple patents, Sasken has transformed businesses of over 100 Fortune 500 companies, powering over a billion devices through its services and IP.

Role Description

This is a full-time on-site role for a Lead Design Verification Engineer located in Ahmedabad.

Key responsibilities

• SoC/IP subsystem verification planning, test infrastructure development, functional verification.
• Test bench and test case generation using Verilog, SystemVerilog, UVM, C, Formal.
• Embedded C code or writing CPU-centric tests using C code
• Functional coverage definition, implementation, and analysis

Key Qualifications

• M.E./B.E. in Electronics Engineering or equivalent with 8+ Years of relevant experience
• Knowledge of verification planning, assertion based and formal verification techniques, metric driven verification with UVM and C testbenches.
• Experience with power-aware verification (UPF) and SoC level verification, both RTL and gate level.
• Programming background in low-level and script-based languages, e.g. C, C++, Python, Perl is a plus.
• Fluent English language skills (written and oral)

Advantageous knowledge

• Background in embedded SW development
• Experience with ARM processors and AMBA protocols
• Familiarity with Jenkins, Git, FPGA, Emulation, formal property checking