27 Mipi Jobs

The Verification role requires you to be proficient in Functional and Performance verification, utilizing effective methodologies at different levels such as Module, Subsystem, SoC, and System. It is essential to have the skills to translate requirements into a verifiable plan. You will collaborate with SoC and IP developers locally and globally to implement best practices and enhance productivity continuously. A meticulous approach towards achieving zero defects is crucial. Your responsibilities will include creating verification test benches, verification components, test cases for simulation, formal verification, and emulation. Additionally, you will be responsible for debugging failures and formulating simulation scenarios for various analyses. Your key tasks will involve team leadership, technical guidance, and Verification planning. You will be responsible for developing, fine-tuning, and implementing verification test benches. Furthermore, you will create verification test bench components like drivers, monitors, response checkers, and leverage advanced UVM VIPs. Your role will also entail generating direct and constrained-random stimuli using C and SystemVerilog, examining RTL code, functional coverage, and assertion results. You will be expected to work on functional coverage development and system Verilog assertions. Proficiency in formal verification techniques, robust debugging skills, failure re-creation, and root cause analysis are essential requirements. Strong debugging and logical reasoning skills are crucial for this position. To excel in this role, you must have a strong background in C and UVM/SystemVerilog-based Test environments. Understanding the design/architecture and the ability to debug RTL/Gate netlist are mandatory skills. Coverage-driven Verification expertise is required to fulfill the Functional and Performance requirements of the SoC and manage regression effectively. Knowledge of Microcontroller architecture, ARM Cores, Interconnect (NIC, FlexNoC), Cache Coherency, and Bus Protocols like AHB/AMBA, AXI, ACE is essential. Additional skills that would be advantageous for this role include experience with Memory controllers (Flash, SRAM, DDR3/4/LPDDR), Protocols such as PCIe, MIPI, GPU, Ethernet, and Serial/Quad flash. Familiarity with Formal verification methodologies and Apps, AVIP, PinMuxing Verification, Randomization, and Low Power intent verification using UPF is beneficial. Exposure to pre-silicon validation/emulation tools like Veloce, Zebu, FPGA Prototyping would be considered a plus.,

You will be joining Eximietas as a Senior Design Verification Engineer/Lead in Bengaluru with 5-15 years of experience. Your primary responsibility will be to lead the SoC Design Verification efforts for complex projects, ensuring the successful execution of verification plans. This includes developing and implementing comprehensive verification strategies for high-speed and low-speed peripherals such as I2C, SPI, UART, GPIO, QSPI, as well as high-speed protocols like PCIe, Ethernet, CXL, MIPI, DDR, HBM. You will be conducting Gate-level simulations and power-aware verification using tools like Xprop and UPF. Collaboration with cross-functional teams, including architects, designers, and pre/post-silicon verification teams, will be crucial to ensure alignment and seamless integration of verification efforts. Your role will involve analyzing and implementing System Verilog assertions and functional coverage to ensure thorough verification of design functionality. Mentorship and technical guidance to junior verification engineers will be part of your responsibilities to elevate team performance. Leading and managing a dynamic team of verification engineers, fostering a collaborative and innovative work environment will be essential. You will also ensure that all verification signoff criteria are met, with clear and comprehensive documentation. Your dedication, work ethic, and commitment to meeting project goals and deadlines will be vital. Upholding quality standards and implementing best test practices to contribute to continuous improvements in verification methodologies will also be expected. You will work with verification tools from Synopsys and Cadence, including VCS and Xsim, and integrate third-party VIPs (Verification IP) to enhance verification coverage. To qualify for this role, you should have 5+ years of hands-on experience in SoC Design Verification and expertise in verification of high-speed SoCs and various protocols. Proficiency in System Verilog for verification, gate-level simulations, and power-aware verification using Xprop and UPF are necessary. Strong hands-on experience with VCS and Xsim from Synopsys and Cadence, mentorship experience, and demonstrated ability to work with cross-functional teams are also required. A strong understanding of verification methodologies and the ability to contribute to their continuous improvement are essential.,

As a PCB Layout Designer/ CAD Design Engineer with 2+ years of experience in High Speed, Complex Board Layout, and PCB designing, your responsibilities will include having a good understanding of Datasheets, creating Libraries for Complex Logical and Footprints, adhering to IPC Standards for Footprint Creation and Layout processes, and managing the entire PCB Designing flow from Library creation to Gerber release to FAB. Additionally, you will be responsible for setting high-speed constraints and routing, working on High-Speed signal routing, and designing High-speed, Multilayer PCB designs. You should have hands-on experience in Designing High-speed, Multilayer PCB designs, performing DFM checks, and possessing expertise in standard High-Speed Digital, Analog & Mixed signal Design including I2C, SPI, USB2.0/3.0, Ethernet, PoE, BLE, Wi-fi, GSM, TFT LCD, DDR2/DDR3/DDR4, SD Card, NAND, MIPI, Optical interface, among others. Your role will also involve handling DRC and Post-processing tasks such as Gerber Settings, FAB & Assembly files generation, and conducting quality checks for Footprints, PCB Layout files, FAB & Assembly files. Moreover, you will be expected to interact with various teams including Design, Mechanical, SI, PI, Thermal, FAB, and Assembly house for Clarifications and Reviews, and should be capable of handling projects independently. Proficiency with EDA Tools such as Mentor Expedition, Valor, and Gerber tools for reviews will be required for this role. To qualify for this position, you should hold a BE/ B.Tech degree in EC or Electronics. If you are an innovative and technology-driven individual with a passion for designing cutting-edge telecom and security solutions, we encourage you to apply for this exciting opportunity. We look forward to connecting with you soon.,

As the Hardware Design Lead at Haystack Robotics, you will be responsible for leading all system hardware design activities for our Autonomous Mobile Robot products. You will work closely with the Software and Industrial Design teams to ensure the success of product development. Your role will involve planning hardware development for new products, executing projects on schedule, and maintaining high quality standards. You will be expected to solve technical issues with a disciplined approach, scope effort, create schedules, oversee test plan execution, and provide regular updates to management. In this position, you will be required to constantly pursue operational efficiency improvements and serve as a role model for disciplined bug/issue tracking and resolution. Additionally, you will lead the hiring process and build a capable team while mentoring junior engineers. To be successful in this role, you should have a minimum qualification of B.E/B-tech in Electronics or a related discipline, with an M.E./M.Tech. preferred. You should have 8 to 10 years of experience in hardware design and validation in robotics or embedded systems. Hands-on experience in all aspects of embedded system hardware development on multiple projects with increasing responsibility and scope is essential, along with exposure to Firmware/Software. Your experience should include embedded system design and integration, working with various components such as CPUs, memory interfaces, USB, MIPI, I2C, UART, SPI, Lidar, cameras, sensors, batteries, Bluetooth/WiFi, and more. You should also have knowledge of processors like i.MX8, nVidia Jetson, Qualcomm Snapdragon, and their subsystem design. Expertise in handling sensor-based design, power supply design, coordination with PCB Layout and Software team, and high-speed design capabilities is required. Experience with FCC/CE/UL certification processes is also necessary. As a Hardware Design Lead, you should be able to translate high-level product requirements into system hardware specifications, evaluate and select components, and utilize bug/issue tracking tools like Mantis and JIRA. Demonstrated leadership experience, effective project management skills, and the ability to mentor and lead teams are key aspects of this role. You should possess strong collaboration skills, the ability to influence others, and a track record of achieving results in a fast-paced, start-up environment.,

You are a highly experienced RTL Design Engineer with 12-20 years of experience, specializing in PCIe IP development. Based in Noida/Bangalore, you will be responsible for designing and supporting the RTL of Cadence's PCIe IP solution. Your role will involve working with existing RTL, adding new features, ensuring customer configurations are clean, supporting customers, and ensuring design compliance with LINT and CDC guidelines. To qualify for this position, you must hold a BE/BTech/ME/MTech degree in Electrical/Electronics/VLSI and have extensive experience as a design and verification engineer, with a focus on RTL design using Verilog. Additionally, you should have experience with System Verilog, UVM-based environments, AXI3/4/5, and preferably PCIe. Previous experience in RTL design of complex protocols and IP development teams is highly advantageous. As a member of the Cadence High-Speed SerDes PHY IP Front end Design team, you will be responsible for defining microarchitecture, leading ASIC design, collaborating with cross-functional teams, mentoring junior members, and fostering a high-performance team culture. Requirements for this role include a Bachelor's degree in Electronics Engineering with at least 7 years of experience, a Master's degree with 5 years, or a Ph.D. with 2 years in Digital Design. You should have hands-on experience in micro-architecting digital blocks, RTL implementation in Verilog/SV, SDC definition, STA, Lint Checks, CDC, and Synthesis. Knowledge of protocols such as Ethernet, USB, PCIe, MIPI(DPHY), and HDMI/Display is desired, along with the ability to work closely with Analog design teams and develop high-speed critical digital circuits and signal processing blocks.,

You should have a minimum of 3 years of experience in System Verilog HVL and at least 3 years of experience in OVM/UVM/VMM/Test Harness. It is important to have hands-on experience in developing assertion, checkers, coverage, and scenario creation. You must have successfully executed at least 2 SoC Verification projects and possess experience in developing test and coverage plans, Verification environment, and validation plans. Knowledge of at least one industry standard protocol such as Ethernet, PCIe, MIPI, USB, or similar is required. Participation in reviews and audits is also expected. For management responsibilities, you should have a minimum of 2 years of experience in leading a team of 5 to 10 engineers. Your role will involve defining/deriving scope, estimation, schedule, and deliverables of proposed work. It is crucial to ensure the compatibility of resources, tools, and platforms, as well as working closely with customers through the acceptance of deliverables. Effective management of team members through coaching, mentoring, guidance, and career planning is essential for this role.,

We are looking for a Senior Embedded Linux Engineer to join our dynamic engineering team in Bangalore/Bengaluru. You should have at least 3 years of experience in Embedded Linux driver and kernel development, with expertise in low-level driver development, hardware bring-up, and multimedia integration on ARM-based platforms. Your responsibilities will include developing and maintaining Linux kernel and device drivers, integrating multimedia IPs, system-level debugging, and collaborating with hardware and software teams for system bring-up and validation. Key Responsibilities: - Develop and maintain Linux kernel and device drivers, focusing on V4L2, DRM, I2C, IPC, and DMA. - Work on bare-metal drivers and applications for ARM-based systems. - Integrate and validate multimedia IPs such as MIPI CSI/DSI, HDMI, SDI, VCU, and ISP. - Perform system-level debugging, root cause analysis, and optimization. - Collaborate with cross-functional teams to ensure full system bring-up and performance validation. - Contribute to board support packages (BSP), bootloaders, and low-level firmware development when necessary. Required Skills and Experience: - 3+ years of experience in Embedded Linux driver/kernel development. - Strong C programming skills with hands-on experience in Linux kernel internals. - Proficiency in Linux device driver development and familiarity with subsystems like V4L2, DRM, and I2C. - Experience with multimedia IPs: MIPI, HDMI, SDI, VCU, ISP. - Solid understanding of the ARM architecture, memory-mapped IO, and interrupt handling. - System debugging experience using tools such as JTAG, serial consoles, and kernel logs. Preferred Qualifications: - Experience with SafeRTOS, FreeRTOS, or other embedded RTOS environments. - Background in product development or systems engineering involving hardware platforms and software/firmware stacks. - Excellent verbal and written communication skills for documentation and presentations. - Strong interpersonal and organizational skills. - Ability to work in a fast-paced, multidisciplinary technical environment. If you meet the requirements and are interested in this opportunity, please share your updated profile to vagdevi@semi-leaf.com. This is a full-time position with a Monday to Friday work schedule, based in person.,

As a Design Verification Engineer, you will be responsible for verifying complex designs such as accelerators, datapath IP, processor core subsystems, and complex interfaces/protocols using leading-edge methodologies like UVM and Formal DV. Your role will involve architecting the testbench, developing the verification environment, and defining test plans, tests, and verification methodology for block/sub-system level verification. You will collaborate with the design team to generate test plans, ensure code and functional coverage closure, integrate block testbenches at the sub-system level UVM environment, and verify integration. Additionally, you will interact with the analog co-simulation and firmware team to enable top-level chip verification aspects. Your responsibilities will also include packaging verification environments for Digital IP for seamless integration into the verification flow at different stages of execution. You will evaluate 3rd party IPs on key qualitative aspects and establish evaluation flows for home-grown and 3rd party IPs for consistent benchmarking of DV evaluation. To excel in this role, you should have a minimum B.E./B.Tech degree in Electrical/Electronics/Computer Science and 7-10+ years of experience in design verification with UVM and constrained random, coverage-based verification approaches. You must possess a strong understanding of DV concepts and the ability to develop scalable DV environment architecture for achieving first-pass DV success. Your adaptability to learn end application/systems and map them into smart verification test plans will be crucial. Excellent debugging and analytical skills, along with good interpersonal, teamwork, and communication skills, are essential for effectively driving discussions with geographically dispersed teams. Knowledge of assertion-based formal verification, standard on-chip interfaces, processor/SoC architecture, and/or DSP fundamentals will be advantageous. Experience with ASIC/SoC product DV and productization is highly desirable for this role.,

As an FPGA Design and Verification/Validation Engineer at Dexcel Electronics in Bengaluru or Hyderabad, you will be responsible for independently overseeing FPGA Design Blocks. You should have a minimum of 2 years of experience in RTL Design, 2 years in IP Verification, 4 years in IP Design/SOC Design, and 6 years in FPGA Design. Your primary task will involve working with various Interfaces such as PCIe 2.0, SATA, Fiber Channel, 1G/10G BASE, MII/RMII/GMII/RGMII/SGMII/XAUI, RXAUI, SDI- SD/HD/3G, Display Port, USB, JESD204B, SRIO, MIPI, DDR/LPDDR/DDR2/DDR3, and QDR memories. Additionally, hands-on experience in Design and Debugging is preferred. You should have prior experience working on projects based on FPGAs and SOC, with a solid understanding of SOC and Hi-Speed Interfaces domain knowledge. At Dexcel Electronics, we are seeking highly motivated individuals who are eager to learn and develop in a dynamic environment. If you are passionate about technology and seeking exciting career opportunities, we invite you to join our team. For more information on current job openings, please visit our website or email your updated resume to careers@dexceldesigns.com.,

As FPGA Architect, you will play a pivotal role in leading the design and development efforts across a range of projects in a dynamic and collaborative environment. Your primary responsibility will involve defining and creating complex FPGA designs for our Test products. Working closely with a diverse team including R&D Project Managers, Product Architects, Solution Teams, FPGA developers, Software Qualification, and Software Engineers, you will contribute to the innovation of new product offerings and enhancements to existing products. A vital aspect of this role will be your ability to work effectively with design teams based in the US and Europe, showcasing your strong teamwork skills and collaborative mindset. To excel in this role, you should possess the following qualifications: - A Bachelor's or Master's degree in Electrical/Electronic Engineering - Minimum of 10 years of experience in FPGA development with expertise in Altera and Xilinx technologies - Proficiency in RTL languages such as VHDL or Verilog - Familiarity with Xilinx FPGA Tools Design Flow including Vivado, Chipscope, and Quartus - Experience in using EDA Functional Simulation tools like Synopsys, Mentor, or Cadence - Proven ability to adapt quickly to new technologies, protocols, and product segments - Hands-on experience in developing self-checking Simulation environments, test benches, automation scripts, and test case creation - Collaborative work with system architects to define system architecture and FPGA integration with other components on PCA boards - Strong background in timing closure for intricate designs - Exceptional written communication skills for creating various technical documents such as Product Definitions, Detailed FPGA Designs, and Hardware & Software Interface documents - Self-motivated, well-organized, and proactive individual - Excellent team player with a high level of responsiveness and accountability - Strong verbal communication skills Preferred qualifications include: - Familiarity with Keysight instruments like Oscilloscope, Analyzer, AWG & BERT - Experience working with protocols such as PCI Express, USB, MIPI, Ethernet, and DDR - Exposure to international and multi-vendor collaboration environments - Full-time job type with flexible schedule This role offers the opportunity to work in person at the specified location, providing a conducive environment for professional growth and innovation.,

Qualcomm India Private Limited is seeking talented Software developers to join the team, lead, and contribute towards the development of software tools. In this role, you will collaborate with cross-functional teams to ensure that the tools meet the highest standards of quality and performance. Your responsibilities will include designing, developing, and maintaining software tools and frameworks that enable customers to efficiently integrate and test chipsets across various design stages, from early development to factory testing. This is an excellent opportunity to work with cutting-edge technology and collaborate with cross-functional teams to drive customer success. The minimum qualifications for this role include a Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field with 6+ years of Hardware Engineering or related work experience. Alternatively, a Master's degree with 5+ years of experience or a PhD with 4+ years of experience is also acceptable. As a System HW Applications Engineering Engineer, Sr Staff/Manager at Qualcomm, you will be responsible for supporting customers in designing solutions using Qualcomm hardware and software. You will contribute to the dynamic Applications engineering team for end product designs in Consumer, Industrial, and IoT applications. Your role will involve successfully integrating Qualcomm solutions into customer end products across various markets such as Mobile, Compute, 5G Broadband, Automotive, IoT, and consumer electronics. Key responsibilities include gathering, integrating, and interpreting information from cross-functional teams to troubleshoot issues and find solutions. You will apply your deep and broad knowledge to anticipate and identify gaps/risks in processes, technical aspects, and close these gaps by working with a wide range of eco-system partners within Qualcomm. Additionally, you will act as a tech lead on projects, collaborate with internal partners, define product requirements, support customers on HW design signoffs, system/SoC debug, and manage a cross-functional team of engineers. Preferred qualifications for this role include expertise in embedded systems HW/SW design, board bring up, Silicon bench tests, measurements of AC/DC parameters, SOC interface parametric measurements, and basic SW integrated functional tests. Proficiency in programming languages such as C, PERL, and PYTHON is preferred. Experience with High-Speed Digital interfaces, Power management areas, ARM processors, and JTAG emulators is highly desirable. Qualcomm is an equal opportunity employer committed to providing accessible processes for individuals with disabilities. If you require accommodations during the application/hiring process, you can reach out to disability-accommodations@qualcomm.com or call Qualcomm's toll-free number. Please note that Qualcomm expects its employees to abide by all applicable policies and procedures, including those related to the protection of confidential information. If you are an individual seeking a job at Qualcomm, please refrain from using the Careers Site for staffing and recruiting purposes. Qualcomm does not accept unsolicited resumes or applications from agencies. For more information about this role, please contact Qualcomm Careers.,

Key Responsibilities: Develop AMS verification environments from the ground up using SystemVerilog/UVM Own and execute test planning, AMS setup, and mixed-signal simulation Work on SerDes verification involving high-speed protocols (PCIe, USB 3.0, MIPI, etc.) Model and verify analog/mixed-signal blocks using wreal , RNM , and Verilog-A Perform simulations using VCS Primesim AMS and Primesim XA tools Collaborate closely with analog, digital, and system teams for integrated AMS verification

We are seeking experienced Senior/Lead ASIC Verification Engineers to join our Noida-VIP team. With 5 to 15 years of experience in Verification, particularly using industry-standard protocols and methodologies, this role offers a challenging opportunity for individuals well-versed in System Verilog, Verilog, and Object-Oriented Programming. As a successful candidate, you will have demonstrated your ability to lead the development of reusable Verification environments on at least 2 projects using VMM, OVM, or UVM methodologies. Your expertise should extend to protocols such as UCIe, PCIe, CXL, Unipro, USB, MIPI, HDMI, Ethernet, DDR, LPDDR, and HBM memory. Your responsibilities will include contributing to the development of the VIP, reviewing and signing off on VIP development and updates, and collaborating with Architects and methodology experts to address issues and drive architectural and methodological perspectives. If you are a proactive and reliable professional with a passion for Verification, we invite you to share your updated CV with us at taufiq@synopsys.com. Feel free to refer anyone who may be interested in this exciting opportunity as well. At Synopsys, we value Inclusion and Diversity, considering all applicants for employment without regard to race, color, religion, national origin, gender, gender identity, age, military veteran status, or disability. Join us in shaping the future of technology.,

The position of Technical Lead ASIC Design Verification requires the candidate to have direct experience in managing a 4-10 member engineering team and servicing clients in Project (ODC) based execution model as well as Staffing (Hyderabad Onsite requirements). The role involves Architecting Verification Environment for ASIC SoC and providing verification support from defining verification plan to various customer products. The incumbent will lead an IP Verification team and provide technical leadership to the Design Verification team. Effective team management, coaching, mentoring, and career planning are essential responsibilities. The incumbent must lead management and customer reviews for multiple projects and develop/modify scripts to automate the verification process. The candidate should have a minimum of 6 years of experience in System Verilog HVL and OVM/UVM/VMM/Test Harness. Hands-on experience in developing assertion, checkers, coverage, and scenario creation is required. Experience in executing at least 2 to 3 SoC Verification projects, developing test and coverage plans, verification environments, and validation plans is necessary. Knowledge of industry-standard protocols like Ethernet, PCIe, MIPI, USB, or similar is expected. The candidate should have at least 1 year of experience in handling a team of 5 to 10 engineers. Defining/deriving scope, estimation, schedule, and deliverables of proposed work, ensuring resource compatibility, and working with customers through acceptance of deliverables are also key responsibilities. This is a Work from Office job, and the incumbent should have the willingness and experience to lead and mentor junior engineers. The educational background required for this position is B.E./B.S./B.Tech/M.S./M.Tech in VLSI/Electronics/Electrical/Computer/Instrumentation Engineering. eInfochips, an Arrow company, is a leading global provider of product engineering and semiconductor design services with a proven track record of over 25 years. With a team of over 2500+ engineers, the company has been instrumental in developing over 500+ products and 40M deployments in 140 countries. eInfochips offers Silicon Engineering, Embedded Engineering, Hardware Engineering & Digital Engineering services and is recognized as a leading Semiconductor service provider by NASSCOM, Zinnov, and Gartner.,

You will be responsible for embedded hardware design with a focus on digital circuits. Your key responsibilities will include: - Developing new hardware solutions from initial requirements through prototypes to production-ready. - Designing embedded circuits, including component selection, Spice simulation, control loop design, power supplies, signal integrity check, interface designs, protocol analysis, mechanical interference, thermal analysis, high-reliability, long availability, BOM management, etc. - Coordinating with Layout engineers for proper layout design inclusive of power supplies routing, signal integrity, thermal dissipation, clear documentation, etc. - Maintaining existing designs and developing new variants of existing products to add new features, deal with component end-of-life, etc. - Improving the performance of existing designs and fixing hardware bugs identified in current revisions. - Working collaboratively with fellow Hardware team members, Product Management, Software Engineering, and Manufacturing to produce reliable, standards-compliant, world-class products. - Creating, improving, and automating Bench test setups, debugging, and characterization of embedded boards, power supply switching regulators, signal and power integrity measurements for board characterization. - Data collection, jitter measurements, analysis to enable simulation correlation, test design, and automation. To be successful in this role, you must have the following qualifications and skills: - Circuit design and analysis skills for digital and mixed-signal circuits. - Design and analysis of R/L/C filters, OpAmp circuits, and data-converter circuits. - Excellent knowledge of micro-controller families such as Cypress, TI, ARM architecture. - Excellent knowledge of building network adapters for various protocols i.e., USB, BLE, WiFi. - Excellent knowledge of SOCs. - Understanding of signal integrity, noise factors, filtering, decoupling, thermal, etc. - Excellent problem-solving and debugging skills. - Experience using schematic and circuit analysis tools like Eagle, Cadence, Orcad, etc. - Familiarity with Circuit layout tools like PCB Editor, Allegro, etc. - Experience in developing firmware for microcontroller or microprocessor-based boards. - Design of power supply converters of all topologies. - Experience with DFMA cycle. - Excellent understanding of requirements for electronics and electric tests such as ESD, EMC/EMI. - Successful experience in shipping over 1000 units of designs done. - Experience in performing CE/UL certifications for the board and products. - Knowledge of BGA components, passive and active components. - Good understanding of testing and debugging techniques. - Good understanding of revision control systems like SVN, GIT. - Experience with design from scratch with a product mindset and system-level understanding. - Experience in programming with medical sensors and/or biomedical device applications. - Working knowledge of ISO13485, ISO60601, ISO14971 guidelines. - Knowledge of MIPI, high-speed image signal processing. You will also enjoy the following perks and benefits: - Health insurance - Learning & development opportunities - Employee experience enhancements - 5-day work week pattern Role: Senior Associate Industry Type: Medtech Functional Area: Production, R&D Employment Type: Full Time, Permanent Education: UG: B.Tech/B.E. Electronics PG: MTech Embedded Systems,

Key Responsibilities Architect and implement System Verilog/UVM-based testbenches and verification environments for analogmixed signal blocks and SoCs. Develop VerilogA , RealNumber Models (RNM) , WREAL models, and support cosimulation with SPICE for behavioral accuracy. Execute verification of highspeed serial protocols including PCIe , USB 3 , MIPI CSI/DSI , using constrainedrandom stimulus, assertions, monitors, functional coverage. Utilize tools like PrimeSim XA (VCS AMS) to run mixed-signal regressions and VerilogA analog simulations. Collaborate closely with digital, analog, synthesis, timing, and silicon bring-up teams to ensure spec traceability, debug failures, and validate first-pass silicon performance. Write thorough verification plans , track coverage closure, debug RTL/AMS models, document results, and drive continuous improvement of methodologies. Qualifications & Skills Bachelors/Masters in Electronics/Telecommunication, Computers, Electrical . 5+ years of mixed-signal/AMS verification experience; SoC-level IP/subsystem/SoC verification preferred. Deep proficiency in System Verilog , UVM , assertions, functional coverage, OOP testbench design. Strong expertise in VerilogA , RNM/WREAL , and building analog behavioral models Simply. Hands-on experience with PrimeSim XA/VCS AMS , Cadence Spectre/Xcelium, Synopsys AMS toolchains.

Qualcomm India Private Limited is a leading technology innovator that strives to push the boundaries of what is possible, enabling next-generation experiences and driving digital transformation for a smarter, connected future. As a Qualcomm Hardware Engineer, your role will involve planning, designing, optimizing, verifying, and testing electronic systems, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment, packaging, test systems, FPGA, and/or DSP systems to launch cutting-edge products. Collaboration with cross-functional teams will be essential to develop solutions and meet performance requirements. To be eligible for this position, you should have a Bachelor's/Master's/PhD degree in Computer Science, Electrical/Electronics Engineering, Engineering, or a related field, along with relevant work experience ranging from 4 to 6+ years. Join Qualcomm's design verification team and be involved in verifying high-speed mixed-signal IP designs for products targeted for 5G, AI/ML, compute, IoT, and automotive applications. Responsibilities will include defining test plans, developing testbenches using advanced verification methodologies, authoring assertions, developing test cases, and collaborating with various teams to ensure successful verification and integration. Qualified candidates should possess a Master's/Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field, with at least 12+ years of ASIC design verification experience. Knowledge of HVL methodologies like SystemVerilog/UVM and experience with ASIC simulation/formal tools are required. Preferred qualifications include experience with low power design verification, formal verification, gate-level simulation, knowledge of standard protocols, scripting languages like Python or Perl, and experience with mixed-signal IP design verification. Qualcomm is an equal opportunity employer that is committed to providing accessible processes for individuals with disabilities. If you require accommodations during the application/hiring process, please contact disability-accommodations@qualcomm.com. Additionally, Qualcomm expects its employees to adhere to all applicable policies and procedures, including those related to the protection of confidential information. For more information about this role, please contact Qualcomm Careers.,

SoC Verification Engineer SoC Verification Engineer >> SoC Verification Engineer Post SoC Verification Engineer Required Experience 1 to 3 years Location: Bangalore,Delhi NCR,Hyderabad Openings 8-10 Education BE/B.Tech./MS/M.Tech.(Electronics or Electronics & Communication) Must haves: Worked on IP level verification environment 1 to 3 years of experience Good experience with Verilog, System Verilog and UVM Experience with verification for protocols like AXI or AHB Experience with any of the following protocols: DDR, PCIe, Ethernet, MIPI, USB Excellent Team Player Good To Have Experience of SOC Verification Experience of Formal verification Experience on verification of automotive protocols Email your resume to careers@truechip.net and mention position/location in the subject,

• Design Methodology, Micro-architecture, RTL. • Work with the architecture team to develop the uArch & Subsequently write RTL. • Develop Design Methodology, starting with the machine learning architecture. • Synthesis, STA, Equivalence checking. Required Candidate profile * EXP in SOC design methodology, Micro-architecture, Emulation & back-end DEV., & Chip Bring-up. * EXP in Developing ARM CPU based SoCs, Network-on-Chip & interfaces such as MIPI-CSI, Ethernet & PCIe

Min 10 yrs of R&D experience in FPGA development (Altera, Xilinx) Experience of RTL languages - VHDL or Verilog Xilinx FPGA Tools Design Flow - Vivado, Chipscope, Quartus. EDA Functional Simulation tools – Synopsys or Mentor or Cadence.

Key responsibilities: Experienced in all the phases of Hardware Development Life Cycle including requirements analysis, component selection, design, development, testing, and documentation. Vendor coordination for component selection, PCB Fab, and Assembly house. Involved in supporting proto build, pilot build, and mass production. Co-ordinating with Software/firmware team for the board bring-up and successful system integration. Should be capable of preparing the proposal based on customer requirements Should be capable of executing the project from requirement gathering to final product/service deliverables Should be capable of managing 3 to 4 sub-ordinates Responsible for team collaboration, reduce attrition and skills development Should be capable of interacting with other teams and get the work on time Technical Skills: Mandatory requirement on having experience in Microprocessor/Microcontroller based embedded hardware (digital) board design. On-Board Power distribution/management design with DC-DC Switching regulators & LDO. Knowledge in Analog and mixed-signal board design. Development of product in coordinating with PCB and mechanical CAD and review/guidance to Layout Designers for Component logical/mechanical placement, Power Plane creation, and PCB Designing. Mandatory Tools Skills: Cadence OrCAD for schematics, Allegro/Altium experience for PCB board Design review Knowledge of interfaces like MIPI CSI, SD Interface, Ethernet, RGMII, USB, LVDS, GMSL, SPI, UART, I2C etc.., Physical layer level understanding and debugging skill. Preferred skills(Added advantage): Knowledge in PCB layer stack-up, signal integrity, thermal simulation, environmental tests, FCC and EMI/EMC compliance testing

Roles and Responsibilities Design verification using System Verilog, UVM, and SV/UVM methodologies. Experience with PrimeSim XA, WREAL, RNM, Verilog-A, and MIPI protocols. Proficiency in PCIe and USB 3 interfaces. Strong understanding of digital logic design principles and SoC architecture. Excellent problem-solving skills with attention to detail.

Greetings from Wafer Space! Exciting Opportunity for Senior RTL Design Lead Engineers Automotive SoC Domain Job Title: Senior RTL Design Engineer No. of Positions: 4 Notice Period: Immediate to 30 Days Only Referrals: Please refer only suitable and relevant profiles About the Role: We are looking for experienced RTL Design Engineers to join our team developing next-generation solutions for automotive camera and display systems. This is a key position requiring strong technical expertise in microarchitecture and RTL coding, with an emphasis on high-performance, low-power ASIC designs. Key Responsibilities: Define microarchitecture and implement RTL to meet performance, power, and area (PPA) goals. Collaborate with software teams to define hardware/software interfaces, configuration requirements, and verification collaterals. Partner with verification teams on assertion development, test plans, debugging, and coverage closure. Ensure adherence to industry-standard ASIC design methodologies. Drive design quality and functional safety for automotive-grade solutions. Required Skills & Qualifications: Bachelors/Masters/Ph.D. in Electrical/Electronics Engineering. 5–10 years of hands-on experience in RTL design and microarchitecture development. Strong proficiency in Verilog and SystemVerilog. Proven experience in designing IP blocks for video/audio pipelines. Sound understanding of MIPI CSI and DSI protocols. Experience with high-speed, pipelined, and low-power designs. Familiarity with EDA tools and design methodologies (e.g., Synopsys, Cadence). Experience working on designs complying with automotive functional safety (ISO 26262) is a plus. Excellent problem-solving, communication, and team collaboration skills. Note: Only candidates with a notice period of 30 days or less will be considered. Please share or refer profiles that are strictly relevant to the requirements.

Expertise in UVM and System Verilog Experience in verification IP modelling with knowledge of test case coding, scoreboard design, assertions, checkers & functional coverage. Involved & played a driving role in the development of reusable Verification environments for at least 2 verification projects using VMM/OVM/UVM methodologies. Protocol experience: Should have experience on UCIe / PCIe / CXL / Unipro / USB / MIPI / HDMI / Ethernet / DDR / LPDDR / HBM memory protocol Job responsibilities: Able to contribute to the development of the VIP Responsible & can be relied on for review sign-off of VIP development and updates from a technical perspective including methodology and protocol functional prospective. Liaison with Architects/methodology experts to achieve resolutions on issues or driving output from an architecture/methodology perspective. Locally should be to be go-to person on all technical aspects of VIP At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.Apply Now Save Relevant Jobs Senior Staff Product Engineer, R&D-7683Aschheim, GermanyEngineering Principal Analog Design EngineerMississauga, CanadaEngineering Verdi InternshipHsinchu, TaiwanInterns/Temp

Expertise in UVM and System Verilog Experience in verification IP modelling with knowledge of test case coding, scoreboard design, assertions, checkers & functional coverage. Involved & played a driving role in the development of reusable Verification environments for at least 2 verification projects using VMM/OVM/UVM methodologies. Protocol experience: Should have experience on UCIe / PCIe / CXL / Unipro / USB / MIPI / HDMI / Ethernet / DDR / LPDDR / HBM memory protocol Job responsibilities: Able to contribute to the development of the VIP Responsible & can be relied on for review sign-off of VIP development and updates from a technical perspective including methodology and protocol functional prospective. Liaison with Architects/methodology experts to achieve resolutions on issues or driving output from an architecture/methodology perspective. Locally should be to be go-to person on all technical aspects of VIP At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.Apply Now Save Relevant Jobs Senior Staff Product Engineer, R&D-7683Aschheim, GermanyEngineering Principal Analog Design EngineerMississauga, CanadaEngineering Verdi InternshipHsinchu, TaiwanInterns/Temp