High Performance DSP core Implementation Engineer, Staff

General Summary:

As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements.

Minimum Qualifications:

Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. ORMaster's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. ORPhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience.

Job Role

Work with multiple SOC Design teams to rollout robust Logic Synthesis, UPF synthesis, QoR optimization and netlist Signoff flows
Provide implementation flows support and issue debugging servicesto SOC design teams across various siteDevelop and maintain 3rd party tool integration and productenhancement routines

Should lead implementation flow development effort independently by working closely with design team and EDA vendors

Should drive new tool evaluation, methodology refinement for PPA optimization

Skill Set

Proficiency in Python/Tcl

Familiar with Synthesis tools (Fusion Compiler/Genus),

Fair knowledge in LEC, LP signoff tools

Proficient in VLSI front end design steps- Verilog/VHDL, Synthesis, QoR optimization & Equivalence Checking

Familiarity with standard software engineering practices like Version Control, Configuration Management, Regression is a plus

Should be sincere, dedicated and willing to take up new challenges

Experience

8+ years of experience in RTL,UPF & Physical aware Synthesis for cutting edge technology nodes, logic equivalence checking, Scripting and Netlist Timing Signoff.