Hardware Engineer - FPGA/Design Verification,UVM,UMM

Cisco

7 - 12 years

13 - 17 Lacs

bengaluru

Posted:4 hours ago| Platform:

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Skills Required

design verification oops system verilog uvm verilog c++ simulation networking axi fpga vmm debugging assertions i2c fpgas asic code coverage version control hardware engineering rtl asic design ethernet microcontroller hardware design pcie

Work Mode

Work from Office

Job Type

Full Time

Job Description

Your Impact

Lead and mentor a team of verification engineers, driving the development of robust test benches, coverage plans, and constrained random tests.
Ensure high-quality and reliable FPGA/ASIC designs through sophisticated verification techniques and comprehensive debugging.
Contribute to the adoption and evolution of ground breaking verification methodologies like UVM/VMM, improving team efficiency and performance.
Partner with architects, logic designers, and software engineers to align on architecture, micro-architecture, and system-level requirements.
Play a pivotal role in delivering next-generation, high-performance FPGA and ASIC products for Ciscos networking solutions.
Ensure product reliability and performance, strengthening Ciscos reputation and customer trust in its hardware solutions.

Minimum Qualifications

Bachelor's Degree / Master's Degree in Electrical or Computer Engineering with 7+ years of experience in design verification.
Proficiency in OOPs, Verilog & System Verilog.
Confirmed verification skills : FPGA, planning, problem solving, debug, adversarial testing and random testing
Project based work experience with UVM/VMM methodologies.
You will have experience with architecting the testplan & test bench.

Preferred Qualifications

Hands on experience with Ethernet based protocols, PCIe, AXI, memory controllers, OTN etc. will be an added advantage.
Familiarity with VCS simulation flow, knowledge of coverage & assertions is desirable.

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