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Tessolve
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Design Engineer 1

Design Engineer 1

Tessolve

3 years

0 Lacs

bengaluru karnataka india

Posted:1 day ago| Platform:

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Skills Required

design combination test engineering learning layout signal circuit verification drc lvs support integration power reliability schedule cadence data communication scripting python

Work Mode

On-site

Job Type

Full Time

Job Description

About Tessolve

Tessolve offers a unique combination of

design, test, and product engineering

services, enabling our customers to bring products from concept to high-volume production. With a strong presence in semiconductor engineering, we provide a robust environment for growth, learning, and career development.We are looking for a skilled and motivated

Analog Layout Engineer

with 1–3 years of experience in deep sub-micron analog/mixed-signal layout design. The ideal candidate will be responsible for implementing transistor-level layout of analog and mixed-signal blocks while ensuring best practices in layout techniques for matching, parasitic reduction, and reliability.

Job Title:

Analog Layout Engineer

Experience:

1 to 3 Years

Location:

Bangalore

Key Responsibilities

Ownership of full-custom analog layout blocks from schematics to verified layout.
Work closely with circuit design engineers to understand requirements and deliver robust layouts.
Perform layout verification using DRC, LVS, ERC, and PEX tools.
Support block-level and top-level integration.
Optimize layout for performance, area, power, and reliability across different PDKs (90nm, 65nm, 28nm, etc.).
Deliver high-quality GDSII on schedule.

Required Skills & Experience

1 to 3 years of hands-on experience in analog layout design.
Strong understanding of analog design fundamentals and layout techniques (matching, shielding, symmetry, etc.).
Experience in Cadence Virtuoso layout tools and verification tools like Calibre or Assura.
Good knowledge of CMOS process and parasitic effects.
Exposure to layout of blocks such as op-amps, bandgap references, data converters, PLLs, LDOs, etc., is a plus.
Strong communication skills and ability to work collaboratively in a team environment.

Preferred Qualifications

Bachelor’s/Master’s degree in Electronics, ECE, VLSI, or related discipline.
Understanding of ESD/Latch-up rules and reliability best practices.
Experience in scripting (SKILL, Python) is a plus.

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Design Engineer 1