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ACL Digital
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Application Specific Integrated Circuit Design Engineer

Application Specific Integrated Circuit Design Engineer

ACL Digital

10 years

0 Lacs

hyderabad telangana india

Posted:2 weeks ago| Platform:

Apply

Skills Required

circuit design coding verilog checks timing verification architecture support technology flow synthesis power debugging engineering ai stack data

Work Mode

On-site

Job Type

Full Time

Job Description

ASIC Design Engineer

Location:

Experience:

Key Responsibilities:

Develop and implement RTL design for complex
ASIC SoCs/IPs
.
Work on
micro-architecture
design, coding (
Verilog/SystemVerilog
), and RTL
integration
.
Perform design
synthesis
,
lint
,
CDC/RDC
checks, and timing closure.
Collaborate with verification, physical design, and architecture teams to ensure first-pass silicon success.
Debug
design issues at
block
and SoC level, support verification and post-silicon validation.
Contribute to
low-power
,
high-performance
design techniques for advanced technology nodes.

Required Skills:

Strong expertise in RTL design using Verilog/SystemVerilog.
Hands-on experience with ASIC flow: synthesis,
STA
,
constraints
,
ECO
.
Knowledge of standard protocols (
AXI, AHB, PCIe, DDR, Ethernet
, etc.).
Familiarity with power intent (
UPF/CPF
) and
clock
/
power
domain crossings.
Experience in working with
EDA
tools (
Synopsys
/
Cadence
/
Mentor
).
Good problem-solving and debugging skills.

About Company

ACL Digital, a leader in digital engineering and transformation, is part of the ALTEN Group. At ACL Digital, we empower organizations to thrive in an AI-first world. Our expertise spans the entire technology stack, seamlessly integrating AI and data-driven solutions from Chip to cloud. By choosing ACL Digital, you gain a strategic advantage in navigating the complexities of digital transformation. Let us be your trusted partner in shaping the future.

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Application Specific Integrated Circuit Design Engineer

Experience & Salary

Skills Required

Work Mode

Job Type

Job Description

ASIC Design Engineer

Location:

Experience:

Key Responsibilities:

ASIC SoCs/IPs

micro-architecture

Verilog/SystemVerilog

integration

synthesis

lint

CDC/RDC

Debug

block

low-power

high-performance

Required Skills:

STA

constraints

ECO

AXI, AHB, PCIe, DDR, Ethernet

UPF/CPF

clock

power

EDA

Synopsys

Cadence

Mentor

About Company

More Jobs at ACL Digital