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Job Description

Job description


Minimum 5 years of relevant experience in verification, preferably at the SoC level

Must have completed at least one SoC-level verification project

Strong understanding of ARM M-series core operations

Proficient in writing C code for ARM processors

Expert in UVM testbench development and test case creation

Experience with Cadence and Synopsys VIPs

Skilled in debugging using disassembly and Tarmac for ARM cores

Solid understanding of AHB and APB interface protocols

Expert-level knowledge in DMA, interrupt handling, cache, and interconnect

Strong SoC-level debugging skills using Tarmac and waveform analysis

Hands-on experience with Cadence simulators and SimVision

Familiarity with peripheral protocols like SPI, I2C, I3C, and UART (preferred)

Willingness to work onsite from the NXP Bangalore office is mandatory

Ability to work independently and take ownership of assigned tasks as an individual contributor.

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