110 Soc Integration Jobs

Role: Lead /Senior RTL Engineer Experience: 8 to 12 Years Location: Hyderabad Job Description: Should be good in Integration of SOC & RTL coding. Should be aware of soC flow like Spyglass-Lint/Synthesis (DC)/CDC. Should be aware of scripting language. Candidate should have experience on SOC Integration, SpyGlass Lint, CDC, DC-Synthesis & VCLSP. Should have good understanding of SoC flows. Primary Skills: VHDL, Verilog, Micro-architecture, RTL coding, CDC, Lint, Synthesis, STA, IP development, SoC integration, VCLP, scripting - Perl, Python, Shell, and Tcl. Secondary Skills: Synopsis/Cadence tool flow, ARM Coretex, DMA, DDR, SPI, I2C, UART, AHB/AXI/APB, Ethernet, USB, PCIe, Mipi CSI/DSI, LPDD...

We're hiring an ASIC Design Engineer who can take full ownership of complex SoC and subsystem RTL from concept to silicon. You'll define micro-architecture, craft clean Verilog RTL, drive synthesis, timing closure, and work hand-in-hand with integration and backend teams to land a production-ready design. Expect deep involvement across reviews, debug cycles, emulation, and bring-up. You should bring 815 years of solid ASIC RTL experience, strong micro-architecture thinking, and hands-on skills across synthesis, timing, and SoC integration. Expertise with high-speed protocols (PCIe, DDR/LPDDR, USB, Ethernet, SPI/I3C/I2C, etc.), RTL assertions/coverage, and cross-team collaboration is key. Com...

Greetings from for the Day We have challenging roles at WIPRO, Please find the below active requirement. Please share your updated resume if your interested to apply for the current roles. ASIC RTL Lead / Architect (RTL Design, RTL Coding & Integration, IP, targeted for SOC, Static checks, Protocols - PCIe, DDR, Ethernet,I2C, UART, SPI) Experience : 9 Years 22 Years Work Location : Bangalore / Hyderabad / Kochi / Pune Work Mode : Hybrid (3 days Work From Office) Employment Type : Full Time with Wipro Expertise in SoC subsystem/IP design Expertise in IP design, Subsystem/Cluster and SoC level integration using Verilog/System Verilog In depth knowledge on RTL quality checks (Lint, CDC) Knowled...

As a Memory Layout Lead at Best-in-Class Semiconductor Memory IPs, you will be responsible for driving the physical design and delivery of high-performance, low-power, and high-density semiconductor memory IPs including SRAM, ROM, register files, CAMs, and more. Your main focus will be on owning the complete layout strategy, from bitcell integration to periphery circuits, ensuring best-in-class PPA (performance, power, area), and yield while adhering to strict foundry rules. Key Responsibilities: - Lead end-to-end layout design and floorplanning for advanced-node memory IPs. - Deliver DRC/LVS/DFM-clean GDS with robust EM/IR reliability sign-off. - Collaborate with circuit, CAD, and SoC integ...

As a Director of Physical Design at Tecquire Solutions Private Limited, you will play a crucial role in leading and growing the physical design team to implement complex SoC and ASIC designs effectively. Your responsibilities will include: - Leading and managing the entire Physical Design team across multiple projects and geographies. - Driving end-to-end physical implementation including RTL handoff, floorplanning, place & route, clock tree synthesis, static timing analysis, physical verification (DRC/LVS), and tape-out. - Owning project planning, resource allocation, schedule management, and risk mitigation across multiple physical design programs. - Collaborating with cross-functional tea...

Company Qualcomm India Private Limited Job Area Engineering Group, Engineering Group > Hardware Engineering General Summary As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to ...

As an Advanced FuSa Engineer at our company, you will be responsible for architecting and developing low-level software components for automotive SoCs. Your key responsibilities will include: - Implementing OS-level primitives such as threads, semaphores, mutexes, and socket programming. - Designing and optimizing IPC mechanisms like named pipes and shared memory. - Developing and maintaining device drivers for camera, vision pipeline, and embedded file operations. - Working on Linux, QNX, VxWorks system programming for real-time and safety-critical applications. - Utilizing frameworks like GStreamer, OpenVX, and OpenCL for vision and multimedia pipelines. - Implementing thread synchronizati...

Design, develop, and improve software using various engineering methodologies. Ensure code is scalable, maintainable, and optimized for performance. Collaborate with product managers, designers, and other engineers to define software requirements. Participate in code reviews and promote a culture of code quality and knowledge sharing. Stay informed of industry technology trends and contribute to the organization's technology communities. Adhere to secure coding practices to mitigate vulnerabilities and protect sensitive data. Job Requirements Mandatory skills include Go Lang expertise, AWS Connect and lambda, and strong work experience in Dynamo DB. Java is an essential skillset for this rol...

Role & responsibilities Perform integration of SoC and RTL coding for complex designs. Work on SoC flows including SpyGlass-Lint, Synthesis (DC), and CDC checks. Develop and maintain scripts for automation using Perl, Python, Shell, or Tcl. Execute SoC integration tasks, SpyGlass Lint, CDC, DC-Synthesis, and VCLP. Collaborate with cross-functional teams to ensure design quality and compliance. Optimize RTL design for performance, power, and area. Preferred candidate profile VHDL, Verilog, Micro-architecture, RTL coding. CDC, Lint, Synthesis, STA, IP development, SoC integration, VCLP. Scripting languages: Perl, Python, Shell, Tcl.

Experience: 4+ years of experience in RTL design, SoC integration, and IP development with strong knowledge of design flows and verification methodologies. Responsibilities: Perform integration of SoC and RTL coding for complex designs. Work on SoC flows includingSpyGlass-Lint, Synthesis (DC), and CDC checks. Develop andmaintainscripts for automation using Perl, Python, Shell, orTcl. Execute SoC integration tasks,SpyGlassLint, CDC, DC-Synthesis, and VCLP. Collaborate with cross-functional teams to ensure design quality and compliance. OptimizeRTL design for performance, power, and area. Primary Skills: VHDL, Verilog, Micro-architecture, RTL coding. CDC, Lint, Synthesis, STA, IP development, ...

RTL Design Location: Bangalore Experience- 4+ years Must have Hands-on experience and expert-level knowledge in RTL design and coding in Verilog and VHDL Hands-on experience and expert-level knowledge in SoC integration of ARM core-based designs Experience in working with AMBA Bus- AXI, AHB, APB. Experience in IP development: Standard Ips like PCIe Gen5 or Gen6, USB4.x, Ethernet, UCIe, HBM Hands-on experience and expert-level knowledge in ASIC Synthesis Hands-on Experience with Lint and CDC. Experience in equivalency checking Experience with FPGA based designs or FPGA prototyping In-depth understanding of Verilog/VHDL and ARM SoC architecture Hands-on experience and expert-level knowledge in...

Role: RTL Engineer. Experience: 4 to 12 Years Location: Bangalore Job Description: Should be good in Integration of SOC & RTL coding. Should be aware of soC flow like Spyglass-Lint/Synthesis (DC)/CDC. Should be aware of scripting language. Candidate should have experience on SOC Integration, SpyGlass Lint, CDC, DC-Synthesis & VCLSP. Should have good understanding of SoC flows. Primary Skills: VHDL, Verilog, Micro-architecture, RTL coding, CDC, Lint, Synthesis, STA, IP development, SoC integration, VCLP, scripting - Perl, Python, Shell, and Tcl. Secondary Skills: Synopsis/Cadence tool flow, ARM Coretex, DMA, DDR, SPI, I2C, UART, AHB/AXI/APB, Ethernet, USB, PCIe, Mipi CSI/DSI, LPDDR.

RTL Design Engineer(CXL) Experience - 5+yrs Location- Bangalore JD Strong RTL designer with IP design experience SoC Integration Interconnect Generation for a given configuration CXL 3.1 and above design experience

As a SoC RTL Design Engineer at Lattice Semiconductor, you will be part of the HW design team working on IP design and full chip integration in Pune, India. Your primary focus will be on RTL design, full chip integration, and projects within similar time zones, allowing you to work on cutting-edge technologies. **Key Responsibilities:** - Work on RTL design using best-in-class coding styles, algorithms, and Verilog/System Verilog. - Participate in SoC integration and quality checks like lint, CDC, RDC, SDC, etc. - Collaborate with architects and micro-architects to define design specifications and accelerate design time. - Drive logic design of key blocks and full chips to enhance quality. *...

As a Product Owner specializing in Firewall & SASE solutions, you will play a crucial role in a fast-growing product-based organization located in Baner, Pune. Your primary responsibilities will revolve around leveraging your expertise in both on-premises firewall platforms and cloud-based SASE solutions to drive innovation and efficiency. Key Responsibilities: - Utilize your 8+ years of experience with Fortigate firewalls, including FortiManager, FortiAnalyzer, and FortiGate appliances, to architect and implement robust security solutions. - Leverage your 5+ years of experience with Netskope SASE platform components such as Secure Web Gateway, CASB, Cloud Firewall, and ZTNA to enhance netwo...

As a Qualcomm Hardware Engineer, you will be involved in planning, designing, optimizing, verifying, and testing electronic systems. These systems encompass a wide range of components such as yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems. Your work will contribute to the development of cutting-edge, world-class products that drive digital transformation and enable next-generation experiences. - Front-end implementation of SERDES high-speed Interface PHY designs - RTL development and validation - Collaboration with the functional verification team - Development of timing constraints - UPF writing - DFT i...

Role Overview: As a Senior Post-Silicon Validation (PSV) Engineer / Lead, you will be responsible for the post-silicon bench validation of Analog Mixed Signal (CCC) IPs / SoCs. This involves executing validation across Process, Voltage, and Temperature (PVT) corners and performing system-level validation using lab instruments like oscilloscopes and logic analyzers. Your role will include validating PCIE interface functionality and performance, along with debugging and resolving silicon-level issues through collaboration with cross-functional teams such as design, verification, and test. Key Responsibilities: - Execute post-silicon bench validation of Analog Mixed Signal (CCC) IPs / SoCs - Pe...

Your Role As a SoC Integration Engineer , you will play a key role in the design and integration of System-on-Chip (SoC) components, contributing to the development of high-performance semiconductor solutions. Youll work on RTL coding, verification flows, and integration of IP blocks, ensuring robust and efficient designs that meet industry standards. In this role, you will: Integrate SoC components and contribute to RTL coding and micro-architecture design. Work with tools and flows such as Spyglass-Lint, CDC, DC-Synthesis, and VCLSP. Develop and maintain scripts using Perl, Python, Shell, and Tcl to automate design tasks. Collaborate with cross-functional teams to ensure seamless SoC integ...

As a Product Owner Firewall & SASE at the fast-growing product-based organization in Pune, your role will involve: - Having a strong background in both on-premises firewall platforms and cloud-based SASE solutions. - Demonstrating 8+ years of experience with Fortigate firewalls, including FortiManager, FortiAnalyzer, and FortiGate appliances. - Possessing 5+ years of experience with Netskope SASE platform, covering Secure Web Gateway, CASB, Cloud Firewall, and ZTNA. - Showing strong knowledge of network protocols, VPN, Zero Trust, and secure web access. - Utilizing hands-on experience with automation and APIs for firewall/SASE integration using tools such as Python, Terraform, Ansible, and R...

Experience : 3.00 + years Salary : INR 2680000-3750000 / year (based on experience) Expected Notice Period : 30 Days Shift : (GMT+05:30) Asia/Kolkata (IST) Opportunity Type : Remote Placement Type : Full Time Permanent position(Payroll and Compliance to be managed by: Architect Labs) (*Note: This is a requirement for one of Uplers client - Architect Labs) What do you need for this opportunity Must have skills required: emulation, Flexibility, tapeout, Data Analysis, Verilog/System-Verilog, RTL, synthesis, Unit Level testing, Python, typescripts, SoC integration Architect Labs is Looking for: As a RTL/Design Engineer at Architect Labs , you'll redefine the hardware design and verification pro...

Experience : 3.00 + years Salary : INR 2680000-3750000 / year (based on experience) Expected Notice Period : 30 Days Shift : (GMT+05:30) Asia/Kolkata (IST) Opportunity Type : Remote Placement Type : Full Time Permanent position(Payroll and Compliance to be managed by: Architect Labs) (*Note: This is a requirement for one of Uplers client - Architect Labs) What do you need for this opportunity Must have skills required: emulation, Flexibility, tapeout, Data Analysis, Verilog/System-Verilog, RTL, synthesis, Unit Level testing, Python, typescripts, SoC integration Architect Labs is Looking for: As a RTL/Design Engineer at Architect Labs , you'll redefine the hardware design and verification pro...

Experience : 3.00 + years Salary : INR 2680000-3750000 / year (based on experience) Expected Notice Period : 30 Days Shift : (GMT+05:30) Asia/Kolkata (IST) Opportunity Type : Remote Placement Type : Full Time Permanent position(Payroll and Compliance to be managed by: Architect Labs) (*Note: This is a requirement for one of Uplers client - Architect Labs) What do you need for this opportunity Must have skills required: emulation, Flexibility, tapeout, Data Analysis, Verilog/System-Verilog, RTL, synthesis, Unit Level testing, Python, typescripts, SoC integration Architect Labs is Looking for: As a RTL/Design Engineer at Architect Labs , you'll redefine the hardware design and verification pro...

Experience : 3.00 + years Salary : INR 2680000-3750000 / year (based on experience) Expected Notice Period : 15 Days Shift : (GMT+05:30) Asia/Kolkata (IST) Opportunity Type : Remote Placement Type : Full Time Permanent position(Payroll and Compliance to be managed by: Architect Labs) (*Note: This is a requirement for one of Uplers client - Architect Labs) What do you need for this opportunity Must have skills required: emulation, Flexibility, tapeout, Data Analysis, Verilog/System-Verilog, RTL, synthesis, Unit Level testing, Python, typescripts, SoC integration Architect Labs is Looking for: We are an AI research and product lab for chip design. Our goal is to redefine the hardware design an...

Key Responsibilities: Develop and maintain CPU infrastructure, including simulation environments, test frameworks, and verification flows. Collaborate with CPU microarchitecture, RTL, and verification teams to ensure functional correctness and performance targets. Implement and optimize CPU test suites, benchmarks, and low-level software for hardware validation. Work on performance analysis, profiling, and optimization of CPU cores and subsystems. Integrate CPU subsystems with SoC infrastructure, including memory, interconnects, and peripherals. Automate testing and validation workflows using scripting/programming languages (Python, Perl, Shell). Support silicon bring-up, debugging, and post...

As an experienced NoC Design Engineer specializing in RTL Design, you will be responsible for the following key tasks: - Utilize your expert knowledge in NoC microarchitecture to integrate configurations within multi-clock and multi-power domain-based SoCs. - Demonstrate extensive working knowledge of AXI, AHB, and APB bus protocols. - Perform RTL quality checks using tools like Lint, CDC, etc. - Display proficiency in System Verilog and VHDL, with a strong background in SoC/ASIC design flow. - Apply RTL synthesis knowledge and efficiently use Synopsys/Cadence tools. - Utilize industry-standard tools such as Modelsim, VCS for functional simulations. - Collaborate with verification teams to d...