Principal Design Engineer

Role Overview: At Lattice Semiconductor, we are a worldwide community of engineers, designers, and manufacturing operations specialists dedicated to developing programmable logic solutions that are revolutionizing the industry. We focus on R&D, product innovation, and customer service with a total commitment to excellence and a competitive spirit. If you thrive in a fast-paced, results-oriented environment and want to contribute to a dynamic team, Lattice may be the perfect fit for you. Key Responsibilities: - Lead the design and development of complex components of FPGA, ensuring they meet performance, power, and area targets. - Drive subsystem development and ensure designs meet high standards of quality and reliability through regular reviews and audits. - Work closely with the architecture team to define micro-architecture and design specifications. - Provide guidance and support to other engineers as a technical expert in SoC design. - Drive logic design of key FPGA systems and full chips, bringing best-in-class methodologies to accelerate design time and improve quality. - Work with cross-functional teams to drive program success and develop strong relationships with worldwide teams. - Stay up-to-date with the latest industry trends and technologies and drive continuous improvement initiatives. - Occasionally travel as needed. Qualifications Required: - BS/MS/PhD in Electronics Engineering, Electrical Engineering, Computer Science, or equivalent. - 15+ years of experience in driving logic design across multiple silicon projects. - Expertise in SoC integration, defining micro-architecture, and experience in selecting 3rd party IP. - Proficiency in working with ARM processors, AXI, AMBA bus, ENET, PCIE, USB, safety and/or security protocols, and debug architecture. - Experience in leading projects throughout the design cycle and working with cross-functional teams. - Familiarity with FPGA designs, use-cases, and design considerations is a plus. - Proven ability to collaborate with multiple groups across different sites and time zones. (Note: The additional details about the company were omitted from the final JD as they were not directly related to the job role.),