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Principal Design Engineer

Principal Design Engineer

Cadence

0 years

0 Lacs

pune maharashtra india

Posted:3 days ago| Platform:

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Skills Required

design cadence ip development layout documentation spec communication

Work Mode

On-site

Job Type

Full Time

Job Description

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

Responsibilities

B.Tech/BE/ME/MtechDesign and lead high speed IP (GDDR7,DDR5,LPDDR6) development. Need to be a strong individual contributor in analog domain. Will be required to participate in all aspects of development – analog design, layout, digital design, documentation, and silicon validation. Would be required to participate in customer facing discussions.

Requirements

B.Tech/BE/ME/MtechExp - 5 +yrs

Hands on design experience and leading GDDR/DDR/LPDDR IP’s
Must have participated in full cycles of analog IP creation – right from spec to silicon debug and char
Must have good communication skills and should be team player.
Working experience in GDDR, DDR, LPDDR) development is must

We’re doing work that matters. Help us solve what others can’t.

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Principal Design Engineer