Cadence is a pivotal leader in electronic design, building upon more than 30 years of computational software expertise. The company applies its underlying Intelligent System Design strategy to deliver software, hardware and IP that turn design concepts into reality. Cadence customers are the world’s most innovative companies, delivering extraordinary electronic products from chips to boards to systems for the most dynamic market applications including consumer, hyperscale computing, 5G communications, automotive, aerospace industrial and health. The Cadence Advantage The opportunity to work on cutting-edge technology in an environment that encourages you to be creative, innovative, and to make an impact. Cadence’s employee-friendly policies focus on the physical and mental well-being of employees, career development, providing opportunities for learning, and celebrating success in recognition of specific needs of the employees. The unique “One Cadence – One Team” culture promotes collaboration within and across teams to ensure customer success Multiple avenues of learning and development available for employees to explore as per their specific requirement and interests You get to work with a diverse team of passionate, dedicated, and talented individuals who go above and beyond for our customers, our communities, and each other—every day Location: Hyderabad BE/BTECH/ME/METCH or Equivalent Degree This is an opportunity to join a dynamic and growing team of experienced engineers developing high-performance physical IP for industry-standard protocols. The successful candidate will be a highly motivated self-starter who is able to work independently and collaboratively to complete tasks within required project timelines with high quality. The candidate will contribute to digital architecture, digital RTL, low power design, synthesis and timing analysis, and behavioral coding for all IPs in the SerDes physical IP portfolio as well as executing various tool flows for IP quality control. The candidate will be able to work as part of a small and focused team of engineers and will be able to collaborate successfully as needed with design architects, digital verification, project management, and digital and analog design teams in multiple worldwide geographies. This includes but is not limited to: EXP-7-15years Digital architecture that has an understanding of the trade-offs for power, performance, and area Drive architecture to micro-architecture to RTL implementation with the refining of features/requirements throughout the design process Understanding of synthesis, constraint generation, power management and DFT Understanding of low-power designs and features (power islands, state retention, isolation) Work with verification team to specify coverage points, testing strategy, corner conditions and stimulus creation Familiarity with uC Based subsystems and their architecture Qualifications 7+ Years’ experience in working with Digital Design and Architecture. Must have good written and verbal cross-functional communication skills. Proven experience in most of the following: Design Architecture Design implementation Embedded uC Designs Synthesis and SDC Creation Scripting of design automation Debugging verification test cases / SVA’s to cover the design Knowledge of existing Serial standards such as PCIE, USB, Ethernet, etc. Must be comfortable interacting across the IPG development team including the ability to work with Mixed-signal, Verification and Analog teams Knowledge of multiple programming languages. System Verilog, Python, C/C++, etc, are a plus Working knowledge of revision control tools such as Perforce, Git, SVN is a plus Education Level: Bachelor's Degree (MSEE Preferred) Show more Show less
