444 Signal Integrity Jobs - Page 10

As an Electrical Engineer with 1-3 years of experience, you will be responsible for designing circuit board assemblies, including MCU, SOC, high voltage, high power, HDI, and high-speed components. You will collaborate with electrical engineers to ensure that the printed circuit boards meet the design for manufacture requirements. Additionally, you will work closely with mechanical engineers to integrate the electrical components into mechanical packaging. Your role will involve designing high-speed PCBs and routing DDR3/4 memory interfaces, PCIe, and other components. You should have experience with schematic capture tools such as Altium Designer, OrCAD, Cadence Concept, or Mentor. Knowledge of Mentor Hyperlynx for Signal Integrity & Power Integrity tools is preferred. Your ability to work effectively in a team within a complex global organization is crucial. Strong oral and written communication skills are necessary to facilitate collaboration with cross-functional technical teams. You should also be able to influence outcomes and drive initiatives in complex environments. In this role, you will be expected to manage 3rd party layout services and participate in schematic and design reviews. A detailed understanding of high-speed digital PCB routing constraints and multilayer PCB construction is advantageous. You will support quick-turn board builds with PCBA contract manufacturers and release technical documents such as BOMs, design procedures, and design for manufacture guidelines. If you meet these qualifications and are looking for an opportunity to contribute to the design and development of cutting-edge electronic products, we encourage you to apply.,

Role & responsibilities Job Description Key Responsibilities: Lead architecture definition for avionics hardware platforms including compute modules, I/O boards, and communication interfaces. Collaborate with systems, software, and mechanical teams to define system-level architecture and design trade-offs. Define high-level hardware specifications and system interfaces (ICDs, power, thermal, signal). Ensure architecture compliance with DO-254, MIL-STD, and other aerospace standards. Guide schematic and layout design to align with platform requirements and constraints. Conduct design reviews, risk assessments, and FMEA for architectural integrity. Support system integration, debug, and hardware bring-up with verification teams. Interface with customers and OEMs for requirement clarification, solution alignment, and design sign-offs. Preferred candidate profile

Work with Us. Change the World. At AECOM, we're delivering a better world. Whether improving your commute, keeping the lights on, providing access to clean water, or transforming skylines, our work helps people and communities thrive. We are the world's trusted infrastructure consulting firm, partnering with clients to solve the world’s most complex challenges and build legacies for future generations. There has never been a better time to be at AECOM. With accelerating infrastructure investment worldwide, our services are in great demand. We invite you to bring your bold ideas and big dreams and become part of a global team of over 50,000 planners, designers, engineers, scientists, digital innovators, program and construction managers and other professionals delivering projects that create a positive and tangible impact around the world. We're one global team driven by our common purpose to deliver a better world. Join us. Understand and align the team's contributions with project goals, recognizing their impact within the project management framework Operate within financial and program constraints while considering budgetary implications in design options Develops construction cost estimates and estimates of technical efforts/ fee proposal for projects Work within the financial and programme constraints and consider financial implications in producing design options Performs quality control review of design documentation, calculations and drawing Lead EMI and E&B activities, offering guidance, support, and performance management Participates in development of technical proposals. Provides input to the development of engineering budget and schedule to meet requirements. Qualifications Master of Engineering degree (or equivalent education) in an appropriate engineering discipline from an accredited college or university. Chartered Engineer (CEng), or Professional Engineer (PE) license or equivalent in the relevant field from any global organization (e.g., Institution of Civil Engineers, UK) 12+ Years of experience Contribute to design development, design risk and mitigation, and value engineering with a focus on electromagnetic compatibility (EMC) and electromagnetic interference (EMI) Provide expert technical guidance and ensure adherence to earthing and bonding (E&B) standards throughout the design process Present EMC/EMI and E&B strategies effectively to stakeholders and non-technical leads Develop and deliver Earthing (Grounding) and Bonding Control Strategy reports Produce detailed design documentation, including calculations, design sketches, and technical specifications Participate in interdisciplinary design team meetings and coordinate with sub-consultants and equipment suppliers for accurate design information Review and verify design drawings and ensure they align with project requirements and standards Prepare technical reports and assess project specifications for construction compliance Provide input to E&B strategy and conduct power quality compatibility assessments Working with design engineers to advise on EMC test specifications and production of test procedures and reports as required Advise appropriate EMC solutions through design analysis to identify required control techniques and good design practice Earthing (Grounding) & Bonding Design: Produce comprehensive reports detailing solutions for each facility Produce calculation reports to justify results and ensure compliance with required values. Develop and mark up drawings, including grounding grid layouts, cross-sections, riser diagrams, and bonding drawings. Technical specifications of the elements Lightning Protection Design: Produce reports outlining solutions for each facility. Create calculation reports to validate results and meet compliance requirements Develop and Mark up drawings for lightning protection layouts and connections to main grounding grids. Define technical specifications for lightning protection elements. Ensure that technical and safety standards are maintained across all design activities tin order that successful project implementation and future reliability is achieved. Carry out risk assessments and provision of design information for Health and Safety file. Additional Information AECOM provides a wide array of compensation and benefits programs to meet the diverse needs of our employees and their families. We also provide a robust global well-being program. We’re the world’s trusted global infrastructure firm, and we’re in this together – your growth and success are ours too. As an Equal Opportunity Employer, we believe in each person’s potential, and we’ll help you reach yours. #LI-FS1

Role Purpose The purpose of this role is to perform the development of VLSI system by defining the various functionalities, architecture, layout and implementation for a client Do 1. Conduct verification of the module/ IP functionality and provide customer support a. Understand the architecture of the module or the IP and create verification environment and the development plan as per Universal Verification Methodology b. Create test bench development and test case coding of the one or multiple module c. Write the codes or check the code as required d. Execute the test cases and debug the test cases if required e. Conduct functional coverage analysis and document the test cases including failures and debugging procedures on SharePoint/ JIRA or any other platform as directed f. Test the entire IP functionality under regression testing and complete the documentation to publish to client g. Troubleshoot, debug and upgrade existing systems on time & with minimum latency and maximum efficiency h. Write scripts for the IP i. Comply with project plans and industry standards 2. Ensure reporting & documentation for the client a. Ensure weekly, monthly status reports for the clients as per requirements b. Maintain documents and create a repository of all design changes, recommendations etc c. Maintain time-sheets for the clients d. Providing written knowledge transfer/ history of the project Mandatory Skills: VLSI Design For Testability - DFT.: Experience: 3-5 Years.

Role Purpose The purpose of this role is to perform the development of VLSI system by defining the various functionalities, architecture, layout and implementation for a client Do 1. Conduct verification of the module/ IP functionality and provide customer support a. Understand the architecture of the module or the IP and create verification environment and the development plan as per Universal Verification Methodology b. Create test bench development and test case coding of the one or multiple module c. Write the codes or check the code as required d. Execute the test cases and debug the test cases if required e. Conduct functional coverage analysis and document the test cases including failures and debugging procedures on SharePoint/ JIRA or any other platform as directed f. Test the entire IP functionality under regression testing and complete the documentation to publish to client g. Troubleshoot, debug and upgrade existing systems on time & with minimum latency and maximum efficiency h. Write scripts for the IP i. Comply with project plans and industry standards 2. Ensure reporting & documentation for the client a. Ensure weekly, monthly status reports for the clients as per requirements b. Maintain documents and create a repository of all design changes, recommendations etc c. Maintain time-sheets for the clients d. Providing written knowledge transfer/ history of the project Deliver No. Performance Parameter Measure 1. Verification Timeliness Quality of Code/ Number of defects Customer responsiveness Project documentation (scripts, test cases etc) 2. Self-development Skill test for next level clearance on Trend Nxt Mandatory Skills: VLSI Board Design.

The purpose of this role is to perform the development of VLSI system by defining the various functionalities, architecture, layout and implementation for a client Do 1. Conduct verification of the module/ IP functionality and provide customer support a. Understand the architecture of the module or the IP and create verification environment and the development plan as per Universal Verification Methodology b. Create test bench development and test case coding of the one or multiple module c. Write the codes or check the code as required d. Execute the test cases and debug the test cases if required e. Conduct functional coverage analysis and document the test cases including failures and debugging procedures on SharePoint/ JIRA or any other platform as directed f. Test the entire IP functionality under regression testing and complete the documentation to publish to client g. Troubleshoot, debug and upgrade existing systems on time & with minimum latency and maximum efficiency h. Write scripts for the IP i. Comply with project plans and industry standards 2. Ensure reporting & documentation for the client a. Ensure weekly, monthly status reports for the clients as per requirements b. Maintain documents and create a repository of all design changes, recommendations etc c. Maintain time-sheets for the clients d. Providing written knowledge transfer/ history of the project Mandatory Skills: VLSI Design For Testability - DFT. Experience: 3-5 Years.

Role Purpose The purpose of this role is to perform the development of VLSI system by defining the various functionalities, architecture, layout and implementation for a client Do 1. Conduct verification of the module/ IP functionality and provide customer support a. Understand the architecture of the module or the IP and create verification environment and the development plan as per Universal Verification Methodology b. Create test bench development and test case coding of the one or multiple module c. Write the codes or check the code as required d. Execute the test cases and debug the test cases if required e. Conduct functional coverage analysis and document the test cases including failures and debugging procedures on SharePoint/ JIRA or any other platform as directed f. Test the entire IP functionality under regression testing and complete the documentation to publish to client g. Troubleshoot, debug and upgrade existing systems on time & with minimum latency and maximum efficiency h. Write scripts for the IP i. Comply with project plans and industry standards 2. Ensure reporting & documentation for the client a. Ensure weekly, monthly status reports for the clients as per requirements b. Maintain documents and create a repository of all design changes, recommendations etc c. Maintain time-sheets for the clients d. Providing written knowledge transfer/ history of the project Mandatory Skills: VLSI Board Design. Experience:Reinvent your world. We are building a modern Wipro. We are an end-to-end digital transformation partner with the >

Dell is seeking talented and driven engineers specializing in electrical and computer engineering to contribute to the development of cutting-edge computing servers. In this role, you will collaborate with our team of engineers, focusing on high-speed signal integrity within server platforms" system design. Working closely with various stakeholders, including designers, cross-functional teams at Dell Technologies, and suppliers, you will ensure that electronic designs meet diverse requirements such as schedule, feature set, functionality, quality, and industry standards. Join us and embark on a rewarding journey as an Electrical Principal Engineer within TDC's Core Hardware Development team. Your responsibilities will include driving innovation in Signal Integrity, exploring new possibilities in high-speed signaling, and addressing transmission line challenges in enterprise server platform design. By collaborating with internal engineering teams and leading ODMs on Core Power Edge Server and AI Server or Storage products, you will play a pivotal role in advancing technology solutions. Key responsibilities include: - Collaborating with silicon and passive component suppliers to acquire necessary information for simulation of assigned interfaces and technologies - Developing, testing, and validating simulation models to ensure accuracy of results - Analyzing electrical designs and simulating routing, material, and interconnect solutions - Devising optimized simulation strategies for worst-case system conditions - Participating in design reviews and providing guidance based on signal integrity rules - Leading the development of electrical validation test plans - Engaging with strategic suppliers to co-develop platform guidelines and simulation tools Requirements: - In-depth understanding of transmission line theory and electromagnetic field theory - Proficiency in Signal Integrity tools and applications of 2D, 3D, and Power Integrity simulation tools - Experience in advanced test and measurement equipment for Signal Integrity tasks - Knowledge of analogue and digital circuit theory and principles - Strong negotiation skills and problem-solving abilities Desirable qualifications: - Proficiency in reading technical data sheets and circuit schematics - Bachelor's degree in electrical engineering or computer engineering with 6-8 years of experience (or a master's degree with 3-5 years of experience) At Dell Technologies, we value the unique contributions of each team member and are committed to providing an inclusive work environment free of discrimination and harassment. If you are passionate about driving innovation and making a difference, we invite you to join us as we shape a future that benefits all.,

You will be responsible for embedded hardware design with a focus on digital circuits. Your key responsibilities will include: - Developing new hardware solutions from initial requirements through prototypes to production-ready. - Designing embedded circuits, including component selection, Spice simulation, control loop design, power supplies, signal integrity check, interface designs, protocol analysis, mechanical interference, thermal analysis, high-reliability, long availability, BOM management, etc. - Coordinating with Layout engineers for proper layout design inclusive of power supplies routing, signal integrity, thermal dissipation, clear documentation, etc. - Maintaining existing designs and developing new variants of existing products to add new features, deal with component end-of-life, etc. - Improving the performance of existing designs and fixing hardware bugs identified in current revisions. - Working collaboratively with fellow Hardware team members, Product Management, Software Engineering, and Manufacturing to produce reliable, standards-compliant, world-class products. - Creating, improving, and automating Bench test setups, debugging, and characterization of embedded boards, power supply switching regulators, signal and power integrity measurements for board characterization. - Data collection, jitter measurements, analysis to enable simulation correlation, test design, and automation. To be successful in this role, you must have the following qualifications and skills: - Circuit design and analysis skills for digital and mixed-signal circuits. - Design and analysis of R/L/C filters, OpAmp circuits, and data-converter circuits. - Excellent knowledge of micro-controller families such as Cypress, TI, ARM architecture. - Excellent knowledge of building network adapters for various protocols i.e., USB, BLE, WiFi. - Excellent knowledge of SOCs. - Understanding of signal integrity, noise factors, filtering, decoupling, thermal, etc. - Excellent problem-solving and debugging skills. - Experience using schematic and circuit analysis tools like Eagle, Cadence, Orcad, etc. - Familiarity with Circuit layout tools like PCB Editor, Allegro, etc. - Experience in developing firmware for microcontroller or microprocessor-based boards. - Design of power supply converters of all topologies. - Experience with DFMA cycle. - Excellent understanding of requirements for electronics and electric tests such as ESD, EMC/EMI. - Successful experience in shipping over 1000 units of designs done. - Experience in performing CE/UL certifications for the board and products. - Knowledge of BGA components, passive and active components. - Good understanding of testing and debugging techniques. - Good understanding of revision control systems like SVN, GIT. - Experience with design from scratch with a product mindset and system-level understanding. - Experience in programming with medical sensors and/or biomedical device applications. - Working knowledge of ISO13485, ISO60601, ISO14971 guidelines. - Knowledge of MIPI, high-speed image signal processing. You will also enjoy the following perks and benefits: - Health insurance - Learning & development opportunities - Employee experience enhancements - 5-day work week pattern Role: Senior Associate Industry Type: Medtech Functional Area: Production, R&D Employment Type: Full Time, Permanent Education: UG: B.Tech/B.E. Electronics PG: MTech Embedded Systems,

Role Purpose The purpose of this role is to perform the development of VLSI system by defining the various functionalities, architecture, layout and implementation for a client Do 1. Conduct verification of the module/ IP functionality and provide customer support a. Understand the architecture of the module or the IP and create verification environment and the development plan as per Universal Verification Methodology b. Create test bench development and test case coding of the one or multiple module c. Write the codes or check the code as required d. Execute the test cases and debug the test cases if required e. Conduct functional coverage analysis and document the test cases including failures and debugging procedures on SharePoint/ JIRA or any other platform as directed f. Test the entire IP functionality under regression testing and complete the documentation to publish to client g. Troubleshoot, debug and upgrade existing systems on time & with minimum latency and maximum efficiency h. Write scripts for the IP i. Comply with project plans and industry standards 2. Ensure reporting & documentation for the client a. Ensure weekly, monthly status reports for the clients as per requirements b. Maintain documents and create a repository of all design changes, recommendations etc c. Maintain time-sheets for the clients d. Providing written knowledge transfer/ history of the project Mandatory Skills: FPGA Design. Experience:3-5 Years.

Role Purpose The purpose of this role is to perform the development of VLSI system by defining the various functionalities, architecture, layout and implementation for a client Do 1. Conduct verification of the module/ IP functionality and provide customer support a. Understand the architecture of the module or the IP and create verification environment and the development plan as per Universal Verification Methodology b. Create test bench development and test case coding of the one or multiple module c. Write the codes or check the code as required d. Execute the test cases and debug the test cases if required e. Conduct functional coverage analysis and document the test cases including failures and debugging procedures on SharePoint/ JIRA or any other platform as directed f. Test the entire IP functionality under regression testing and complete the documentation to publish to client g. Troubleshoot, debug and upgrade existing systems on time & with minimum latency and maximum efficiency h. Write scripts for the IP i. Comply with project plans and industry standards 2. Ensure reporting & documentation for the client a. Ensure weekly, monthly status reports for the clients as per requirements b. Maintain documents and create a repository of all design changes, recommendations etc c. Maintain time-sheets for the clients d. Providing written knowledge transfer/ history of the project Mandatory Skills: VLSI Physical Design Planning. Experience: 1-3 Years.

This role is an individual contributor with end-end responsibility/ownership for Post silicon verification board/system design from requirements understanding, board architecture, board design, collaboration with stakeholders/external suppliers, final delivery of assembled board. Job Description This role is an individual contributor with end-endresponsibility/ownership for Post silicon verification board/system design from requirements understanding, board architecture, board design, collaboration with stakeholders/external suppliers, final delivery of assembled board. This role would involve leading, guiding one or two junior engineers in PCB / board design The tools used in board design would be Altium Designer (schematic draft) Need to review PCB layout and Gerber Work closely with PCB layout engineer to design PCB layout meeting allthe requirements for post silicon validation platform in terms ofelectrical, mechanical, thermal specifications Work on High speed board design, PCB layout review / guidelines, Signal Integrity, Power Integrity Design Robust PCB/post silicon validation platform for stress test,burn-in study, PVTF conditions Your Profile Looking for a senior engineers with min 12 years of experience in design & development of post silicon validation boards /test hardware / test platform in Automotive Microcontroller Product & Test Engineering division. B.E/B.Tech/M.E./M.Tech in Electronics & Communication Engineering , Electrical & Electronics Engineering ,Electronics & Instrumentation & related engineering branch from reputed university/college with Full time degree/master degree Hands on experience with PCB, board, electronic system design,Post silicon validation platform design Experience in EDA tools like Altium Designer (schematic draft), PCB layout review, Gerberreview Experience in Post silicon validation platform design, Socket selection, PCB stackup Good knowledge & experience with Automotive Microcontroller, High speedinterfaces (Ethernet, xSPI, LPDDR, PCIe) Automotive Interfaces (CAN,LIN, ERAY,LETH), clock, JTAG, Power supply design using DC-DC converter,LDO Experience in system level board design with Automotive Microcontroller,PMIC, Transceivers, external memories Hands on experience with Altium designer tool for schematic capture,BOM, PCB layout review Experience in designing Post Silicon validation boards (multi site) forAutomotive Microcontroller / SoC / for functional, performance,robustness validation Experience in board bring-up, debugging using lab equipment like oscilloscope, logic analyser, lab bench power supplies Desirable to have knowledge about designing PCB s for burn-in study,qualification, robustness, PVTF scenarios Desirable to have experience in leading, guiding and the team in PCB / board design Excellent stakeholder collaboration across different sites including external suppliers/vendors interaction for PCB manufacturing/assembly Good verbal/written communication skills are mandatory Good to have FPGA based pre silicon verification hardware platformdesign Need to be good team player & technical leader Contact: Gowri Shenoy, LinkedIn We are on a journey to create the best Infineon for everyone. This means we embrace diversity and inclusion and welcome everyone for who they are. At Infineon, we offer a working environment characterized by trust, openness, respect and tolerance and are committed to give all applicants and employees equal opportunities. We base our recruiting decisions on the applicant s experience and skills. Learn more about our various contact channels. Please let your recruiter know if they need to pay special attention to something in order to enable your participation in the interview process. Click here for more information about Diversity & Inclusion at Infineon.

Rambus, a premier chip and silicon IP provider, is seeking to hire an exceptional Sr. Principal Engineer with signal integrity and package design experience to join our Memory Interface Chips BU s engineering team in San Jose, California. Candidates will be joining some of the brightest inventors and engineers in the world to develop products that make data faster and safer. As an SPE Signal Integrity Engineer, you will be reporting to the VP of Engineering and is a Full Time position. In this highly visible role, you will work within our SI/PI team to work on modeling, analysis, and simulations of signal integrity (SI) and power integrity (PI) in the very challenging DDR field with speed up to 12800+ MT/s. Responsibilities Create SI/PI methodologies and work with the Design and SI teams to do SI/PI study and package design for the latest DDR product portfolio Work with our design team and validation team to define specifications and system design requirements such as packaging and PCB routings, IC-PKG-BRD decoupling requirements, channel simulations and jitter sensitivity analysis Provide guideline to design team based on SI/PI study and simulation and silicon correlation so that our products will have superior SI performance, i.e. best RMT scores Work with our customers to do collaboration to find the optimum SI/PI solution Help the team during debug and bring up in lab if needed Qualifications Solid background in SI/PI and package design to provide technical leadership to the team Strong interpersonal skill to keep the team motivated and focused MS or PhD in Electrical Engineering with 10+ years of industry experience in which at least a few years with exposure to DDR4/5 Prior experience in simulating high speed memory (DDR4, DDR5) and/or SERDES interfaces is required Solid theoretical background and understanding in EM and transmission line theory is a must Strong background and solid understanding of equalization techniques such as FIR/FFE/DFE/CTLE are required Must understand package and PCB design, be able to edit APD/Allegro layout files. Know SI/PI driven BGA assignment methodology and be able to simulate for the trade-offs in the context of a system Extensive experience in correlating simulation results with lab measurements using scopes, TDRs, VNAs etc. Strong understanding of the server system, from CPUs to DRAMs on DIMM modules, is highly desirable Know the mechanisms of crosstalk and jitter in source-synchronous interfaces and be able to include the effect of such losses into low BER simulations Proficient with simulations using Spice and ADS Experience with commercial EDA tools such as ADS, HFSS, Q3D/PowerSI Familiarity with RedHawk/Totem or XcitePI and Virtuoso is a strong plus Lab characterization experience of passive components, link margin, or noise using real time/sampling scopes and VNA/TDR is a big plus Basic knowledge of circuits used in high-speed link design is preferred. Excellent writing and presentation skills are essential as well as good communication skills to work with customers and cross-functional teams. Must be an innovative, self-motivated individual, be able to manage and drive his projects, and must be a team player About Rambus With 30 years of innovation and semiconductor expertise, Rambus leads the industry with products and solutions speed performance, expand capacity and improve security for todays most demanding applications. From data center and edge to artificial intelligence and automotive, our interface and security IP, and memory interface chips enable SoC and system designers to deliver their vision of the future. Rambus offers a competitive compensation package including base salary, bonus, equity, matching 401(k), employee stock purchase plan, comprehensive medical and dental benefits, time-off program, and gym membership. The US- San Jose salary range for this full-time position is $141,500 to $281,000. Our salary ranges are determined by role, level and location. The successful candidate s starting pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. Rambus is proud to be an Equal Employment Opportunity and Affirmative Action employer. We do not discriminate based upon race, religion, color, national origin, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender identity, gender expression, age, status as a protected veteran, status as an individual with a disability, genetic information, or other applicable legally protected characteristics. Rambus is committed to providing reasonable accommodations for qualified individuals with disabilities and disabled veterans in our job application procedures. If you need assistance or an accommodation due to a disability, you may let us know in the application. For more information about Rambus, visit rambus.com. For additional information on life at Rambus and our current openings, check out rambus.com/careers/ . #LI-GL1

We are seeking an experienced IR & EM Technology Expert to join our ASIC design team. The successful candidate will have a strong background in CAD design and a deep understanding of IR (Integrated Radiation) and EM (Electromagnetic) technology. This is an excellent opportunity for a motivated individual to contribute to the development of cutting-edge ASIC designs, ensuring the highest level of performance, power efficiency, and reliability. Job Description In your new role you will: Design and develop IR and EM technology -based solutions for ASIC designs, focusing on signal integrity, power integrity, and thermal management. Collaborate with cross-functional teams, including architecture, design, and verification, to ensure seamless integration of IR and EM technology into ASIC designs. Develop and maintain IR and EM models, scripts, and tools to support ASIC design flows. Perform IR and EM analysis, simulation, and verification to ensure compliance with design specifications and industry standards. Optimize IR and EM performance, power consumption, and area usage for ASIC designs. Stay up-to-date with the latest advancements in IR and EM technology, CAD tools, and industry trends, applying this knowledge to improve design methodologies and flows. Develop and maintain documentation, including design guides, user manuals, and technical reports. Your Profile You are best equipped for this task if you have: 4-12 years of experience in CAD design , with a focus on IR and EM technology in ASIC design. Bachelors or Masters degree in Electrical Engineering, Computer Engineering, or a related field. Proficiency in CAD tools, such as Cadence, Synopsys , or Mentor Graphics, with experience in IR and EM analysis and simulation. Excellent problem-solving skills, with the ability to analyze complex technical issues and develop creative solutions. Effective communication and collaboration skills, with the ability to work with cross-functional teams and stakeholders. Strong documentation and reporting skills, with the ability to create clear, concise technical documents. for everyone. This means we embrace diversity and inclusion and welcome everyone for who they are. At Infineon, we offer a working environment characterized by trust, openness, respect and tolerance and are committed to give all applicants and employees equal opportunities. We base our recruiting decisions on the applicant s experience and skills. Learn more about our various contact channels. Please let your recruiter know if they need to pay special attention to something in order to enable your participation in the interview process. Click here for more information about Diversity & Inclusion at Infineon.

Project description This is a great opportunity to work as a part of highly regarded team to deliver leading edge solutions. Responsibilities Drive the development of cutting-edge memory-related firmware projects, contributing to the creation of innovative solutions Collaborate with a highly regarded team to bring innovation to memory-related firmware, ensuring solutions are at the forefront of industry advancements Tackle complex challenges by employing strong problem-solving skills, enhancing firmware to meet evolving performance and reliability standards Skills Must have 5-12 years' experience. Strong with C language programming Working knowledge of git/gerrit Good understanding of DDR4, DDR5, NVDIMM Good understanding of different DIMM types (UDIMM/SODIMM/RDIMM/LRDIMM/LPDDR) Good understanding of UMC features like ECC, SME, SEV, RAS etc Nice to have Understanding different vendor implementations and memory timing differences is a big plus

Manage all student progress and prepare required strategies to overcome issues. Arranging for guest lectures. Arranging visits to the local parlors for the students. Arranging Induction & different sessions too. Looking after placements for students of hub center Maintaining pre placement and post-placement data and sharing it with the central office. Checking the quality of training at the centers and submitting reports about the same. Taking an initiative in creating new placement partnerships and tie ups in coordination with the Central team. Track the students for the complete period of their employment in the city. Provide mentor-ship support to students employed in the region to help them settle down including counseling, helping with finding accommodation, resolving issues with employers, helping establish social network in city, providing any other emergency support in the city Capture feedback of students and recruiters on an ongoing basis. Build and maintain regular connections with current and past employers & clients. Requirements Willingness to travel regularly Minimum Qualification Graduation 1 years of experience in the field Own two wheeler with required documents Basic Computer knowledge (Microsoft Excel & Word, Internet, etc.) Good Communications Skills Fluency in English, Hindi & the Regional Language (Kannad) Experience/ interest in training, teaching & coordinating.

Responsibilities: * Collaborate with cross-functional teams on project delivery * Ensure compliance with industry standards and customer requirements * Lead analog design projects from concept to production

Where Staff Applications Engineer Bengaluru, Karnataka, India Engineering Employee Apply Save Job Share Email LinkedIn X Facebook Jump to Overview Job Description Benefits Culture How We Hire Overview Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products. These engineers play a crucial role in advancing technology and enabling innovations in various industries. Play Video Job Description Category Engineering Hire Type Employee Job ID 6051 Remote Eligible No Date Posted 20/03/2025 Job Description and Requirements Our Silicon Design & Verification business is all about building high-performance silicon chips faster. We re the world s leading provider of solutions for designing and verifying advanced silicon chips. And we design the next-generation processes and models needed to manufacture those chips. We enable our customers to optimize chips for power, cost, and performance eliminating months off their project schedules. Were looking for an Applications Engineer to join our team. Does this sound like a good role for you This is an exciting opportunity to be part of applications engineering team that supports the industry leading Static Timing Analysis tool, Primetime. The primary focus of the Application Engineer (AE) is to drive increased usage of the product in both pre-sale and post-sale capacity. Pre-sales tasks include competitive benchmarks and evaluation, articulating the superiority to our customer s design team and management. Post-sales tasks include customer training, tape-out support and advance collaboration initiatives for product enhancements. The job involves working closely with users/customers and multiple organizations like R&D, marketing, sales among others. Key Qualifications Synopsys STA tool, PrimeTime experience and knowledge are required Knowledge of timing corners/modes, process variations and signal integrity related issues are required Familiarity with synthesis, Physical design, extraction and ECO methodology is desired Strong TCL knowledge is preferred Excellent verbal and written communication skills are mandatory. Prior customer facing role is a plus BSEE or equivalent, required with 6-7 years of experience, or MSEE, or equivalent with 4-5 years of experience At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability. Apply Save Job test Share Email LinkedIn X Facebook Benefits At Synopsys, innovation is driven by our incredible team around the world. We feel honored to work alongside such talented and passionate individuals who choose to make a difference here every day. Were proud to provide the comprehensive benefits and rewards that our team truly deserves. Visit Benefits Page Health & Wellness Comprehensive medical and healthcare plans that work for you and your family. Time Away In addition to company holidays, we have ETO and FTO Programs. Family Support Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more. ESPP Purchase Synopsys common stock at a 15% discount, with a 24 month look-back. Retirement Plans Save for your future with our retirement plans that vary by region and country. Compensation Competitive salaries. *Benefits vary by country and region - check with your recruiter to confirm Get an idea of what your daily routine around the office can be like Explore Bengaluru View Map Hiring Journey at Synopsys Apply When you apply to join us, your resume, skills, and experience are first reviewed for consideration. Phone Screen Once your resume has been selected, a recruiter and/or hiring manager will reach out to learn more about you, share more about the role, and answer any questions you might have. Interview Next up is interviewing (in person or virtual). You ll be invited to meet with members of the hiring team to discuss your skills and experience, and what you re looking for in your next role. Offer Congratulations! When you have been selected for the role, your recruiter will reach out to make you a verbal offer (a written offer will follow your conversation), and we hope you accept! Onboarding There will be some steps you need to take before you start to ensure a smooth first day, including new hire documentation. Welcome! Once you ve joined, your manager, team, and a peer buddy will help you get acclimated. Over the next few weeks, you ll be invited to join activities and training to help you ramp up for a successful future at Synopsys!

Principal Physical Design Engineer in Pune, MH, India Description Invent the future with us. By providing a new level of predictable performance, efficiency, and sustainability Ampere is working with leading cloud suppliers and a growing partner ecosystem to deliver cloud instances, servers and embedded/edge products that can handle the compute demands of today and tomorrow. About the role: Ampere Computing is seeking a highly skilled engineer to join our physical design team with a focus on both CPU/GPU physical design and interconnect integration/implementation for CPU and GPU products. This role requires deep expertise in high-speed and power efficient physical design and methodologies with hands-on experience implementing CPU/GPU & interconnect networks to deliver robust, high-performance silicon solutions. You will collaborate closely with Architects, RTL designers, packaging team, and timing, power & DFT teams to ensure robust, high-performance designs that meet stringent timing, power, and area requirements. Interconnect floor planning iterations, partitioning, pin-placement, wire planning, clock distribution network. Working with Architecture, RTL and timing teams for optimal floorplan from system performance point of view. Implement power and clock domain crossing with UPF and timing methodologies. Converge timing on high speed interface with appropriate methods of clock balancing and skewing. Lead and execute physical design tasks for CPU/GPU blocks including floor planning, placement, clock tree synthesis, routing, and optimization. Collaborate with RTL designers and timing engineers to achieve timing closure, power targets, and area goals. Perform physical verification and signoff checks ensuring design compliance with foundry rules and design specifications. Analyze and resolve physical design issues such as congestion, timing violations, and signal integrity challenges. Develop scripts and automation flows to improve design efficiency and quality. Address interconnect-related challenges such as crosstalk, IR drop, electromigration, and noise. Document design methodologies, best practices, and integration guidelines specific to Ampere s CPU/GPU physical design flows. Collaborate and work with cross geo teams in India & Vietnam About you: M.Tech in Electronics Engineering or Computer Engineering with 6+ years of semiconductor experience or B.Tech in Electronics Engineering or Computer Engineering with 8+ years of semiconductor experience Experience in high performance/low power physical design, preferably with a focus on CPU and/or GPU architectures. Proven expertise in both CPU / High performance physical design and interconnect integration/implementation. Solid understanding of timing analysis, signal integrity, power integrity, electromigration, and advanced process technologies (7nm, 5nm, or below). Deep understanding of semiconductor device physics, interconnect materials, and advanced process technologies (7nm, 5nm, or below). Strong proficiency with EDA tools such as Cadence Innovus, Synopsys ICC2, Mentor Calibre, and parasitic extraction tools (StarRC, Quantus). Experience with scripting languages (Tcl, Python) for automation and tool customization. Excellent problem-solving skills and ability to work effectively in cross-functional teams. Effective communication skills to collaborate with design, verification, and manufacturing teams. What we ll offer: At Ampere we believe in taking care of our employees and providing a competitive total rewards package that includes base pay, bonus (i.e., variable pay tied to internal company goals), long-term incentive, and comprehensive benefits. Benefits highlights include: Premium medical, dental, vision insurance, parental benefits including creche reimbursement, as well as a retirement plan, so that you can feel secure in your health, financial future and child care during work. Generous paid time off policy so that you can embrace a healthy work-life balance Fully catered lunch in our office along with a variety of healthy snacks, energizing coffee or tea, and refreshing drinks to keep you fueled and focused throughout the day. And there is much more than compensation and benefits. At Ampere, we foster an inclusive culture that empowers our employees to do more and grow more. We are passionate about inventing industry leading cloud-native designs that contribute to a more sustainable future. We are excited to share more about our career opportunities with you through the interview process.

Principal Physical Design Engineer in Bangalore, KA, India Description Invent the future with us. By providing a new level of predictable performance, efficiency, and sustainability Ampere is working with leading cloud suppliers and a growing partner ecosystem to deliver cloud instances, servers and embedded/edge products that can handle the compute demands of today and tomorrow. About the role: Ampere Computing is seeking a highly skilled engineer to join our physical design team with a focus on both CPU/GPU physical design and interconnect integration/implementation for CPU and GPU products. This role requires deep expertise in high-speed and power efficient physical design and methodologies with hands-on experience implementing CPU/GPU & interconnect networks to deliver robust, high-performance silicon solutions. You will collaborate closely with Architects, RTL designers, packaging team, and timing, power & DFT teams to ensure robust, high-performance designs that meet stringent timing, power, and area requirements. Interconnect floor planning iterations, partitioning, pin-placement, wire planning, clock distribution network. Working with Architecture, RTL and timing teams for optimal floorplan from system performance point of view. Implement power and clock domain crossing with UPF and timing methodologies. Converge timing on high speed interface with appropriate methods of clock balancing and skewing. Lead and execute physical design tasks for CPU/GPU blocks including floor planning, placement, clock tree synthesis, routing, and optimization. Collaborate with RTL designers and timing engineers to achieve timing closure, power targets, and area goals. Perform physical verification and signoff checks ensuring design compliance with foundry rules and design specifications. Analyze and resolve physical design issues such as congestion, timing violations, and signal integrity challenges. Develop scripts and automation flows to improve design efficiency and quality. Address interconnect-related challenges such as crosstalk, IR drop, electromigration, and noise. Document design methodologies, best practices, and integration guidelines specific to Ampere s CPU/GPU physical design flows. Collaborate and work with cross geo teams in India & Vietnam About you: M.Tech in Electronics Engineering or Computer Engineering with 6+ years of semiconductor experience or B.Tech in Electronics Engineering or Computer Engineering with 8+ years of semiconductor experience Experience in high performance/low power physical design, preferably with a focus on CPU and/or GPU architectures. Proven expertise in both CPU / High performance physical design and interconnect integration/implementation. Solid understanding of timing analysis, signal integrity, power integrity, electromigration, and advanced process technologies (7nm, 5nm, or below). Deep understanding of semiconductor device physics, interconnect materials, and advanced process technologies (7nm, 5nm, or below). Strong proficiency with EDA tools such as Cadence Innovus, Synopsys ICC2, Mentor Calibre, and parasitic extraction tools (StarRC, Quantus). Experience with scripting languages (Tcl, Python) for automation and tool customization. Excellent problem-solving skills and ability to work effectively in cross-functional teams. Effective communication skills to collaborate with design, verification, and manufacturing teams. What we ll offer: At Ampere we believe in taking care of our employees and providing a competitive total rewards package that includes base pay, bonus (i.e., variable pay tied to internal company goals), long-term incentive, and comprehensive benefits. Benefits highlights include: Premium medical, dental, vision insurance, parental benefits including creche reimbursement, as well as a retirement plan, so that you can feel secure in your health, financial future and child care during work. Generous paid time off policy so that you can embrace a healthy work-life balance Fully catered lunch in our office along with a variety of healthy snacks, energizing coffee or tea, and refreshing drinks to keep you fueled and focused throughout the day. And there is much more than compensation and benefits. At Ampere, we foster an inclusive culture that empowers our employees to do more and grow more. We are passionate about inventing industry leading cloud-native designs that contribute to a more sustainable future. We are excited to share more about our career opportunities with you through the interview process.

1. Candidate shall have experience in handling multiple end to end product project around RF design, analysis, testing, calibration, regulatory compliances and release of products for commercial deployments 2. Relevant experience of 3+ years in RF Design. Responsibilities 1. Lead the design, simulation, and verification of complex analog and mixed-signal circuits, Signal integrity, power integrity, impedance Analysis. 2. Perform advanced simulations and analyses to ensure exceptional circuit performance and compliance with specifications. 3. Create comprehensive documentation of design methodologies, specifications, and outcomes. 4. Multi radio front end and radio optimisation. 5. Extensive knowledge on RF matching, filter design and antenna matching. 6. Conversant with lab equipment like Spectrum Analyzer, Network analyser, RF Signal generators , IQXEL, MT8852 etc. 7. Experience on EMI/EMC, Antenna design, Signal Integrity and Thermal Analysis will be a key skill. 8. Design and develop Regulatory certified BLE, ZigBee, Wi-Fi modules. 9. Work closely with cross functional teams to derive the design specification for Modules. 10. Prototype Board bring-up, Validation and Characterization. 11. Handover design to manufacturing and help to derive the production test plan. 12. Documentation of design, test plan and test results. 13. Supporting Customer support team in debugging critical customer issues. 14. Radio side design and debugging. 15. RF performance evaluation, calibration and optimisation. 16. Link budget and harmonics analysis. 17. Tuning and optimisation of RF front end. 18. Deep understanding on radio chip, physical layer customisations and its impacts on the radio performance. 19. Understanding of various physical layer standards. 20. Willingness to contribute in global standards committee of next generation wireless systems. 21. Ownership of product level EMI/EMC compliances for global requirements as well. 22. Schematic, Layout and BOM selection.

Key Responsibilities: Lead architecture definition for avionics hardware platforms including compute modules, I/O boards, and communication interfaces. Collaborate with systems, software, and mechanical teams to define system-level architecture and design trade-offs. Define high-level hardware specifications and system interfaces (ICDs, power, thermal, signal). Ensure architecture compliance with DO-254, MIL-STD, and other aerospace standards. Guide schematic and layout design to align with platform requirements and constraints. Conduct design reviews, risk assessments, and FMEA for architectural integrity. Support system integration, debug, and hardware bring-up with verification teams. Interface with customers and OEMs for requirement clarification, solution alignment, and design sign-offs. Required Qualifications: Bachelor’s or Master’s degree in Electrical Engineering, Electronics, or related field. 10+ years of experience in avionics hardware development, with at least 3+ years in an architecture/leadership role. Strong understanding of digital and analog design, signal integrity, and power systems. Expertise in avionics communication protocols (e.g., ARINC 429, MIL-STD-1553, Ethernet). Experience with system-level modeling tools (e.g., SysML, MATLAB/Simulink). Working knowledge of DO-254, DO-160, EMI/EMC considerations, and environmental testing. Strong documentation, analytical, and leadership skills. Preferred Qualifications: Familiarity with hardware/software co-design principles and system simulation. Exposure to obsolescence management, thermal management strategies, and high-reliability designs. Previous collaboration with OEM/Tier-1 customers on aerospace programs.

Job Title: AI/ML Engineer - Time Series Forecasting & Clustering Location: Bangalore Experience: 2+ Years Job Type: Full-Time Mandatory Skills: AI/ML Engineer with Time Series Forecasting & Clustering experience Responsibilities in Brief: Time Series Forecasting : Build models to predict trends from time series data. Clustering : Develop algorithms to group and analyze data segments. Data Insights : Analyze data to enhance model performance. Team Collaboration : Work with teams to integrate models into products. Stay Updated : Apply the latest AI techniques to improve solutions. Qualifications: Education : Bachelors/Masters in Computer Science or related field. Experience : Hands-on experience with time series forecasting and clustering. Skills : Proficient in Python, R, and relevant ML tools Perks & Benefits: Health and Wellness: Healthcare policy covering your family and parents. Food: Enjoy scrumptious buffet lunch at the office every day. Professional Development: Learn and propel your career. We provide workshops, funded online courses and other learning opportunities based on individual needs. Rewards and Recognitions: Recognition and rewards programs in place to celebrate your achievements and contributions. Why join Relanto? Health & Family: Comprehensive benefits for you and your loved ones, ensuring well-being. Growth Mindset: Continuous learning opportunities to stay ahead in your field. Dynamic & Inclusive: Vibrant culture fostering collaboration, creativity, and belonging. Career Ladder: Internal promotions and clear path for advancement. Recognition & Rewards: Celebrate your achievements and contributions. Work-Life Harmony: Flexible arrangements to balance your commitments. To find out more about us, head over to our Website and LinkedIn

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field. 3 to 7 years experienced professional in Digital / Mixed Signal design and analysis. This is a central role driving the dseign and development of complex DDR PHY IP for next-gen SoCs — from kickoff to silicon. What you'll work on1. Critical path design and analysis for high-speed IP 2. Cell profiling for advanced technology nodes 3. Signal & power integrityelectrical spec signoff and mitigation 4. System spec creation & jitter budgeting (on-die + off-die) 5. Timing bottleneck analysis and PPA improvements 6. Building automation to accelerate complex IP development 7. Strong interpersonal skills to collaborate with various functions and domain leads on IP development and execution

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. Experience 7 to 15 years Physical design of block level with full understanding of PnR cycle. Good understanding of Physical design fundamentals Good hands-on experience on industry standard pnr tools like ICC2/Innovus Good understanding on signoff tool like Prime time , Redhawk and calibre Should be able to guide junior engineers in resolving technical issues. Tools ICC/Innovus, PT, StarRC, Redhawk, Calibre DRC/LVS ScriptingTCL, Perl