5 - 10 years
25 - 40 Lacs
Posted:6 days ago|
Platform:
Work from Office
Full Time
Key Responsibilities: Perform block- and chip-level functional verification of complex ASIC/SoC designs. Build UVM-based testbenches from scratch for new IPs and subsystems. Create and execute detailed verification test plans based on specifications. Develop constrained-random and directed test cases and debug simulation issues. Conduct functional and code coverage analysis and drive coverage closure. Use RAL (Register Abstraction Layer) for register-level testing. Develop and validate SystemVerilog Assertions (SVA). Candidate Requirements: • Education: B.E/B.Tech or M.E/M.Tech in Electronics, Electrical, or related fields. • Experience: 6–10 years of relevant experience in ASIC/SoC design verification.
Western Ghats Solutions And Services
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