376 Chip Design Jobs

Role & responsibilities Description : Performs semiconductor design engineering assignments including engineering and designing chip layout circuits, circuit checking, documenting specifications, modifying and evaluating semiconductor devices and components. Reviews product requirements and logic diagrams for device definition. Typically responsible for projects, or portions of projects, to design, fabricate, modify, and evaluate semiconductor devices and components. 3-5 years of experience in Designing & Verification Guide and set the direction for the verification effort within your areas of expertise in any project that the team undertakes. Provide verification support to design projects ...

We are looking for Women coming with Semicon experience - these people should be available to attend the drive on October 28th 2025 at RENESE OFFICE Address : , East West Metro Corridor, Old Baiyyappanahalli, Maruthi Sevanagar, Bengaluru, Karnataka 560038 We are seeking an expert to lead a workshop focused on the evolving landscape of semiconductor design . The session will cover: AI-assisted EDA tools and their role in accelerating innovation. The growing demand for multidisciplinary engineering talent . Best practices to manage design complexity in fast-paced innovation cycles. Insights into the future skills and workforce readiness for chip design. Ideal Speaker Profile : 12+ years of exp...

Company Overview Group/Division Job Description/Preferred Qualifications Doctorate (Academic) Degree and related work experience of 3 years; Masters Level Degree and related work experience of 6 years; Bachelors Level Degree and related work experience of 8 years Minimum Qualifications Doctorate (Academic) Degree and related work experience of 3 years; Masters Level Degree and related work experience of 6 years; Bachelors Level Degree and related work experience of 8 years

Job Description This position involves the development of complex SoC/chip architectures with multi-core, multi-threaded processor subsystems, AI accelerators, interconnects, memory architecture and multi-level caches, multiple clocks and resets, high-speed interfaces, peripherals. The chosen candidate would need to contribute to, and manage a team for, the development of architecture, microarchitecture, and design of SoCs which include RISC-V, ARM or proprietary processor designs, and high-speed interfaces for off-chip memories, along with the integration of wireless systems, power management, and mixed signal IP. The candidate would be responsible for the leading a project through the enti...

You Are: You are a visionary leader, passionate about fostering technical excellence and driving business growth. With a deep understanding of digital design technologies especially in Design for Test (DFT), Synthesis, or related domains you thrive in dynamic, high-impact environments. You possess a strong track record of leading engineering teams, inspiring innovation, and delivering customer-centric solutions. Your experience spans project management, strategic planning, and customer engagement, enabling you to act as a trusted advisor to both internal stakeholders and external partners. You are adept at building and nurturing cross-functional relationships, translating complex technical f...

We are seeking an experienced System on Chip (SoC) Architect to join our development team. The ideal candidate will be involved in designing, integrating, and optimizing SoC hardware architectures and ensuring seamless software-hardware co-development. You have: Bachelors Degree in Electrical Engineering, Computer Engineering, or a related field (Masters or Ph.D. preferred). Overall,15+ years of experience as a Chip design expert. 8+ years of proven experience in IC design, SoC architecture, or a similar role. Proficiency in hardware description languages: Verilog, VHDL, and System Verilog Expertise in EDA tools for IC design and verification: Mentor Graphics, Cadence, or Synopsys Strong und...

Responsibilities: As a Logic design lead in the IBM Systems division, you will be responsible for the microarchitecture design and development of features to meet Secure, high performance low power targets of the Mainframe and / or POWER customers. Deep expertise in the implementation of functional units within the core / cache / Memory controller / Interrupt / crypto / PCIE / DLL ... Good understanding of HW / SW co design / accelerators to enhance system level performance. Collaborate with the Chip development, Unit Verification, Physical design, testgen, millcode teams to develop the feature. Pre-Silicon: Signoff the Design that meets all the functional, area and timing goals. Post Silico...

Job Requirements PD Trainee Engineer Role Summary: We are looking for enthusiastic entry-level engineers to join our VLSI Physical Design (PD) team. As a trainee, you will learn and contribute to various stages of the chip design flow under the guidance of Lead engineers. Key Responsibilities: Assist in physical design activities such as floor planning, placement, clock tree synthesis, routing, and timing closure. Work with senior engineers to run EDA tools for design implementation and verification. Support design checks for power, performance, and area (PPA). Learn industry-standard flows for DRC, LVS, and STA. Document processes and contribute to knowledge sharing within the team. Work Ex...

ASIC Design Verification Engineer - ( SystemVerilog, UVM test bench, C/C++ , Perl/Python scripting, (VCS, DVE, Verdi), TCL/Shell scripting) | 10+ years Meet the Team Join our dynamic front-end design team at Cisco Silicon One, where innovation meets innovative technology! As part of the heart of silicon development at Cisco, you'll engage in every facet of chip design, from architecture to validation, using the latest silicon technologies to create groundbreaking devices. Cisco Silicon One is the only unified silicon architecture that empowers customers to deploy top-tier silicon across diverse applications, from top-of-rack switches to expansive data centres. Be a part of shaping Cisco's pr...

Responsible for software development activities using C# and/or C++ Good debugging skills using C# and/or C++ Acquire and demonstrate technical knowledge of inspector software Participate in end to end product development lifecycle activities Acquire knowledge of key use cases in defect inspection using LS&SWIFT tools Collaborate with teams across different geographical zones to develop / deliver software solutions Being flexible with work timings, attending to technical discussions with business team/peer teams across the globe Work with team leads and groups including systems/hardware, marketing, applications and manufacturing on all aspects of software project including requirement defini...

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Job Summary: The candidate will be responsible for developing and implementing test methodologies, maintaining automatic test suites, creating test specs, and developing automatic test suites for supporting custom routing solutions. He / She will be working closely with R&D, Product Engineering, and Software Release teams in order to enhance the quality of the products. Experience and Technical Skills required: We are looking for a candidate having 3-7 years of experience with sound knowledge in Custom Place & Route Solutions. Good Understanding of DRC/LVS & Analog layout Concepts. M...

Role & responsibilities Description: Performs semiconductor design engineering assignments including engineering and designing chip layout circuits, circuit checking, documenting specifications, modifying and evaluating semiconductor devices and components. Reviews product requirements and logic diagrams for device definition. Typically responsible for projects, or portions of projects, to design, fabricate, modify, and evaluate semiconductor devices and components. 3-5 years of experience Guide and set the direction for the verification effort within your areas of expertise in any project that the team undertakes. Provide verification support to design projects by simulating, analyzing and ...

You Are: You are a visionary engineering leader with a passion for driving innovation in System-on-Chip (SoC) design and integration. You thrive on solving complex challenges and possess a deep understanding of RTL design, verification, and signoff methodologies. Your extensive experience in the semiconductor industry has honed your ability to manage, mentor, and inspire high-performing teams. You are equally comfortable engaging with customers, understanding their requirements, and translating them into technical solutions that deliver tangible business value. Your collaborative spirit allows you to build strong partnerships across cross-functional teams, and you are adept at navigating the...

At Synopsys, you will play a crucial role in driving innovations that have a significant impact on the way people live and connect. The technology developed by Synopsys is at the forefront of the Era of Pervasive Intelligence, contributing to advancements such as self-driving cars and learning machines. As a part of Synopsys, you will be part of a team that leads in chip design, verification, and IP integration, enabling the development of high-performance silicon chips and software content. By joining us, you will have the opportunity to be a part of transforming the future through ongoing technological innovation.,

Serving as the primary technical point of contact for customers, guiding them in deploying Synopsys DFT (Design for Test) technologies on their designs. Planning, directing, and executing project schedules while coordinating cross-functional activities across internal teams and customer organizations. Identifying project risks, developing contingency plans, and ensuring timely escalation and resolution of issues. Collaborating closely with Sales, Marketing, Applications Engineering, and R&D teams to deliver tailored solutions that meet customer requirements. Demonstrating, coaching, and supporting customers with the latest DFT flows, methodologies, and toolsets to enable high-quality, on-tim...

As an Emulation Expert at Synopsys, you will utilize your deep knowledge of IP interfaces such as PCIe and DDR, along with your experience with Zebu, to bridge and close gaps between the available or required Emulation IP feature set and the Design IP verification. Your role will involve reporting metrics, driving improvements in Emulation IP, and ensuring the correct usage and deployment of Emulation IP in verification strategies for both Controller and PHY. Staying ahead of evolving standards, understanding future changes, and driving innovation in defining requirements for IP product development in the context of Emulation will be crucial aspects of your responsibilities. You will review ...

We are looking for technically sound and highly skilled High-speed SERDES IO PHY Layout designer with 9-14 years of experience. Apart from Serdes PHY Layout, the ideal candidate should have a strong background in analog/IO design principles, hands-on experience with layout tools, and a passion for solving challenging technical problems. Key Responsibilities: Develop and optimize Serdes PHY, analog and mixed-signal IC layouts, ensuring high performance and manufacturability. Collaborate with design engineers to understand design requirements and translate them into precise layouts. Strong experience in debugging DRC, ERC, LVS, EMIR and PERC issues independently. Work closely with the physical...

Reviewing SERDES standards and literature to develop novel transceiver architectures and sub-block specifications. Independently and collaboratively working with design teams to conduct rapid studies of design issues, solutions, and trade-offs. Working across analog/digital/layout/hardware functional domains to develop novel solutions to technical challenges. Reviewing and presenting simulation data from internal project teams, and presenting results externally at industry panels or customer reviews. Producing journal articles, technical whitepapers, and patents relating to SERDES IP design innovations. Reviewing silicon data, proposing experiments, identifying root-causes, and proposing bot...

We are seeking a Senior Chip Design Engineer, Formal Verification to join our NVIDIA Networking team. This role offers an exciting opportunity to be part of a dedicated Pre-Silicon design and verification team focusing on cutting-edge Switch and GPU technologies. As a member of our formal verification team, you will utilize state-of-the-art tools and methodologies to ensure design correctness and contribute to revolutionary AI technologies. Our team is at the forefront of delivering top-notch Chips solutions for various markets including HPC, AI infrastructures, data-center, network, and storage. Your responsibilities will include utilizing formal verification algorithms to prove the correct...

Partnering with Synopsys customers to define RTL signoff and design scopes, ensuring alignment with project objectives. Analyzing design complexity and requirements to propose optimal resource allocation for successful project delivery. Leading engineering teams in executing pre-silicon static verification activities on IPs and subsystems. Developing and refining timing constraints for synthesis and timing, based on design architecture and requirements. Collaborating with peers to enhance methodologies, driving improvements in execution efficiency and project quality. Adopting and mastering new RTL design and static verification tools/methodologies using Synopsys products for customer enable...

Engaging directly with Synopsys customers to understand verification needs and define project scope and activities. Developing and implementing system design solutions using Synopsys EDA tools and IP. Leading a team of engineers in executing pre-silicon verification activities for IPs and subsystems. Anticipating technical challenges and risks, and formulating effective resolution and mitigation plans. Mentoring and coaching team members to enhance their technical capabilities and performance. Reviewing results and reports to provide constructive feedback, driving continuous improvement in quality. Reporting project status to management and recommending solutions to address execution issues....

Engage with Synopsys customers to understand verification needs and define project scopes and deliverables. Lead and mentor a team of engineers to execute pre-silicon verification activities on complex IPs and subsystems. Develop verification plans, resource requirements, and risk mitigation strategies to ensure successful project execution. Review results and reports, providing continuous feedback to enhance quality and efficiency. Report status to management, offering insights and solutions for potential project challenges. Collaborate with architects, designers, and pre/post-silicon teams to achieve verification goals. Ramp-up on new verification tools and methodologies, leveraging Synops...

Engage with Synopsys customers to understand verification needs and define project scopes and deliverables. Lead and mentor a team of engineers to execute pre-silicon verification activities on complex IPs and subsystems. Develop verification plans, resource requirements, and risk mitigation strategies to ensure successful project execution. Review results and reports, providing continuous feedback to enhance quality and efficiency. Report status to management, offering insights and solutions for potential project challenges. Collaborate with architects, designers, and pre/post-silicon teams to achieve verification goals. Ramp-up on new verification tools and methodologies, leveraging Synops...

Designing, developing, and testing bare metal firmware for high-speed mixed-signal IP blocks, focusing on NRZ and PAM-based SerDes products. Collaborating closely with digital and mixed-signal design teams to define specifications, implement RTL designs, and validate performance on prototype test-chips. Executing structured firmware development, verification, and documentation processes to ensure robust and maintainable solutions. Driving projects from initial concept to successful completion, including functional and performance testing on silicon. Interfacing with cross-functional groups and customer support teams to resolve technical issues and deliver exceptional support. Utilizing scrip...

Conceptualizin g, designing, and productizing state-of-the-a rt circuit components for SLM monitors realized through ASIC design flow. Designing on-chip Process, Voltage, Temperature, glitch, and Droop monitors for monitoring silicon biometrics. Developing statistical simulation methodologies and collaborating with the layout team to achieve optimal design solutions. Characterizing designed custom cells and deploying new circuits into test chips for post-silicon characterizati on. Creating new cells and updating existing ones through collaboration with architects and Physical Design engineers. Conducting pre and post-layout simulations and characterizati ons across various design corners to ...