187 Chip Design Jobs

Real trendsetters in every language. Before our software developers write even a single line of code, they have to understand what drives our customers. What is the environment and the user story based onImplementation means trying, testing, and improving outcomes until a final solution emerges. Knowledge means exchange discussions with colleagues from all over the world. Join our team and enjoy the freedom to think in completely new categories. Be an integral part of a team that is developing comprehensive verification IPs for interfaces such as PCIe Gen5/Gen6, USB3.2, 400Gigabit Ethernet, DDR5, LPDDR5 and leading coherency protocols like CXL for use with Questa RTL simulation. We make real what matters. This is your role! Questa verification IP’s help design teams find more bugs in less time than conventional simulation techniques. You will specify, implement, test and improve these verification components for a wide range of end user applications. You will work on technologies involving SV, UVM, Assertions, Coverage, Test plan, BFM design, debug, and logger. You will cooperate with TMEs and Field AEs or directly with customers to deploy or resolve customer issues. We don’t need superheroes, just super minds We seek a graduate with an Electronics Engineer (B.Tech/ M.Tech) or related field from a reputed institute Phenomenal knowledge of verification engineering and have between 2 - 8 years of working experience as well. We value sound knowhow of System Verilog for test bench with exposure to verification methodologies like UVM, VMM etc. Knowledge of one or more standard bus protocols, like PCIe, USB, SATA, NVMe, Flash, DIMM etc. You are a phenomenal teammate, resilient and candid, Enjoy learning new things and build knowledge base in new area. We’ve got quite a lot to offer. How about you This role is based in Noida but you’ll get the chance to work with teams impacting entire cities, countries – and the shape of things to come. The pace of innovation in electronics is constantly accelerating. To enable our customers to deliver life-changing innovations to the world faster and to become market leaders, we are committed to delivering the world’s most comprehensive portfolio of electronic design automation (EDA) software, hardware, and services. We, at Siemens EDA enable companies to develop better electronic products faster and more efficiently. Our innovative products and solutions help engineers conquer design challenges in the increasingly sophisticated worlds of board and chip design We will ensure that individuals with disabilities are provided reasonable accommodation to participate in the job application or interview process, to perform crucial job functions, and to receive other benefits and privileges of employment. Please contact us to request accommodation. #LI-EDA #LI-Hybrid

As a Logic design Engineer in the IBM Systems division, you will be responsible for the microarchitecture design and development of features to meet Secure, high performance & low power targets of the Mainframe and / or POWER customers. Deep expertise in the implementation of functional units within the core / cache / Memory controller / Interrupt / crypto / PCIE / DLLAdditional responsibilities:logic (RTL) design, timing closure, CDC analysis etc.Understand and Design Power efficient logic.Agile project planning and execution.Masters in VLSI with demonstrated experience in the micro architecture and design of state of art Processor features to enhance high performance secure system performance. Required education Bachelor's Degree Preferred education Master's Degree Required technical and professional expertise Minimum 5+ years of experience in Chip design and development. Understand CPU / GPU / RISC V architectures. Expertise in one of the architecture and design of Core units (Fetch, Decode, arithmetic units -adders, multipliers, L1/L2/L3 cache , Mem , IO ) Understand RISC V core Experience with VLSI Design in VHDL / Verilog

As a Logic design lead in the IBM Systems division, you will be responsible for the microarchitecture design and development of features to meet Secure, high performance & low power targets of the Mainframe and / or POWER customers. Deep expertise in the implementation of functional units within the core / cache / Memory controller / Interrupt / crypto / PCIE / DLL Additional responsibilities: logic (RTL) design, timing closure, CDC analysis etc. Understand and Design Power efficient logic. Agile project planning and execution. Masters in VLSI with demonstrated experience in the micro architecture and design of state of art Processor features to enhance high performance secure system performance. Required education Bachelor's Degree Preferred education Master's Degree Required technical and professional expertise Minimum 8+ years of experience in Chip design and development. Understand CPU / GPU / RISC V architectures. Expertise in one of the architecture and design of Core units (Fetch, Decode, arithmetic units -adders, multipliers, L1/L2/L3 cache , Mem , IO ) Understand RISC V core Experience with VLSI Design in VHDL / Verilog

NVIDIA has continuously reinvented itself. Our invention of the GPU sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. Today, research in artificial intelligence is booming worldwide, which calls for highly scalable and massively parallel computation horsepower that NVIDIA GPUs excel. NVIDIA is a learning machine that constantly evolves by adapting to new opportunities that are hard to solve, that only we can address, and that matter to the world. This is our life s work , to amplify human creativity and intelligence. As an NVIDIAN, you ll be immersed in a diverse, supportive environment where everyone is inspired to do their best work. Come join our diverse team and see how you can make a lasting impact on the world! Design-for-Test Engineering at NVIDIA works on groundbreaking innovations involving crafting creative solutions for DFT architecture, verification, and post-silicon validation on some of the industrys most complex semiconductor chips. What youll be doing: As an integral member in our team, you will work on exploring Applied AI solutions for DFX and VLSI problem statements. Architect end-to-end generative AI solutions with a focus on LLMs, RAGs Agentic AI workflows. Work on deploying predictive ML models for efficient Silicon Lifecycle Management of NVIDIAs chips. Collaborate closely with various VLSI DFX teams to understand their language-related engineering challenges and design tailored solutions. Partner closely with cross-functional AI teams to provide feedback and contribute to the evolution of generative AI technologies. Work closely with DFX teams to integrate Agentic AI workflows into their applications and systems and stay abreast of the latest developments in language models and generative AI technologies. Define how data will be collected, stored, consumed and managed for next-generation AI use cases. You will also help mentor junior engineers on test designs and trade-offs including cost and quality. What we need to see: BSEE or MSEE from reputed institutions with 2+ years of experience in DFT, VLSI Applied Machine Learning Experience in Applied ML solutions for chip design problems Significant experience in deploying generative AI solutions for engineering use cases Good understanding of fundamental DFT VLSI concepts - ATPG, scan, RTL clocks design, STA, place-n-route and power Experience in application of AI for EDA-related problem-solving is a plus Excellent knowledge in using statistical tools for data analysis insights Strong programming and scripting skills in Perl, Python, C++ or TCL desired Strong organization and time management skills to work in a fast-pace multi-task environment Self-motivated, independent, ability to work independently with minimal day-to-day direction Outstanding written and oral communication skills with the curiosity to work on rare challenges NVIDIA offers highly competitive salaries and a comprehensive benefits package. We have some of the most brilliant and talented people in the world working for us and, due to unprecedented growth, our world-class engineering teams are growing fast. If youre a creative and autonomous engineer with real passion for technology, we want to hear from you! #LI-Hybrid

NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. It s a unique legacy of innovation that s fueled by great technology and amazing people. Today, we re tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self-driving cars that can understand the world. Doing what s never been done before takes vision, innovation, and the world s best talent. As an NVIDIAN, you ll be immersed in a diverse, supportive environment where everyone is inspired to do their best work. Come join the team and see how you can make a lasting impact on the world. As part of the CAD team our engineers develop and support tools for all of NVIDIAs semiconductor products. In addition, they also develop in-house tools in the area of Design for Test (DFT) and Design for Power (DFP) using C++, Python, and TCL. Below are some of the some of the teams activities. We are a diverse team needing someone who is not afraid of a challenge. If this is you, come join us today. What you ll be doing: Develop CAD software for high performance chip design and verification. Develop design and verification methodology for VLSI. Work on next generation software infrastructure for scalable development. Deploy AI into our work flows What we need to see: BS or Master degree of Electrical Engineering/Computer Engineering/Computer Science or equivalent experience 2+ years of relevant work experience. Skill of script language, such as Python/Perl/TCL. Software engineering: software design, algorithms, and QA. Familiar with C++ is a plus. Ways to stand out from the crowd: Familiar with Verilog. Experiences in CAD software developments. Knowledge or experience with DFT, DFP is a plus. Familiar with Verilog, VLSI and ASIC design principles, including knowledge of logic cells. Knowledge of GenAI, LLM, AI Code Generation is a plus. NVIDIA is widely considered to be one of the technology world s most desirable employers. We have some of the most forward-thinking and hardworking people in the world working for us. Are you a creative and autonomous engineer who loves a challengeCome join our GPU Verification team and help us build future interconnect architectures that will continue to drive us forward in the fields of High Performance Computing, Graphics and AI. We will ensure that individuals with disabilities are provided reasonable accommodation to participate in the job application or interview process, to perform essential job functions, and to receive other benefits and privileges of employment. Please contact us to request accommodation. #LI-Hybrid

You are a seasoned Full Stack Engineer with a passion for developing innovative software solutions. With a strong background in both front-end and back-end technologies, you thrive in dynamic environments where you can leverage your expertise to drive impactful projects. You possess a deep understanding of modern UI technologies such as React, Node.js, and Bootstrap, paired with robust programming skills in HTML, JavaScript, and CSS. Your proficiency in Java or Python, combined with a solid grasp of RDBMS concepts and SQL, makes you a versatile asset to any team. Your ability to quickly adapt to new technologies and understand user interactions allows you to create intuitive and efficient user experiences. You are a collaborative team player who excels in cross-functional environments, bringing alignment on goals and ensuring high-quality software development and deployment. Your experience with enterprise message buses like Kafka and backend database technologies such as Redis, MongoDB, and ElasticSearch is a strong plus. You are driven by the desire to continuously learn and contribute to the success of cutting-edge projects. What you'll Be Doing: Implement new features and corresponding UI pages in nightly regression results tracking and visualization tool. Develop new dashlets in the R&D Dashboard to make it a one-stop portal for all quality/tracking data. Collaborate with the team to port existing UI applications to a new architecture currently under development. Work with the team to implement features and new UI widgets in a homegrown UI framework/library. Ensure software gets developed and deployed on-time with high quality. Quickly learn and adapt to new technologies introduced as part of future initiatives. The Impact You Will Have: Improve the quality and productivity of EDA products. Enhance the development of profiling and telemetry solutions scalable across Synopsys product portfolios. Ensure the timely delivery of high-quality software solutions. Drive innovation in software engineering practices and technologies. Contribute to the alignment of goals across teams and organizations. Shape the future of software development in high-tech environments. What you'll Need: Bachelors or Masters degree in computer science, engineering, or a related field. 3 to 8 years of experience in software/application development. Strong programming skills in HTML, JavaScript, and CSS. Proficiency in modern UI technologies such as React, Node.js, Bootstrap, and JQuery. Must have strong programming skills in either Java or Python. Must have a strong understanding of RDBMS concepts and a solid working knowledge of SQL. Candidate should also have the aptitude for understanding user interactions and adjusting the UX based on the user-flows. Working knowledge of enterprise message bus such as Kafka is a strong plus

Are you looking for a unique opportunity to be a part of something great? Want to join a 20,000-member team that works on the technology that powers the world around us? Looking for an atmosphere of trust, empowerment, respect, diversity, and communication? How about an opportunity to own a piece of a multi-billion dollar (with a B!) global organization? We offer all that and more at Microchip Technology, Inc. People come to work at Microchip because we help design the technology that runs the world. They stay because our culture supports their growth and stability. They are challenged and driven by an incredible array of products and solutions with unlimited career potential. Microchip s nationally-recognized Leadership Passage Programs support career growth where we proudly enroll over a thousand people annually. We take pride in our commitment to employee development, values-based decision making, and strong sense of community, driven by our Vision, Mission, and 11 Guiding Values ; we affectionately refer to it as the Aggregate System and it s won us countless awards for diversity and workplace excellence. Our company is built by dedicated team players who love to challenge the status quo; we did not achieve record revenue and over 30 years of quarterly profitability without a great team dedicated to empowering innovation. People like you. Visit our careers page to see what exciting opportunities and company perks await! Job Description: Candidate will join the custom circuit design team to execute the design of IOs/Analog/Mixed signal circuits & their integration into FPGA. Requirements/Qualifications: Experience Required in Few/all of the following design areas High Speed IO design and analysis in FPGA/SoC DDR/LPDDR design and Analysis Experience in General purpose IOs in different technologies Good understanding of ESD and Latch up Good Understanding of DDR timing and ODT functionality Experience in Signal/Power integrity simulations Voltage detectors, Current mirrors & voltage regulators Power on Reset circuits Simultaneous switching Noise and Jitter simulation. The IO design Group Is Responsible For Perform feasibility studies including idea creation; develop specification, design, and verification of the IOs. Write IP specifications, verification plans, and documentation Generate test bench and automatic regression plans Responsible for simulations, verifications, help in silicon bring up and characterization of IOs Candidate will be responsible for interface collaborate with and support multiple groups in organization Candidate may be expected to support customer questions and help in resolving the issues Required Skills and Experience: 5-8 years of related work experience. Good Knowledge in Circuit design and circuit analysis Experience in FinFet technology. Good knowledge of IC chip design, development flow, process, and methodology Good understanding of CMOS device operation and characteristics Must have circuit simulation experience using Cadence, Spectre, HSPICE , or equivalent tools Experience in running Solido variation designer Experience with UNIX shell scripting or Perl scripting Experience with SOC tools such as mixed signal simulators and Cadence Virtuoso is required Excellent written and verbal communication in English Good analytical and problem-solving skills Experience in silicon validation Must be familiar with layout parasitic extraction tools and layout dependent impairments in advanced CMOS processes Must be able to work independently, create and adhere to schedules Travel Time: 0% - 25% To all recruitment agencies : Microchip Technology Inc. does not accept unsolicited agency resumes. Please do not forward resumes to our recruiting team or other Microchip employees. Microchip is not responsible for any fees related to unsolicited resumes.

Technical Manager role requiring 15+ years of experience of Digital design in Analog Mixed signal ICs for developing Power Management ICs as part of 2. 6B$ Power Business Unit at Renesas. Primary responsibilities include leading team which will fully own defining the microarchitecture to developing all Digital components of power management ICs, starting from System requirements. Due to the complex nature of Chips and significant Analog as well as Digital contents, collaboration with cross-functional teams to ensure successful integration of Digital and Analog components in ICs, is a must. The candidate will work on a wide range of exciting and cutting edge PMICs, including Linear and Switching DC-DC converters powering the next generation of most sought-after phones and handheld devices. This is an early-stage growth opportunity where in the candidate will get to learn, build and over time contribute and influence the charter for Renesas s massive Power product portfolio. Essential Functions: Manage the Digital Design team in terms of costs, methods and staffing to support device/silicon design requirements and to meet design deadlines as set by the program schedule. Mentor direct reports, giving appropriate guidance and support, and reviewing technical and behavioural performance regularly Must have experience of defining Dig-Ana boundary and Digital design scope for Power Management ICs/Analog intensive ICs Must have experience of defining the micro-architectures and sub-blocks for the ICs to ensure optimized Digital design, RTL design and Gate level netlist etc. Must be aware of Power Sensitive digital design and doing Power estimation for the Digital I/Ps Must be able to handle Clock Domain Crossing across multiple clock domains seamlessly and in a glitch free manner. Should be able to lead/collaborate for Logic Synthesis, Formal verification, Power estimation and STA. Should have experience of OTP, MTP, Efuse read/writes, controller design and data bus handling, Register read/write, Trimming of Analog parts/functions, DFT architecture and integration. Should be able to create Sequences (including Power UP/Down) and State Machines and Transitions to/from any state to another based on the IC requirements. Should be an expert of one or more Power Chip Communication I/Ps and protocols e. g. I2C, PMBUS, SVI3, SVID etc. Should be able to implement and analyse filters feedback loops in Digital, conversant with Z-domain analysis. Must have done multiple silicon debugs, root cause analysis of issues, design to silicon correlation etc. Should understand commonly used control loop architectures (Constant Freq, Constant ON/OFF Time, Current mode etc) and pros/limitations of each. Must be able to bring in innovative ideas to improve designs to meet challenging specifications and achieve better system performance. Should be able to setup Digital design flows and methodologies including checklists, reviews to ensure quality designs and take them all the way to Silicon success. Qualifications Bachelor s or master s degree in electrical engineering 15+ years in Digital Design and experience of working on Mixed Signal ICs, especially PMICs. Solid understanding and design experience of complex AMS designs. Chip design, Verification, Silicon validation, debugs, Qual support and taking ICs to production. Must be a technical leader, people manager team player, mentor and should strive towards fostering a highly creative and productive working environment Collaboration with Senior leadership to develop team objectives in accordance with wider company strategy. Ability to work with Senior Management to develop and work to budget. Cross cultural awareness and sensitivity. Results-oriented and able to deliver on-time under tight schedule pressure. Company Description Renesas is one of the top global semiconductor companies in the world. We strive to develop a safer, healthier, greener, and smarter world, and our goal is to make every endpoint intelligent by offering product solutions in the automotive, industrial, infrastructure and IoT markets. Our robust product portfolio includes world leading MCUs, SoCs, Analog and power products, plus Winning Combination solutions that curate these complementary products. We are a key supplier to the world s leading manufacturers of electronics you rely on every day; you may not see our products, but they are all around you. Renesas employs roughly 21, 000 people in more than 30 countries worldwide. As a global team, our employees actively embody the Renesas Culture, our guiding principles based on five key elements: Transparent, Agile, Global, Innovative, and Entrepreneurial. Renesas believes in, and has a commitment to, diversity and inclusion, with initiatives and a leadership team dedicated to its resources and values. At Renesas, we want to build a sustainable future where technology helps make our lives easier. Join us and build your future by being part of what s next in electronics and the world.

Looking for a 10+ years experienced Engineer with in-depth understanding of Analog concepts, experience of from scratch design of complex Analog I/Ps sub-blocks, integrating I/Ps and sub systems and ownership, experienced of fully owning smaller ICs (Point of loads, Single Converters) and owning major I/Ps in large PMICs, to join the 2. 6B$ Power Business Unit. The candidate will get to work on a wide range of exciting products such as PMICs, Linear and Switching DC-DC converters powering the next generation of most sought-after phones and handheld devices. This is an early-stage growth opportunity where in the candidate will get to learn, build and over time contribute and influence the charter for Renesas s massive Power product portfolio. Essential Functions: Must be proficient in designing and owning complex I/Ps like +ve/-ve Charge Pumps, Source-Sink LDOs, Ultra-low power Oscillators (including Relaxation type), Temperature Sensor, Current Sense, SAR ADCs, House Keeping blocks, Protection (Thermal, Under-Voltage, Over-Voltage, Over Current etc) and analog blocks including Bandgap references, V2I, Analog Buffers, Op-Amps, Comparators, High speed level shifters etc. Thorough understanding of Switch Cap circuits will be advantageous. Must have in-depth Understanding of and should be able to Implement Compensate the Control Loops, Analog feedback loops and should know trade-offs between various compensation strategies. Should be able to build/support Block level spec break down from Top level chip requirements and independently own, design complete switching converter e. g. Buck, Boost, Buck-Boost etc and LDOs. Must be able to do block level error budgeting depending on the block requirements. Must be aware of relative differences of various control loop architectures (Constant Freq, Constant ON/OFF Time, Current mode etc) and decide/implement the best option to meet converter level performance specifications and other system requirements. Must be able to bring in innovative ideas to improve designs to meet challenging specifications. Should have in-depth knowledge of Analog layouts and be able to work closely with layout lead from floor planning till Chip Top completion and verification and do trade-offs based on desired performance Must be conversant with the standard design, extraction and simulation flows tools, speed, convergence, accuracy trade-offs and should be able to optimize setups based on Pre/Post (with/without) Parasitic using simulator options, debug and navigate through tool related challenges. Should be able to setup design flows and methodologies including checklists, reviews to ensure quality designs and take them all the way to Silicon success. Should be able to mentor Freshers and Junior engineers for upscaling their technical skills as well as other skills needed for better efficacy. Should have experience of end-to-end IC development flow, Silicon debugs, and taking ICs to production Should be able to lead a small group of Engineers and navigate through all stages of IC development while handling and mitigating challenges, ensuring high quality silicon while adhering to the schedules based on business needs. Should have in-depth understanding of ESD, LU and other IC level issues and be able to define protection for the I/O ring for the IC Qualifications Bachelor s or master s degree in electrical engineering 10+ years in Analog Circuit Design, Simulation and Verification Solid understanding and design experience of complex analog designs with full ownership. Chip design, Verification, Silicon validation, debugs, Qual support and taking ICs to production. Must be a natural team player, mentor and strive towards fostering a highly creative and productive working environment Company Description Renesas is one of the top global semiconductor companies in the world. We strive to develop a safer, healthier, greener, and smarter world, and our goal is to make every endpoint intelligent by offering product solutions in the automotive, industrial, infrastructure and IoT markets. Our robust product portfolio includes world leading MCUs, SoCs, Analog and power products, plus Winning Combination solutions that curate these complementary products. We are a key supplier to the world s leading manufacturers of electronics you rely on every day; you may not see our products, but they are all around you. Renesas employs roughly 21, 000 people in more than 30 countries worldwide. As a global team, our employees actively embody the Renesas Culture, our guiding principles based on five key elements: Transparent, Agile, Global, Innovative, and Entrepreneurial. Renesas believes in, and has a commitment to, diversity and inclusion, with initiatives and a leadership team dedicated to its resources and values. At Renesas, we want to build a sustainable future where technology helps make our lives easier. Join us and build your future by being part of what s next in electronics and the world.

About Marvell . Your Team, Your Impact The Lab Endpoint Security Engineer will be responsible for designing, implementing, and maintaining security solutions to protect the confidentiality, integrity, and availability of our semiconductor lab environments. This role requires developing and implementing security policies, conducting vulnerability and risk assessments, and deploying risk reducing solutions to our labs. The ideal candidate has a strong understanding of lab workflows, embedded systems, and security practices tailored for high-value intellectual property (IP) environments. What You Can Expect Design and implement physical and logical access control systems in engineering labs Harden lab endpoints, test stations, and development tools against unauthorized access or tampering Ensure secure remote access and segmentation of lab environments from corporate IT Collaborate with IT, facilities, and engineering teams to align security with operational needs Define, deploy, and monitor lab-specific security policies (e. g. , USB restrictions, debug interface controls) Conduct risk assessments and remediation for lab infrastructure, equipment, and data flows Support monitor of lab networks for abnormal activity and enforce security event response workflows Assist in compliance audits and secure handling of sensitive data (e. g. , chip design files, firmware) Collaborate with the vulnerability management team to implement workflows for lab assets, including scanning, triage, patch coordination, and remediation tracking Collaborate with engineering to assess the impact of vulnerabilities on proprietary development tools or lab-built systems Fine tuning, configuration, administration, and management of the endpoint security platforms/solutions. Work with IT endpoint teams to manage Add/remove/Changes and troubleshoot issues related to endpoint security tools What Were Looking For Minimum 5+ years in security engineering, preferably in semiconductor, RD, or high-tech manufacturing environments. 3+ years proven experience with managing endpoint protection platforms Familiarity with lab tools, embedded development, and secure firmware practices Experience with vulnerability scanning tools and secure lab configuration management Working knowledge of regulatory frameworks (e. g. , ISO 27001, NIST 800-171) Experience securing remote access using VPN, ZTNA, or jump-host architectures Understanding of secure boot, code signing, and firmware integrity validation for embedded devices Ability to analyze endpoint telemetry from EDR solutions (e. g. , CrowdStrike, SentinelOne) in lab environments Experience managing vulnerability lifecycle processes and risk-based remediation planning for lab endpoints and test systems Experience in scripting languages such as Python, PowerShell, Bash, Perl, Jscript, and knowledge of regular expressions. Experience with administrating a diverse set of physical and virtual platforms, including MS Windows, Linux, and macOS. Ability to maintain, test, and troubleshoot endpoint protection policies and rules. Strong analytical and problem-solving abilities, with attention to detail. Ability to prioritize, drive others to action, deliver results, mentor and develop technical skills in team. Excellent communication and collaboration skills, with the ability to work effectively in a team environment. Ability to work independently and prioritize tasks in a fast-paced, dynamic environment. Bachelors degree in Computer Science, Information Technology, Cybersecurity, or related field or equivalent experience Relevant cybersecurity certifications such as CISSP, GIAC, or equivalent Additional Compensation and Benefit Elements With competitive compensation and great benefits, you will enjoy our workstyle within an environment of shared collaboration, transparency, and inclusivity. We re dedicated to giving our people the tools and resources they need to succeed in doing work that matters, and to grow and develop with us. For additional information on what it s like to work at Marvell, visit our Careers page. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status. #LI-RS1

Provide technical support to customers, FAEs, module partners and distributors through digital channels to customers to use Infineon Wi-Fi connectivity chips during evaluation and development phase of their application. You will also assist in selection, evaluation and integration of Infineon Wi-Fi products Recreate, debug and solve the technical issues reported by customers at any time during the life cycle of Wi-Fi connectivity chips. Work cross functionally with product line applications, marketing, hardware design, chip design, software and content development teams to solve issues reported by customers Develop collaterals (code examples, application notes, knowledge articles) for customers. Prepare and deliver product/application training to peers and customers. Your Profile Bachelors/Masters in Electrical / Electronics / Electronics and Communication Engineering or related degree. 3+ years experience working on Wi-Fi products as an application engineer. Good knowledge on Wi-fi protocol and its working. Experience in debugging and fix issues at application or firmware level of Wi-Fi Ability to conduct investigative research to identify and resolve customers technical issues. Experience in writing and debugging software in C/C++ or any other high-level languages. Exposure to embedded systems and/or Linux, Python, scripting will bean added advantage. Experience in using tools like Oscilloscope, multi-meter, function generator, spectrum analyser etc Interest and ability to learn new technologies very quickly. Good communication skills, both written and verbal. A customer-oriented mindset and focus on innovative, scalable methods to make customers self-sufficient

Qualifications and Preferred Skills: BS, MS in Electrical Engineering, Computer Engineering or Computer Science. 8+ years and current hands-on experience in microarchitecture and RTL development . Proficiency in Verilog, System Verilog . Familiarity with industry-standard EDA tools and methodologies. Experience with large high-speed, pipelined, stateful designs, and low power designs. In-depth understanding of on-chip interconnects and NoC's. Experience within Arm ACE/CHI or similar coherency protocols. Experience designing IP blocks for caches, cache coherency, memory subsystems, interconnects and NoC's. Familiarity with RAS designs, QoS in fabrics, PCIe/IO is a plus. Experience with modern programming languages like Python is a plus. Excellent problem-solving skills and attention to detail. Strong communication and collaboration skills.

Application Engineering, Sr.Engineer Bengaluru, Karnataka, India Engineering Employee Apply Save Job Share Email LinkedIn X Facebook Jump to Overview Job Description Benefits Culture How We Hire Overview Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products. These engineers play a crucial role in advancing technology and enabling innovations in various industries. Play Video Job Description Category Engineering Hire Type Employee Job ID 10306 Remote Eligible No Date Posted 27/03/2025 Alternate Job Titles: Transistor Level Verification Engineer Custom Design Verification Engineer We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: A motivated, self-starter Application Engineer with a passion for custom circuit verification and technology. You have a strong technical background in engineering, particularly in the field of transistor-level custom design verification. You excel at understanding circuits at the SPICE netlist level and design descriptions in Verilog/System Verilog. Your knowledge of transistor-level design and simulation in MOSFET technology sets you apart. You thrive in both independent and collaborative settings and have excellent communication skills that enable you to discuss, collaborate, and present product information effectively. Ideally, you also have experience in memory design and verification, which enhances your ability to support our industry-leading ESP equivalence check product. What You ll Be Doing: Working closely with customers to understand their requirements in verifying custom design IP. Tailoring solutions to address challenging verification scenarios for custom designs. Collaborating with the product team to define, test, and deploy new features. Providing technical support and expertise on Synopsys ESP equivalence check product. Conducting product demonstrations and training sessions for customers and partners. Developing and maintaining technical documentation and application notes. The Impact You Will Have: Enhancing customer satisfaction through effective technical support and custom solutions. Driving the adoption and integration of Synopsys ESP equivalence check product. Contributing to the continuous innovation and development of new product features. Ensuring the highest quality of custom designs by catching elusive corner case design inconsistencies. Building strong relationships with customers and fostering long-term collaborations. Expanding Synopsys market presence through successful customer engagements. What You ll Need: Bachelor s or Master s degree in Engineering/Technology (Electronics/Electrical or related field). 1-2 years of experience in custom design verification. Understanding of circuits at SPICE netlist level and design description in Verilog/System Verilog. Knowledge of transistor-level design and simulation in MOSFET technology. Excellent written and oral English communication skills. Who You Are: A proactive and driven individual with a keen interest in custom circuit verification. You are a team player who enjoys both independent and collaborative work environments. Your strong communication skills enable you to convey technical concepts effectively. You are adaptable, detail-oriented, and thrive in a fast-paced, dynamic environment. Your commitment to continuous learning and improvement drives your success in the field of application engineering. The Team You ll Be A Part Of: You will be a key member of our ESP team, which focuses on developing a differentiated custom equivalence check solution. Our team is dedicated to constant innovation and developing new capabilities to meet the evolving needs of our customers. We collaborate closely with R&D and product engineering to define, test, and deploy new features, ensuring our technology remains at the forefront of the industry. Join our diverse and dynamic team to drive innovative technical solutions and contribute to the success of our advanced features portfolio. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability. Apply Save Job test Share Email LinkedIn X Facebook Benefits At Synopsys, innovation is driven by our incredible team around the world. We feel honored to work alongside such talented and passionate individuals who choose to make a difference here every day. Were proud to provide the comprehensive benefits and rewards that our team truly deserves. Visit Benefits Page Health & Wellness Comprehensive medical and healthcare plans that work for you and your family. Time Away In addition to company holidays, we have ETO and FTO Programs. Family Support Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more. ESPP Purchase Synopsys common stock at a 15% discount, with a 24 month look-back. Retirement Plans Save for your future with our retirement plans that vary by region and country. Compensation Competitive salaries. ** Benefits vary by country and region - check with your recruiter to confirm Get an idea of what your daily routine around the office can be like Explore Bengaluru View Map Hiring Journey at Synopsys Apply When you apply to join us, your resume, skills, and experience are first reviewed for consideration. Phone Screen Once your resume has been selected, a recruiter and/or hiring manager will reach out to learn more about you, share more about the role, and answer any questions you might have. Interview Next up is interviewing (in person or virtual). You ll be invited to meet with members of the hiring team to discuss your skills and experience, and what you re looking for in your next role. Offer Congratulations! When you have been selected for the role, your recruiter will reach out to make you a verbal offer (a written offer will follow your conversation), and we hope you accept! Onboarding There will be some steps you need to take before you start to ensure a smooth first day, including new hire documentation. Welcome! Once you ve joined, your manager, team, and a peer buddy will help you get acclimated. Over the next few weeks, you ll be invited to join activities and training to help you ramp up for a successful future at Synopsys!

Staff Software Engineer (R&D Engineering) Bengaluru, Karnataka, India Apply Now Save Category: Engineering Hire Type: Employee Job ID 9817 Date posted 06/02/2025 Share this job Email LinkedIn X Facebook We are looking for a motivated R&D Engineer to join our team! As a member of the Formality R&D team, you will work with other enthusiastic and creative engineers. You will contribute to a growing tool where you can expand your knowledge and skills. Things youll learn include formal verification strategies, distributed computing, machine learning, and more. Key Responsibilities: As part of the team, design, develop and drive improvements to the verification technology Support the existing functionality and continually aim to enhance the versatility, performance and memory utilization while improving quality of the software. Work requires algorithm, data structure design as well as developing robust and efficient implementations. Interact with other members of Synopsys R&D, customer as necessary to understand customer needs and product goals. Skills Required: A minimum of 8 years of related experience. Excellent Software development experience with C / C++ on UNIX/Linux platforms Broad understanding of data structures, algorithms and their applications. Should have experience working in a multi-person product development environment with high dependencies and tight schedules. It is essential that the applicant is highly motivated and has solid desire to learn and explore new technologies. Demonstrated history of good analytical, debugging and problem-solving skills. Experience with complex software tool development and usage with legacy code base Exercise of judgment in developing methods, techniques, and evaluation criteria to meet project goals. Ability to work in both self-directed and collaborative settings. Understanding/Experience in Unified Power Format (UPF) would be beneficial Good written and oral communication skills, for team collaboration and product presentations. Preferred Skills: Special consideration given to those with background and experience in formal verification and/or synthesis techniques. Experience in Compilers and RTL Synthesis would be beneficial Knowledge of software specification and design process, and regression testing. Ability to know about customer wants and needs in the formal verification user community, by working with sales and field personnel. Product and team information: Formality is a formal verification product that checks combinational equivalence between two different representations of a design. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability. Apply Now Save Relevant Jobs Engineering, Sr Staff Engineer Noida, India Engineering Engineering, Staff Engineer Noida, India Engineering Application Engineering, Sr.Engineer Bengaluru, India Engineering

Application Engineering, Staff Engineer Bengaluru, Karnataka, India Engineering Employee Apply Save Job Share Email LinkedIn X Facebook Jump to Overview Job Description Benefits Culture How We Hire Overview Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products. These engineers play a crucial role in advancing technology and enabling innovations in various industries. Play Video Job Description Category Engineering Hire Type Employee Job ID 9446 Remote Eligible No Date Posted 13/02/2025 Alternate Job Titles: SPICE/FastSPICE Simulation Engineer Custom Compiler Frontend Engineer Senior Application Engineer - SPICE Simulation We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are an experienced engineer with a deep understanding of SPICE/FastSPICE simulation and custom compiler frontend applications. You excel at problem-solving and have a strong background in designing and verifying analog circuits, including clocking circuits and data converters. You are proficient in memory design and have a solid grasp of competitive EDA tools in digital, analog, and mixed-signal design and verification. Your exceptional communication and presentation skills enable you to interface effectively with customers and R&D teams. Your proactive approach and project management expertise make you a valuable asset in driving business growth and technical innovation. With your advanced degree and extensive experience, you are ready to tackle complex technical challenges and contribute to the success of Synopsys. What You ll Be Doing: Providing technical support to customers for SPICE/FastSPICE simulation and custom compiler frontend applications. Collaborating with Sales, R&D, Product Application Engineers, and Marketing to drive business growth. Understanding customer requirements and exploring business opportunities. Creating simulation flows and debugging technical issues. Leading technical benchmarks and customer engagements. Writing customer requirement specifications and conducting product training sessions. The Impact You Will Have: Enhancing customer satisfaction and loyalty through exceptional technical support. Driving the adoption and successful implementation of SPICE/FastSPICE simulation and custom compiler solutions. Improving product usability and performance based on customer feedback and insights. Fostering strong relationships with customers and understanding their needs and challenges. Collaborating with R&D teams to influence product development and innovation. Contributing to Synopsys reputation as a leader in technology and innovation. What You ll Need: Design and verification experience in clocking circuits (PLLs), data converters (ADCs, DACs), and other analog circuits. Experience in memory design and verification of SRAM, SRAM compilers, DRAM, Flash, or other non-volatile memories. Knowledge of competitive EDA tool products in digital, analog, and mixed-signal design and verification. Proficiency in English for written and verbal communication. Excellent communication, presentation, problem-solving, and project management skills. BSEE or equivalent with 8+ years of relevant experience, or MS/Ph.D. with 6+ years of relevant experience. Who You Are: Collaborative and team-oriented, with strong interpersonal skills. Proactive and self-motivated, with a strong sense of ownership and responsibility. Detail-oriented and meticulous, with a focus on delivering high-quality solutions. Adaptable and flexible, with the ability to thrive in a fast-paced and changing environment. Passionate about technology and innovation, with a continuous learning mindset. The Team You ll Be A Part Of: You will be part of a dynamic and innovative team focused on providing exceptional technical support and solutions to our customers. Our team collaborates closely with Sales, R&D, Product Application Engineers, and Marketing to ensure the successful adoption and implementation of SPICE/FastSPICE simulation and custom compiler solutions. We are dedicated to continuous improvement and innovation, always striving to enhance the customer experience and contribute to the success of Synopsys. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability. Apply Save Job test Share Email LinkedIn X Facebook Benefits At Synopsys, innovation is driven by our incredible team around the world. We feel honored to work alongside such talented and passionate individuals who choose to make a difference here every day. Were proud to provide the comprehensive benefits and rewards that our team truly deserves. Visit Benefits Page Health & Wellness Comprehensive medical and healthcare plans that work for you and your family. Time Away In addition to company holidays, we have ETO and FTO Programs. Family Support Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more. ESPP Purchase Synopsys common stock at a 15% discount, with a 24 month look-back. Retirement Plans Save for your future with our retirement plans that vary by region and country. Compensation Competitive salaries. ** Benefits vary by country and region - check with your recruiter to confirm Get an idea of what your daily routine around the office can be like Explore Bengaluru View Map Hiring Journey at Synopsys Apply When you apply to join us, your resume, skills, and experience are first reviewed for consideration. Phone Screen Once your resume has been selected, a recruiter and/or hiring manager will reach out to learn more about you, share more about the role, and answer any questions you might have. Interview Next up is interviewing (in person or virtual). You ll be invited to meet with members of the hiring team to discuss your skills and experience, and what you re looking for in your next role. Offer Congratulations! When you have been selected for the role, your recruiter will reach out to make you a verbal offer (a written offer will follow your conversation), and we hope you accept! Onboarding There will be some steps you need to take before you start to ensure a smooth first day, including new hire documentation. Welcome! Once you ve joined, your manager, team, and a peer buddy will help you get acclimated. Over the next few weeks, you ll be invited to join activities and training to help you ramp up for a successful future at Synopsys!

Software Engineering, Sr Engineer India Off-site Apply Now Save Category: Engineering Remote Eligible Yes Hire Type: Employee Job ID 7994 Date posted 06/03/2025 Share this job Email LinkedIn X Facebook We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: As a passionate and experienced software engineer, you thrive in dynamic environments and excel at solving complex problems. You possess a strong background in build/test automation and have a deep understanding of CI/CD processes. Your expertise in scripting languages like Python, Bash, and Groovy, along with your proficiency in tools like Jenkins and GitLab CI, makes you an invaluable asset to any team. You are adept at working with build tools such as Make, CMake, and Ninja, and have a solid grasp of source code management tools, especially Git. Your familiarity with Docker, Unix/Linux systems, and DevOps tools like Artifactory and Ansible further enhances your capability to streamline and automate processes. Excellent communication skills in English, both verbal and written, allow you to effectively collaborate with global teams and convey complex technical concepts with ease. What You ll Be Doing: Developing and maintaining automation pipelines and shared libraries in GitLab and Jenkins to support CI/CD flows for ARC products. Collaborating with R&D teams to implement efficient automation flows for automated building, regression testing, deployment, and advanced reporting. Providing extensive support and automation consulting to users of the continuous integration ecosystem. Ensuring the stability and efficiency of CI/CD pipelines through rigorous testing and optimization. Creating and maintaining detailed documentation of automation processes and best practices. Working closely with engineering and verification teams across multiple global sites to align on automation strategies and improvements. The Impact You Will Have: Enhancing the efficiency and reliability of CI/CD processes for Synopsys ARC products. Improving the overall productivity of engineering and verification teams through effective automation solutions. Ensuring high-quality software releases by developing robust automation pipelines. Contributing to the continuous improvement of automation practices and tools within the organization. Facilitating faster and more reliable deployment of new features and updates. Supporting the global collaboration efforts by providing consistent and reliable automation infrastructure. What You ll Need: Engineering or master s degree in Computer Science or Electrical Engineering (or equivalent). Solid practical experience in build/test automation (Jenkins pipeline, GitLab CI). Proficiency in general-purpose scripting languages (e.g., Python, Bash, Groovy). Experience with build tools (e.g., Make, CMake, Ninja). Skills in source code management tools (Git is a must, Perforce would be beneficial). Good understanding of Docker. User experience with Unix/Linux systems. Knowledge in DevOps and CI/CD web-services and tools (e.g., Artifactory, Ansible, Grafana). Good level of both verbal and written English. Who You Are: Detail-oriented and committed to delivering high-quality solutions. Proactive and able to work independently with minimal supervision. Strong problem-solving skills and the ability to troubleshoot complex issues. Excellent team player with strong communication and collaboration skills. Adaptable and willing to learn new technologies and tools. The Team You ll Be A Part Of: You will be joining the automation team at Synopsys Hyderabad branch, which is responsible for supporting the continuous integration ecosystem for the ARC product portfolio. The team develops and maintains various automation facilities and provides extensive support and consulting to users. You will work closely with engineering and verification teams across multiple global sites, including the US, Netherlands, India, and China, to enhance automation processes and ensure efficient CI/CD flows. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability. Apply Now Save Relevant Jobs Engineering, Sr Staff Engineer Noida, India Engineering Engineering, Staff Engineer Noida, India Engineering Application Engineering, Sr.Engineer Bengaluru, India Engineering

Category Engineering Hire Type Employee Job ID 10503 Remote Eligible No Date Posted 08/04/2025 We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a passionate and skilled Analog Layout Design Engineer with a keen eye for detail and a deep understanding of advanced semiconductor technologies. You thrive in dynamic environments and possess a strong problem-solving aptitude. With a profound expertise in developing high-quality layouts and physical verification techniques, you are ready to contribute to cutting-edge DDR/HBM/UCIe IP development. You excel in collaboration, fostering accountability and ownership within teams, and have excellent written, verbal communication, and interpersonal skills. Your commitment to diversity and inclusion aligns with Synopsys values, and you are eager to work in an environment that welcomes all perspectives. What You ll Be Doing: Hands-on development of layout for next-generation DDR/HBM/UCIe IPs. Solving complex problems and debugging issues effectively. Executing layout floorplanning, routing, and physical verifications to meet stringent quality requirements. Ensuring compliance with DRC, LVS, ERC, and antenna rules. Applying deep submicron effects, floorplan techniques in CMOS, FinFET, and GAA process technologies (7nm and below). Implementing layout matching techniques, ESD, latch-up, EMIR, DFM, and LEF generation. The Impact You Will Have: Enhancing the performance and reliability of Synopsys DDR/HBM/UCIe IPs. Accelerating the integration of advanced capabilities into SoCs. Reducing risk and improving time-to-market for differentiated products. Driving innovation in semiconductor technology and design. Contributing to the success of Synopsys Silicon IP business. Fostering a collaborative and inclusive work environment. What You ll Need: BTech/MTech degree in a relevant field. 4+ years of experience in analog layout design. Proven track record in developing high-quality layouts and meeting verification timelines. Strong understanding of deep submicron effects and floorplan techniques. Exposure to layout matching, ESD, latch-up, EMIR, DFM, and LEF generation. Who You Are: Detail-oriented with excellent problem-solving skills. Collaborative and able to foster accountability and ownership. Strong written, verbal communication, and interpersonal skills. Committed to diversity and inclusion

- Hands-on development of layout for next-generation DDR/HBM/UCIe IPs. - Creating floorplans, routing, and performing physical verifications to meet quality standards. - Debugging and solving complex layout issues to ensure high-quality deliverables. - Collaborating with design engineers to optimize layout for performance, power, and area. - Implementing layout matching techniques, ESD, latch-up, EMIR, DFM, and LEF generation. - Ensuring compliance with DRC, LVS, ERC, and antenna rules. The Impact You Will Have: - Contribute to the development of cutting-edge technologies that drive the Era of Smart Everything. - Enhance the performance and reliability of next-generation semiconductor IPs. - Accelerate the time-to-market for high-performance silicon chips. - Reduce risks associated with layout design by adhering to stringent verification requirements. - Foster a collaborative and innovative work environment. - Support Synopsys mission to lead in chip design and software security. What You ll Need: - BTech/MTech in Electrical Engineering or related field. - 2+ years of relevant experience in analog layout design. - Proficiency in developing quality layouts and performing physical verifications. - In-depth understanding of deep submicron effects and floorplan techniques. - Experience with CMOS, FinFET, and GAA process technologies at 7nm and below. - Knowledge of layout matching techniques, ESD, latch-up, EMIR, DFM, and LEF generation.

You are a passionate and skilled Analog Layout Design Engineer with a keen eye for detail and a deep understanding of advanced semiconductor technologies. You thrive in dynamic environments and possess a strong problem-solving aptitude. With a profound expertise in developing high-quality layouts and physical verification techniques, you are ready to contribute to cutting-edge DDR/HBM/UCIe IP development. You excel in collaboration, fostering accountability and ownership within teams, and have excellent written, verbal communication, and interpersonal skills. Your commitment to diversity and inclusion aligns with Synopsys values, and you are eager to work in an environment that welcomes all perspectives. What You ll Be Doing: Hands-on development of layout for next-generation DDR/HBM/UCIe IPs. Solving complex problems and debugging issues effectively. Executing layout floor planning, routing, and physical verifications to meet stringent quality requirements. Ensuring compliance with DRC, LVS, ERC, and antenna rules. Applying deep submicron effects, floorplan techniques in CMOS, FinFET, and GAA process technologies (7nm and below). Implementing layout matching techniques, ESD, latch-up, EMIR, DFM, and LEF generation. The Impact You Will Have: Enhancing the performance and reliability of Synopsys DDR/HBM/UCIe IPs. Accelerating the integration of advanced capabilities into SoCs. Reducing risk and improving time-to-market for differentiated products. Driving innovation in semiconductor technology and design. Contributing to the success of Synopsys Silicon IP business. Fostering a collaborative and inclusive work environment. What You ll Need: BTech/MTech degree in a relevant field. 4+ years of experience in analog layout design. Proven track record in developing high-quality layouts and meeting verification timelines. Strong understanding of deep submicron effects and floorplan techniques. Exposure to layout matching, ESD, latch-up, EMIR, DFM, and LEF generation. Who You Are: Detail-oriented with excellent problem-solving skills. Collaborative and able to foster accountability and ownership. Strong written, verbal communication, and interpersonal skills. Committed to diversity and inclusion.

Full time with century old top Japanese MNC JOB SUMMARY ( Full time with Super Top Japanese MNC) JDs follow for following roles, Principal Engineer VLSI Semiconductor Chip Design Analog Principal Engineer VLSI Semiconductor Chip Design Backend Principal Engineer VLSI Semiconductor Chip Design Frontend ------------------------------------------------------------------------------------------------------------------------------------------ Job Title : Principal Engineer Chip Design Analog Job Title: Principal Engineer - Analog IP/IC Job Overview: As an Principal Engineer - Analog IP/IC specializing in Semiconductor Chip Design, you will lead and coordinate the execution of analog and mixed-signal integrated circuit development projects. This role requires a strong technical background in analog design, verification, and physical implementation, coupled with exceptional project management skills. You will oversee teams engaged in designing high- performance analog circuits, ensuring precision and reliability in semiconductor designs. Key Responsibilities: Design analog/mixed-signal blocks: ADC/DAC, PLL, LDO/DCDC, IO, Motor & Gate Drivers . Run MATLAB modeling , circuit simulations , and post-layout analysis (LPE, Monte Carlo). Develop and manage verification plans , mixed-signal simulation , and behavioral models . Guide custom layout and ensure DRC/LVS/ESD/DFM compliance. Collaborate with digital, verification, layout, and test teams. Use industry-standard EDA tools (e.g., Custom Compiler). Product Support Required Skills & Experience Required Skills & Experience Min 8+ years of experience in custom analog/mixed signal design Strong in variation-aware design, verification planning, and cross-functional teamwork. Layout Parasitic Extraction (LPE), Custom IC Design, EDA Tools for Analog Design Strong design and debugging skills. Experience in Product Support for both Pre and Post Production Stages, Support for RMA teams. Preferred Skills and Experience Min 1+ years of Project Management (Waterfall and Agile Hybrid Methodology). Continuous Improvement. Qualifications: Masters in VLSI design from reputed universities like IIT/NIT with a background in Bachelors in Electronics and Communication, or a related field ------------------------------------------------------------------------------------------------------------------------------------------------------ Job Title : Principal Engineer Chip Design Back End Job Overview: : As a Backend (Physical Design) Principal Engineer specializing in Semiconductor Chip Design, you will lead and coordinate the execution of the back-end stages of integrated circuit development. This role requires a strong technical background in physical design, a deep understanding of semiconductor processes, and exceptional project management skills. You will oversee teams engaged in physical design, synthesis, DFT, place and route, power integrity, and other back-end aspects to ensure the successful realization of semiconductor designs. Additionally, you will oversee product support activities for both Pre-production and Post-production stages, ensuring the successful initiation, development, and sustainment of semiconductor designs. Key Responsibilities: Technical Leadership - Own synthesis, SDC constraint development, and formal verification. - Drive place & route (P&R) including floorplanning, CTS, and timing closure. - Optimize for power, performance, and area (PPA); manage power distribution and multi-voltage design. - Lead STA across corners/modes and support technology node migration. - Integrate and verify SCAN/MBIST, define test specifications, and debug test coverage issues. - Perform DFM, DRC, and ESD checks to ensure manufacturability. - Collaborate with cross-functional teams (Frontend, Analog. - Document design flow, participate in design reviews, and mentor junior team members. - Product Support and RMA support Required Skills & Experience - Min 8+ years of strong experience in backend flows for MCU or low-power SoC designs . - Ability to lead the DFT teams, Physical and formal Verification Teams. - Exposure to frontend and Analog processes. - Ability to collaborate effectively with frontend and analog teams - Experience in Product Support for both Pre and Post Production Stages, Support for RMA teams. Preferred Skills and Experience - Min 1+ years of Project Management (Waterfall and Agile Hybrid Methodology). - Continuous Improvement. - Knowledge of industry standards and best practices in semiconductor front-end design. Qualifications: Masters in VLSI design from reputed universities like IIT/NIT with a background in Bachelors in Electronics and Communication, or a related field. ---------------------------------------------------------------------------------------------------------------------------------------------- Job Title : Principal Engineer – Chip Design Front End Job Overview: As a Frontend Principal Engineer specializing in Semiconductor Chip Design, you will lead and coordinate the execution of the front-end stages of integrated circuit development. This role requires a strong technical background in digital design, verification, and project management skills. Additionally, you will oversee product support activities for both the Pre-production and Post-production stages, ensuring the successful initiation, development, and sustainment of semiconductor designs. Key Responsibilities: Technical Leadership and Architecture Design Architecture from scratch for new products and understand the specifications of the derivative products. RTL Design and Coding, Code Quality Management : Creating RTL Design and Coding.. Ensure highest quality by applying suitable coding standards and other techniques. Design Verification : Ensuring the correctness and functionality of the design through rigorous verification processes. This includes creating test benches, running simulations, and debugging the design. Collaboration : Working closely with other teams, such as physical design, analog IP/IC, software, and system engineering teams, to ensure seamless integration and functionality of the final product. Mentorship and Leadership : Leading and mentoring junior engineers, providing guidance on best practices, and ensuring the team adheres to project timelines and quality standards. EDA Tools Proficiency : Utilizing EDA tools for design, simulation, and verification tasks. Documentation : Maintaining detailed documentation of the design process, including specifications, design decisions, and verification results Product Support : Pre and Post Production Stages, Support for RMA Required Skills & Experience - Min 8+ years of experience in System Architecture for ARM based MCU product development - Min 8+ years of experience in RTL Design, Coding and RTL Integration, - Strong design and debugging skills. - Experience in handling Verification Teams. Verification environment Development , Static and Dynamic Verification, Test Management. (UPF, GLN, Test Mode) - Experience with industry-standard EDA tools for LINT, CDC, SDC validation, and power analysis preferably Synopsis EDA. - Exposure to Backend and Analog processes. - Ability to collaborate effectively with backend teams (PD, DFT, and STA) to achieve timing and power closure. - Experience in Product Support for both Pre and Post Production Stages, Support for RMA teams. Preferred Skills and Experience - Min 1+ years of Project Management (Waterfall and Agile – Hybrid Methodology). - Continuous Improvement. - Knowledge of industry standards and best practices in semiconductor front-end design. Qualifications: Masters in VLSI design from reputed universities like IIT/NIT with a background in Bachelors in Electronics and Communication, or a related field

We are now looking for a Senior Power Verification Engineer. NVIDIA is seeking elite ASIC Verification Engineers to verify the design and implementation of low power features for the world s leading Smart-NICs and DPUs which help accelerate network performance while reducing the CPU overhead of Internet Protocol (IP) packet transport, freeing more processor cycles to run applications. These networking processors also embed innovative hardware engines that offload and accelerate security with in-line encryption/decryption. With unmatched RDMA over Converged Ethernet (RoCE) performance, NVIDIA Smart-NICs and DPUs deliver efficient, high-performance remote direct-memory access (RDMA) services to bandwidth- and latency-sensitive applications! The Networking Chip Design in India is a new team which is growing at a fast pace! What you ll be doing: Work on structural and functional verification of low power aspects of NVIDIA s family of smartNICs and DPUs. Come up with test plans and coverage plans of these features. Write test cases, test bench components like assertions and coverage points, and own verification convergence. Collaborate with system level and unit level teams to cover the features well from functional, electrical, performance, and noise aspects. Be responsible for debugging waves to analyse power consumed by unit IP s. Work with architects, designers, pre- and post-silicon verification teams, synthesis, timing and back-end teams to accomplish your tasks. Validate/Correlate the effectiveness of the low power features on silicon. What we need to see: BS/MS or equivalent experience with specialisation related to Low Power techniques and Verification. 5+ years of experience. Fundamental understanding of power basics including transistor-level leakage/dynamic characteristics of VLSI circuits. Knowledge of power intent formats - UPF/CPF. Experience in Static Power check - tools like VCLP/MVRC or similar. Hands-on knowledge in Power aware dynamic verification - NLP/MVSIM or similar tools. Experience in design and verification tools (VCS, XCelium or equivalent simulation tools, Verdi, Indago or other debug tools). Familiarity with low power design techniques such as multi VT, Clock gating, Power gating, and Dynamic Voltage-Frequency Scaling (DVFS). Exposure to Cluster / Sub-system / Fullchip / SOClevel verification environments Ways to stand out from the crowd: Prior experience of SmartNICs (or DPU) and/or high-speed interconnects. Good software programming skills. Python/Perl/C++ preferred. Confident debugging and problem-solving skills. Good interpersonal skills and ability & desire to work as an excellent teammate. Widely considered to be one of the technology world s most desirable employers, NVIDIA offers highly competitive salaries and a comprehensive benefits package. As you plan your future, see what we can offer to you and your family www. nvidiabenefits. com/ NVIDIA is committed to encouraging a diverse work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law. We will ensure that individuals with disabilities are provided reasonable accommodation to participate in the job application or interview process, to perform essential job functions, and to receive other benefits and privileges of employment. Please contact us to request accommodation.

NVIDIA is seeking best-in-class Design Verification (DV) Engineers to verify world s leading Smart Network Interface Cards (Smart-NICs) and Data Processing Units (DPUs) which help accelerate network performance while reducing the CPU overhead of Internet Protocol (IP) packet transport, freeing more processor cycles to run applications. These networking processors also embed innovative hardware engines that offload and accelerate security with in-line encryption/decryption. With unmatched RDMA over Converged Ethernet (RoCE) performance, NVIDIA Smart-NICs and DPUs deliver efficient, high-performance remote direct-memory access (RDMA) services to bandwidth- and latency-sensitive applications. The Networking Chip Design in India is a new team which is growing at a fast pace. We are currently seeking an Experienced Verification Engineer with strong verification fundamentals to work in Networking Chip Design team. You will join a group of hardworking engineers to implement the next innovative Networking Silicon chip. You will work closely with architects, design engineers and verification engineers to accomplish your tasks. What youll be doing: Be responsible for verifying the smartNIC designs, architecture and micro-architecture using advanced verification methodologies. You are encouraged to understand the design and implementation, define the verification scope, develop the verification infrastructure and verify the correctness of the design. Come up with test plans, tests and verification infrastructure for complex IPs/sub-systems. Use advanced verification methodologies like e-specman, SV-UVM etc. What we need to see: BS (or equivalent experience) / MS with 4+ years of experience in design verification. Exposure to design and verification tools (Verilog/SV or equivalent, Cadence or equivalent simulation tools, debug tools like Indago, GDB etc.). C/C++ programming/scripting language experience desirable. Prior experience of smartNIC and/or high-speed interconnects. Strong debugging, problem-solving and analytical skills. Scripting knowledge (Python/Perl/shell). Good interpersonal skills and ability & desire to work as a phenomenal teammate. Widely considered to be one of the technology world s most desirable employers, NVIDIA offers highly competitive salaries and a comprehensive benefits package. As you plan your future, see what we can offer to you and your family www.nvidiabenefits.com/ #LI-Hybrid

Driving engineering efforts related to Continuous Integration and Delivery (CI/CD) and automated testing and deployment across all phases of the Software Development Life Cycle. Implementing frameworks and best practices for deploying automation via pipelines into on-premises, cloud environments (AWS, GCP, Azure), and containerized environments (Kubernetes, Docker Swarm). Building platforms and frameworks to create consistent, verifiable, and automatic management of applications and infrastructure in both on-premises and cloud infrastructure. Defining the development pipeline to ensure that software development flows match operational testing and deployment goals. Working within the Agile framework to identify, create, design, and integrate processes for repeatable, automated software delivery. Identifying and initiating the development of metrics and dashboards to monitor the adoption and maturity of DevOps practices. Advocating for innovation and automation, continuously seeking ways to improve CI/CD processes. Reviewing technical operations and providing mentoring and oversight to other DevOps team members in implementing recommended solutions for process automation and best practices. The Impact You Will Have: Enhancing the efficiency and effectiveness of our CI/CD pipelines to ensure high-quality software delivery. Enabling consistent and automated management of applications and infrastructure, improving reliability and scalability. Streamlining the software development lifecycle, ensuring alignment with operational testing and deployment goals. Driving the adoption and maturity of DevOps practices through the development of metrics and dashboards. Fostering a culture of innovation and automation within the engineering team. Mentoring and guiding other DevOps team members, enhancing their skills and knowledge. What You ll Need: Bachelors or Masters degree in Engineering streams such as Computer Science, EEE, ECE, IT, or equivalent. At least 5 years of overall software development/deployment/infra experience. Cloud and other architect-level industry certifications (AWS, GCP, Azure, Security, etc.). 3-5 years of DevOps experience in modern tech stack to support products in the cloud. 2+ years of scripting/automation experience with Bash, Python, Perl, and/or other scripting languages. Strong CI/CD experience with code build, source control, testing, continuous integration, and delivery using standard DevOps CI/CD tools (Jenkins, Git). 3+ years of experience with containerization, source control (Docker/Docker Hub/Helm), and container orchestration (Kubernetes, Docker Swarm). Familiarity with programming languages (C/C++/Java). Familiarity with build tools (Make, CMake, Maven, Gradle) and dependency management (Conan). Experience developing Ansible Playbooks/Jenkins automation for infrastructure automation. Proficiency in multiple DevOps-related tools and technologies (JIRA, Confluence, GitHub/Azure, Jenkins, Ansible, Prometheus, Grafana, ELK).

Working closely with customers to understand their requirements in verifying custom design IP. Tailoring solutions to address challenging verification scenarios for custom designs. Collaborating with the product team to define, test, and deploy new features. Providing technical support and expertise on Synopsys ESP equivalence check product. Conducting product demonstrations and training sessions for customers and partners. Developing and maintaining technical documentation and application notes. The Impact You Will Have: Enhancing customer satisfaction through effective technical support and custom solutions. Driving the adoption and integration of Synopsys ESP equivalence check product. Contributing to the continuous innovation and development of new product features. Ensuring the highest quality of custom designs by catching elusive corner case design inconsistencies. Building strong relationships with customers and fostering long-term collaborations. Expanding Synopsys market presence through successful customer engagements. What You'll Need: Bachelors or Masters degree in Engineering/Technology (Electronics/Electrical or related field). 1-2 years of experience in custom design verification. Understanding of circuits at SPICE netlist level and design description in Verilog/System Verilog. Knowledge of transistor-level design and simulation in MOSFET technology. Excellent written and oral English communication skills.

An experienced and passionate Applications Engineer, ready to join our dynamic team. You thrive in fast-paced environments and are driven by the opportunity to work with high-end customers in the Mobile Industry Processor Interface (MIPI ) domain. With your strong technical background in ASIC design, you are adept at providing top-tier technical support and guidance. Your excellent communication skills enable you to effectively interact with customers and internal teams alike. You are not just looking for a job, but a place where you can make a significant impact and grow your career. What You ll Be Doing: Providing technical support to field engineers and customers utilizing Synopsys MIPI UFS Intellectual Property (IP) Partnering with high-tech customers through the full cycle of ASIC design, from installation and training to RTL design and production testing Conducting reviews on customers major SoC design milestones Authoring application notes and white papers to promote the IPs ease of use and address specific challenges Providing feedback to internal teams for continuous product improvements based on customer feedback Ensuring successful integration of Synopsys MIPI IP solutions into customers SoCs The Impact You Will Have: Enhancing customer satisfaction by providing expert support and ensuring seamless integration of Synopsys IP Driving innovation by collaborating with customers on cutting-edge SoC designs Contributing to the development of industry-leading IP solutions through continuous feedback and improvement processes Expanding Synopsys market presence in the MIPI domain through successful customer engagements Promoting the adoption of Synopsys IP by authoring impactful documentation and white papers Supporting the growth of Synopsys IP portfolio by identifying and addressing customer needs What You ll Need: Bachelors degree with 5+ years or Masters degree with 2+ years of relevant experience in the ASIC design process Proficiency in Verilog HDL, synthesis, simulation, and verification Knowledge of Place and Route, Design Reuse, Physical Design, or Analog Design is a plus Familiarity with MIPI UFS/UniPro protocols, high-speed SERDES, or parallel interfaces is advantageous Experience with Synopsys tool suites is a plus Strong verbal and written communication skills in English